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* [PATCH xf86-video-intel v1] sna: Added AYUV format support for textured and sprite video adapters.
@ 2018-10-02  9:38 Stanislav Lisovskiy
  2018-10-03 11:29 ` Chris Wilson
  0 siblings, 1 reply; 6+ messages in thread
From: Stanislav Lisovskiy @ 2018-10-02  9:38 UTC (permalink / raw)
  To: intel-gfx; +Cc: ville.syrjala, martin.peres, juha-pekka.heikkila

sna/gen9+: Had to split out wm_kernel from the sna_composite_op flags,
otherwise new shader kernels go beyond existing flags field.

Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
---
 src/render_program/Makefile.am                |   2 +
 .../exa_wm_src_sample_argb_ayuv.g8a           |  60 +++++++++
 .../exa_wm_src_sample_argb_ayuv.g8b           |   6 +
 src/sna/gen9_render.c                         |  62 +++++++--
 src/sna/sna_render.h                          |   8 ++
 src/sna/sna_video.c                           | 123 ++++++++++++++++++
 src/sna/sna_video.h                           |  20 +++
 src/sna/sna_video_sprite.c                    |  19 ++-
 src/sna/sna_video_textured.c                  |   8 ++
 9 files changed, 290 insertions(+), 18 deletions(-)
 create mode 100644 src/render_program/exa_wm_src_sample_argb_ayuv.g8a
 create mode 100644 src/render_program/exa_wm_src_sample_argb_ayuv.g8b

diff --git a/src/render_program/Makefile.am b/src/render_program/Makefile.am
index dc58138f..e35ffa52 100644
--- a/src/render_program/Makefile.am
+++ b/src/render_program/Makefile.am
@@ -196,6 +196,7 @@ INTEL_G7B =				\
 INTEL_G8A =				\
 	exa_wm_src_affine.g8a 		\
 	exa_wm_src_sample_argb.g8a 	\
+	exa_wm_src_sample_argb_ayuv.g8a \
 	exa_wm_src_sample_nv12.g8a 	\
 	exa_wm_src_sample_planar.g8a 	\
 	exa_wm_write.g8a 		\
@@ -205,6 +206,7 @@ INTEL_G8A =				\
 
 INTEL_G8B =				\
 	exa_wm_src_affine.g8b 		\
+	exa_wm_src_sample_argb_ayuv.g8b \
 	exa_wm_src_sample_argb.g8b 	\
 	exa_wm_src_sample_nv12.g8b 	\
 	exa_wm_src_sample_planar.g8b 	\
diff --git a/src/render_program/exa_wm_src_sample_argb_ayuv.g8a b/src/render_program/exa_wm_src_sample_argb_ayuv.g8a
new file mode 100644
index 00000000..d79840ac
--- /dev/null
+++ b/src/render_program/exa_wm_src_sample_argb_ayuv.g8a
@@ -0,0 +1,60 @@
+/*
+ * Copyright © 2006 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ * Authors:
+ *    Wang Zhenyu <zhenyu.z.wang@intel.com>
+ *    Keith Packard <keithp@keithp.com>
+ */
+
+/* Sample the src surface */
+
+include(`exa_wm.g4i')
+
+undefine(`src_msg')
+undefine(`src_msg_ind')
+
+define(`src_msg',       `g65')
+define(`src_msg_ind',   `65')
+
+/* prepare sampler read back gX register, which would be written back to output */
+
+/* use simd16 sampler, param 0 is u, param 1 is v. */
+/* 'payload' loading, assuming tex coord start from g4 */
+
+/* load argb */
+mov (1) g0.8<1>UD	0x00000000UD { align1 mask_disable };
+mov (8) src_msg<1>UD g0<8,8,1>UD { align1 }; /* copy to msg start reg*/
+
+/* src_msg will be copied with g0, as it contains send desc */
+/* emit sampler 'send' cmd */
+send (16) src_msg_ind	/* msg reg index */
+	src_sample_base<1>UW /* readback */
+	null
+	sampler (1,0,F)	/* sampler message description, (binding_table,sampler_index,datatype)
+				/* here(src->dst) we should use src_sampler and src_surface */
+	mlen 5 rlen 8 { align1 };   /* required message len 5, readback len 8 */
+
+/* Put CbCr into right places */
+mov (16) src_sample_b<1>UD src_sample_r<1>UD  { align1 };
+mov (16) src_sample_r<1>UD src_sample_a<1>UD  { align1 };
+mov (16) src_sample_a<1>F 1.0F;
+
diff --git a/src/render_program/exa_wm_src_sample_argb_ayuv.g8b b/src/render_program/exa_wm_src_sample_argb_ayuv.g8b
new file mode 100644
index 00000000..4f439141
--- /dev/null
+++ b/src/render_program/exa_wm_src_sample_argb_ayuv.g8b
@@ -0,0 +1,6 @@
+   { 0x00000001, 0x2008060c, 0x00000000, 0x00000000 },
+   { 0x00600001, 0x28200208, 0x008d0000, 0x00000000 },
+   { 0x02800031, 0x21c00a48, 0x06000820, 0x0a8c0001 },
+   { 0x00800001, 0x22400208, 0x002001c0, 0x00000000 },
+   { 0x00800001, 0x21c00208, 0x00200280, 0x00000000 },
+   { 0x00800001, 0x22803ee8, 0x38000000, 0x3f800000 },
diff --git a/src/sna/gen9_render.c b/src/sna/gen9_render.c
index 505b98af..29447d25 100644
--- a/src/sna/gen9_render.c
+++ b/src/sna/gen9_render.c
@@ -129,6 +129,20 @@ static const uint32_t ps_kernel_planar_bt709[][4] = {
 #include "exa_wm_write.g8b"
 };
 
+static const uint32_t ps_kernel_packed_ayuv_bt601[][4] = {
+#include "exa_wm_src_affine.g8b"
+#include "exa_wm_src_sample_argb_ayuv.g8b"
+#include "exa_wm_yuv_rgb_bt601.g8b"
+#include "exa_wm_write.g8b"
+};
+
+static const uint32_t ps_kernel_packed_ayuv_bt709[][4] = {
+#include "exa_wm_src_affine.g8b"
+#include "exa_wm_src_sample_argb_ayuv.g8b"
+#include "exa_wm_yuv_rgb_bt709.g8b"
+#include "exa_wm_write.g8b"
+};
+
 static const uint32_t ps_kernel_nv12_bt709[][4] = {
 #include "exa_wm_src_affine.g8b"
 #include "exa_wm_src_sample_nv12.g8b"
@@ -177,6 +191,8 @@ static const struct wm_kernel_info {
 	KERNEL(VIDEO_PLANAR_BT709, ps_kernel_planar_bt709, 7),
 	KERNEL(VIDEO_NV12_BT709, ps_kernel_nv12_bt709, 7),
 	KERNEL(VIDEO_PACKED_BT709, ps_kernel_packed_bt709, 2),
+	KERNEL(VIDEO_PACKED_AYUV_BT601, ps_kernel_packed_ayuv_bt601, 2),
+	KERNEL(VIDEO_PACKED_AYUV_BT709, ps_kernel_packed_ayuv_bt709, 2),
 	KERNEL(VIDEO_RGB, ps_kernel_rgb, 2),
 #endif
 };
@@ -226,19 +242,18 @@ static const struct blendinfo {
 
 #define COPY_SAMPLER 0
 #define COPY_VERTEX VERTEX_2s2s
-#define COPY_FLAGS(a) GEN9_SET_FLAGS(COPY_SAMPLER, (a) == GXcopy ? NO_BLEND : CLEAR, GEN9_WM_KERNEL_NOMASK, COPY_VERTEX)
+#define COPY_FLAGS(a) GEN9_SET_FLAGS(COPY_SAMPLER, (a) == GXcopy ? NO_BLEND : CLEAR, COPY_VERTEX)
 
 #define FILL_SAMPLER 1
 #define FILL_VERTEX VERTEX_2s2s
-#define FILL_FLAGS(op, format) GEN9_SET_FLAGS(FILL_SAMPLER, gen9_get_blend((op), false, (format)), GEN9_WM_KERNEL_NOMASK, FILL_VERTEX)
-#define FILL_FLAGS_NOBLEND GEN9_SET_FLAGS(FILL_SAMPLER, NO_BLEND, GEN9_WM_KERNEL_NOMASK, FILL_VERTEX)
+#define FILL_FLAGS(op, format) GEN9_SET_FLAGS(FILL_SAMPLER, gen9_get_blend((op), false, (format)), FILL_VERTEX)
+#define FILL_FLAGS_NOBLEND GEN9_SET_FLAGS(FILL_SAMPLER, NO_BLEND, FILL_VERTEX)
 
 #define GEN9_SAMPLER(f) (((f) >> 20) & 0xfff)
 #define GEN9_BLEND(f) (((f) >> 4) & 0x7ff)
 #define GEN9_READS_DST(f) (((f) >> 15) & 1)
-#define GEN9_KERNEL(f) (((f) >> 16) & 0xf)
 #define GEN9_VERTEX(f) (((f) >> 0) & 0xf)
-#define GEN9_SET_FLAGS(S, B, K, V)  ((S) << 20 | (K) << 16 | (B) | (V))
+#define GEN9_SET_FLAGS(S, B, V)  ((S) << 20 | (B) | (V))
 
 #define OUT_BATCH(v) batch_emit(sna, v)
 #define OUT_BATCH64(v) batch_emit64(sna, v)
@@ -1349,7 +1364,7 @@ gen9_emit_state(struct sna *sna,
 	gen9_emit_cc(sna, GEN9_BLEND(op->u.gen9.flags));
 	gen9_emit_sampler(sna, GEN9_SAMPLER(op->u.gen9.flags));
 	gen9_emit_sf(sna, GEN9_VERTEX(op->u.gen9.flags) >> 2);
-	gen9_emit_wm(sna, GEN9_KERNEL(op->u.gen9.flags));
+	gen9_emit_wm(sna, op->u.gen9.wm_kernel);
 	gen9_emit_vertex_elements(sna, op);
 	gen9_emit_binding_table(sna, wm_binding_table);
 
@@ -1618,7 +1633,7 @@ static int gen9_get_rectangles__flush(struct sna *sna,
 		if (gen9_magic_ca_pass(sna, op)) {
 			gen9_emit_pipe_invalidate(sna);
 			gen9_emit_cc(sna, GEN9_BLEND(op->u.gen9.flags));
-			gen9_emit_wm(sna, GEN9_KERNEL(op->u.gen9.flags));
+			gen9_emit_wm(sna, op->u.gen9.wm_kernel);
 		}
 	}
 
@@ -2548,12 +2563,16 @@ gen9_render_composite(struct sna *sna,
 			       gen9_get_blend(tmp->op,
 					      tmp->has_component_alpha,
 					      tmp->dst.format),
-			       gen9_choose_composite_kernel(tmp->op,
-							    tmp->mask.bo != NULL,
-							    tmp->has_component_alpha,
-							    tmp->is_affine),
 			       gen4_choose_composite_emitter(sna, tmp));
+	tmp->u.gen9.wm_kernel = gen9_choose_composite_kernel(tmp->op,
+							     tmp->mask.bo != NULL,
+							     tmp->has_component_alpha,
+							     tmp->is_affine);
 
+        tmp->gen9_kernel = gen9_choose_composite_kernel(tmp->op,
+							    tmp->mask.bo != NULL,
+							    tmp->has_component_alpha,
+							    tmp->is_affine);
 	tmp->blt   = gen9_render_composite_blt;
 	tmp->box   = gen9_render_composite_box;
 	tmp->boxes = gen9_render_composite_boxes__blt;
@@ -2781,9 +2800,11 @@ gen9_render_composite_spans(struct sna *sna,
 					      SAMPLER_FILTER_NEAREST,
 					      SAMPLER_EXTEND_PAD),
 			       gen9_get_blend(tmp->base.op, false, tmp->base.dst.format),
-			       GEN9_WM_KERNEL_OPACITY | !tmp->base.is_affine,
 			       gen4_choose_spans_emitter(sna, tmp));
+	tmp->base.u.gen9.wm_kernel =
+		GEN9_WM_KERNEL_OPACITY | !tmp->base.is_affine;
 
+	tmp->base.gen9_kernel = GEN9_WM_KERNEL_OPACITY | !tmp->base.is_affine;
 	tmp->box   = gen9_render_composite_spans_box;
 	tmp->boxes = gen9_render_composite_spans_boxes;
 	if (tmp->emit_boxes)
@@ -3045,6 +3066,7 @@ fallback_blt:
 	tmp.need_magic_ca_pass = 0;
 
 	tmp.u.gen9.flags = COPY_FLAGS(alu);
+	tmp.u.gen9.wm_kernel = GEN9_WM_KERNEL_NOMASK;
 
 	kgem_set_mode(&sna->kgem, KGEM_RENDER, tmp.dst.bo);
 	if (!kgem_check_bo(&sna->kgem, tmp.dst.bo, tmp.src.bo, NULL)) {
@@ -3214,6 +3236,7 @@ fallback:
 	op->base.floats_per_rect = 6;
 
 	op->base.u.gen9.flags = COPY_FLAGS(alu);
+	op->base.u.gen9.wm_kernel = GEN9_WM_KERNEL_NOMASK;
 
 	kgem_set_mode(&sna->kgem, KGEM_RENDER, dst_bo);
 	if (!kgem_check_bo(&sna->kgem, dst_bo, src_bo, NULL)) {
@@ -3366,6 +3389,7 @@ gen9_render_fill_boxes(struct sna *sna,
 	tmp.need_magic_ca_pass = false;
 
 	tmp.u.gen9.flags = FILL_FLAGS(op, format);
+	tmp.u.gen9.wm_kernel = GEN9_WM_KERNEL_NOMASK;
 
 	kgem_set_mode(&sna->kgem, KGEM_RENDER, dst_bo);
 	if (!kgem_check_bo(&sna->kgem, dst_bo, NULL)) {
@@ -3552,6 +3576,7 @@ gen9_render_fill(struct sna *sna, uint8_t alu,
 	op->base.floats_per_rect = 6;
 
 	op->base.u.gen9.flags = FILL_FLAGS_NOBLEND;
+	op->base.u.gen9.wm_kernel = GEN9_WM_KERNEL_NOMASK;
 
 	kgem_set_mode(&sna->kgem, KGEM_RENDER, dst_bo);
 	if (!kgem_check_bo(&sna->kgem, dst_bo, NULL)) {
@@ -3637,6 +3662,7 @@ gen9_render_fill_one(struct sna *sna, PixmapPtr dst, struct kgem_bo *bo,
 	tmp.need_magic_ca_pass = false;
 
 	tmp.u.gen9.flags = FILL_FLAGS_NOBLEND;
+	tmp.u.gen9.wm_kernel = GEN9_WM_KERNEL_NOMASK;
 
 	kgem_set_mode(&sna->kgem, KGEM_RENDER, bo);
 	if (!kgem_check_bo(&sna->kgem, bo, NULL)) {
@@ -3723,6 +3749,7 @@ gen9_render_clear(struct sna *sna, PixmapPtr dst, struct kgem_bo *bo)
 	tmp.need_magic_ca_pass = false;
 
 	tmp.u.gen9.flags = FILL_FLAGS_NOBLEND;
+	tmp.u.gen9.wm_kernel = GEN9_WM_KERNEL_NOMASK;
 
 	kgem_set_mode(&sna->kgem, KGEM_RENDER, bo);
 	if (!kgem_check_bo(&sna->kgem, bo, NULL)) {
@@ -3847,6 +3874,8 @@ static void gen9_emit_video_state(struct sna *sna,
 			src_surf_format[0] = SURFACEFORMAT_B8G8R8X8_UNORM;
 		else if (frame->id == FOURCC_UYVY)
 			src_surf_format[0] = SURFACEFORMAT_YCRCB_SWAPY;
+		else if (is_ayuv_fourcc(frame->id))
+			src_surf_format[0] = SURFACEFORMAT_B8G8R8A8_UNORM;
 		else
 			src_surf_format[0] = SURFACEFORMAT_YCRCB_NORMAL;
 
@@ -3897,6 +3926,9 @@ static unsigned select_video_kernel(const struct sna_video *video,
 	case FOURCC_RGB565:
 		return GEN9_WM_KERNEL_VIDEO_RGB;
 
+	case FOURCC_AYUV:
+		return GEN9_WM_KERNEL_VIDEO_PACKED_AYUV_BT601;
+
 	default:
 		return video->colorspace ?
 			GEN9_WM_KERNEL_VIDEO_PACKED_BT709 :
@@ -3964,8 +3996,8 @@ gen9_render_video(struct sna *sna,
 		GEN9_SET_FLAGS(SAMPLER_OFFSET(filter, SAMPLER_EXTEND_PAD,
 					      SAMPLER_FILTER_NEAREST, SAMPLER_EXTEND_NONE),
 			       NO_BLEND,
-			       select_video_kernel(video, frame),
 			       2);
+	tmp.u.gen9.wm_kernel = select_video_kernel(video, frame);
 	tmp.priv = frame;
 
 	kgem_set_mode(&sna->kgem, KGEM_RENDER, tmp.dst.bo);
@@ -4074,6 +4106,7 @@ static void gen9_render_fini(struct sna *sna)
 	kgem_bo_destroy(&sna->kgem, sna->render_state.gen9.general_bo);
 }
 
+
 static bool gen9_render_setup(struct sna *sna)
 {
 	struct gen9_render_state *state = &sna->render_state.gen9;
@@ -4135,6 +4168,9 @@ static bool gen9_render_setup(struct sna *sna)
 		assert(state->wm_kernel[m][0]|state->wm_kernel[m][1]|state->wm_kernel[m][2]);
 	}
 
+	COMPILE_TIME_ASSERT(GEN9_WM_KERNEL_COUNT <=
+			    1 << (sizeof(((struct sna_composite_op *)NULL)->u.gen9.wm_kernel) * 8));
+
 	COMPILE_TIME_ASSERT(SAMPLER_OFFSET(FILTER_COUNT, EXTEND_COUNT, FILTER_COUNT, EXTEND_COUNT) <= 0x7ff);
 	ss = sna_static_stream_map(&general,
 				   2 * sizeof(*ss) *
diff --git a/src/sna/sna_render.h b/src/sna/sna_render.h
index 6669af9d..ef88d1f9 100644
--- a/src/sna/sna_render.h
+++ b/src/sna/sna_render.h
@@ -139,20 +139,25 @@ struct sna_composite_op {
 
 		struct {
 			uint32_t flags;
+			uint8_t wm_kernel;
 		} gen6;
 
 		struct {
 			uint32_t flags;
+			uint8_t wm_kernel;
 		} gen7;
 
 		struct {
 			uint32_t flags;
+			uint8_t wm_kernel;
 		} gen8;
 
 		struct {
 			uint32_t flags;
+			uint8_t wm_kernel;
 		} gen9;
 	} u;
+	unsigned long gen9_kernel;
 
 	void *priv;
 };
@@ -616,6 +621,9 @@ enum {
 	GEN9_WM_KERNEL_VIDEO_NV12_BT709,
 	GEN9_WM_KERNEL_VIDEO_PACKED_BT709,
 
+	GEN9_WM_KERNEL_VIDEO_PACKED_AYUV_BT601,
+	GEN9_WM_KERNEL_VIDEO_PACKED_AYUV_BT709,
+
 	GEN9_WM_KERNEL_VIDEO_RGB,
 	GEN9_WM_KERNEL_COUNT
 };
diff --git a/src/sna/sna_video.c b/src/sna/sna_video.c
index 55405f81..1504b304 100644
--- a/src/sna/sna_video.c
+++ b/src/sna/sna_video.c
@@ -281,6 +281,7 @@ sna_video_frame_set_rotation(struct sna_video *video,
 	} else {
 		switch (frame->id) {
 		case FOURCC_RGB888:
+		case FOURCC_AYUV:
 			if (rotation & (RR_Rotate_90 | RR_Rotate_270)) {
 				frame->pitch[0] = ALIGN((height << 2), align);
 				frame->size = (int)frame->pitch[0] * width;
@@ -584,6 +585,125 @@ sna_copy_packed_data(struct sna_video *video,
 	}
 }
 
+static void
+sna_copy_packed_data_ayuv(struct sna_video *video,
+		     const struct sna_video_frame *frame,
+		     const uint8_t *buf,
+		     uint8_t *dst)
+{
+	int pitch = frame->width << 2;
+	const uint8_t *src, *s;
+	int x, y, w, h;
+	int i, j;
+
+	if (video->textured) {
+		/* XXX support copying cropped extents */
+		x = y = 0;
+		w = frame->width;
+		h = frame->height;
+	} else {
+		x = frame->image.x1;
+		y = frame->image.y1;
+		w = frame->image.x2 - frame->image.x1;
+		h = frame->image.y2 - frame->image.y1;
+	}
+
+	src = buf + (y * pitch) + (x << 2);
+	switch (frame->rotation) {
+	case RR_Rotate_0:
+		w <<= 2;
+		for (i = 0; i < h; i++) {
+			for (j = 0;j < w; j += 4) {
+				uint32_t reverse_dw, dw = *((uint32_t*)(&src[i * frame->pitch[0] + j]));
+				if (!video->textured) {
+					/* For textured we do byte reversing in shader */
+					reverse_dw = 0;
+					reverse_dw |= ((dw & 0x000000ff) << 24);
+					reverse_dw |= ((dw & 0x0000ff00) << 8);
+					reverse_dw |= ((dw & 0x00ff0000) >> 8);
+					reverse_dw |= (dw >> 24);
+				}
+				else
+					reverse_dw = dw;
+				*((uint32_t*)&dst[i * frame->pitch[0] + j]) = reverse_dw;
+			}
+		}
+		break;
+	case RR_Rotate_90:
+		h <<= 2;
+		for (i = 0; i < h; i += 4) {
+			for (j = 0;j < w; j++) {
+				uint32_t reverse_dw, dw;
+				dw = 0;
+				dw |= (src[i * frame->pitch[0] + j]);
+				dw |= ((uint32_t)src[(i + 1) * frame->pitch[0] + j] << 8);
+				dw |= ((uint32_t)src[(i + 2) * frame->pitch[0] + j] << 16);
+				dw |= ((uint32_t)src[(i + 3) * frame->pitch[0] + j] << 24);
+				if (!video->textured) {
+					/* For textured we do byte reversing in shader */
+					reverse_dw = 0;
+					reverse_dw |= ((dw & 0x000000ff) << 24);
+					reverse_dw |= ((dw & 0x0000ff00) << 8);
+					reverse_dw |= ((dw & 0x00ff0000) >> 8);
+					reverse_dw |= (dw >> 24);
+				}
+				else
+					reverse_dw = dw;
+				*((uint32_t*)&dst[(w - j - 1) * h + i]) = reverse_dw;
+			}
+		}
+		break;
+	case RR_Rotate_180:
+		w <<= 2;
+		for (i = 0; i < h; i++) {
+			for (j = 0;j < w; j += 4) {
+				uint32_t reverse_dw, dw;
+				dw = 0;
+				dw |= (src[i * frame->pitch[0] + j + 3]);
+				dw |= ((uint32_t)src[i * frame->pitch[0] + j + 2] << 8);
+				dw |= ((uint32_t)src[i * frame->pitch[0] + j + 1] << 16);
+				dw |= ((uint32_t)src[i * frame->pitch[0]] << 24);
+				if (!video->textured) {
+					/* For textured we do byte reversing in shader */
+					reverse_dw = 0;
+					reverse_dw |= ((dw & 0x000000ff) << 24);
+					reverse_dw |= ((dw & 0x0000ff00) << 8);
+					reverse_dw |= ((dw & 0x00ff0000) >> 8);
+					reverse_dw |= (dw >> 24);
+				}
+				else
+					reverse_dw = dw;
+				*((uint32_t*)&dst[(h - i - 1) * w + (w - j - 4)]) = reverse_dw;
+			}
+		}
+		break;
+	case RR_Rotate_270:
+		h <<= 2;
+		for (i = 0; i < h; i += 4) {
+			for (j = 0; j < w; j++) {
+				uint32_t reverse_dw, dw;
+				dw = 0;
+				dw |= (src[(i + 3) * frame->pitch[0] + j]);
+				dw |= ((uint32_t)src[(i + 2) * frame->pitch[0] + j] << 8);
+				dw |= ((uint32_t)src[(i + 1) * frame->pitch[0] + j] << 16);
+				dw |= ((uint32_t)src[i * frame->pitch[0] + j] << 24);
+				if (!video->textured) {
+					/* For textured we do byte reversing in shader */
+					reverse_dw = 0;
+					reverse_dw |= ((dw & 0x000000ff) << 24);
+					reverse_dw |= ((dw & 0x0000ff00) << 8);
+					reverse_dw |= ((dw & 0x00ff0000) >> 8);
+					reverse_dw |= (dw >> 24);
+				}
+				else
+					reverse_dw = dw;
+				*((uint32_t*)&dst[j * h + (h - i - 4)]) = reverse_dw;
+			}
+		}
+		break;
+	}
+}
+
 bool
 sna_video_copy_data(struct sna_video *video,
 		    struct sna_video_frame *frame,
@@ -709,6 +829,9 @@ use_gtt: /* copy data, must use GTT so that we keep the overlay uncached */
 		sna_copy_nv12_data(video, frame, buf, dst);
 	else if (is_planar_fourcc(frame->id))
 		sna_copy_planar_data(video, frame, buf, dst);
+	else if (is_ayuv_fourcc(frame->id))
+		/* Some hardcoding is done in default sna_copy_packed_data, so added a specific function */
+		sna_copy_packed_data_ayuv(video, frame, buf, dst);
 	else
 		sna_copy_packed_data(video, frame, buf, dst);
 
diff --git a/src/sna/sna_video.h b/src/sna/sna_video.h
index bbd3f0fd..d18c79e5 100644
--- a/src/sna/sna_video.h
+++ b/src/sna/sna_video.h
@@ -39,6 +39,7 @@ THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #define FOURCC_RGB565 ((16 << 24) + ('B' << 16) + ('G' << 8) + 'R')
 #define FOURCC_RGB888 ((24 << 24) + ('B' << 16) + ('G' << 8) + 'R')
 #define FOURCC_NV12 (('2' << 24) + ('1' << 16) + ('V' << 8) + 'N')
+#define FOURCC_AYUV (('V' << 24) + ('U' << 16) + ('Y' << 8) + 'A')
 
 /*
  * Below, a dummy picture type that is used in XvPutImage
@@ -79,6 +80,15 @@ THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 	XvTopToBottom \
 }
 
+#define XVIMAGE_AYUV { \
+	FOURCC_AYUV, XvYUV, LSBFirst, \
+	{'P', 'A', 'S', 'S', 'T', 'H', 'R', 'O', 'U', 'G', 'H', ' ', 'A', 'Y', 'U', 'V'}, \
+	32, XvPacked, 1, 24, 0xff<<16, 0xff<<8, 0xff<<0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
+	{'V', 'U', 'Y', 'X', 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, \
+	XvTopToBottom \
+}
+
+
 struct sna_video {
 	struct sna *sna;
 
@@ -189,6 +199,16 @@ static inline int is_nv12_fourcc(int id)
 	}
 }
 
+static inline int is_ayuv_fourcc(int id)
+{
+	switch (id) {
+	case FOURCC_AYUV:
+		return 1;
+	default:
+		return 0;
+	}
+}
+
 bool
 sna_video_clip_helper(struct sna_video *video,
 		      struct sna_video_frame *frame,
diff --git a/src/sna/sna_video_sprite.c b/src/sna/sna_video_sprite.c
index 8b7ae8ae..b6882195 100644
--- a/src/sna/sna_video_sprite.c
+++ b/src/sna/sna_video_sprite.c
@@ -47,7 +47,7 @@
 #define DRM_FORMAT_YUYV         fourcc_code('Y', 'U', 'Y', 'V') /* [31:0] Cr0:Y1:Cb0:Y0 8:8:8:8 little endian */
 #define DRM_FORMAT_UYVY         fourcc_code('U', 'Y', 'V', 'Y') /* [31:0] Y1:Cr0:Y0:Cb0 8:8:8:8 little endian */
 #define DRM_FORMAT_NV12         fourcc_code('N', 'V', '1', '2') /* 2x2 subsampled Cr:Cb plane */
-
+#define DRM_FORMAT_XYUV         fourcc_code('X', 'Y', 'U', 'V') /* 2x2 subsampled Cr:Cb plane */
 #define has_hw_scaling(sna, video) ((sna)->kgem.gen < 071 || \
 				    (sna)->kgem.gen >= 0110)
 
@@ -74,11 +74,11 @@ static Atom xvColorKey, xvAlwaysOnTop, xvSyncToVblank, xvColorspace;
 
 static XvFormatRec formats[] = { {15}, {16}, {24} };
 static const XvImageRec images[] = { XVIMAGE_YUY2, XVIMAGE_UYVY,
-				     XVMC_RGB888 };
+				     XVMC_RGB888, XVIMAGE_AYUV };
 static const XvImageRec images_rgb565[] = { XVIMAGE_YUY2, XVIMAGE_UYVY,
-					    XVMC_RGB888, XVMC_RGB565 };
+					    XVMC_RGB888, XVMC_RGB565, XVIMAGE_AYUV };
 static const XvImageRec images_nv12[] = { XVIMAGE_YUY2, XVIMAGE_UYVY,
-					  XVIMAGE_NV12, XVMC_RGB888, XVMC_RGB565 };
+					  XVIMAGE_NV12, XVMC_RGB888, XVMC_RGB565, XVIMAGE_AYUV };
 static const XvAttributeRec attribs[] = {
 	{ XvSettable | XvGettable, 0, 1, (char *)"XV_COLORSPACE" }, /* BT.601, BT.709 */
 	{ XvSettable | XvGettable, 0, 0xffffff, (char *)"XV_COLORKEY" },
@@ -364,6 +364,10 @@ sna_video_sprite_show(struct sna *sna,
 		case FOURCC_UYVY:
 			f.pixel_format = DRM_FORMAT_UYVY;
 			break;
+		case FOURCC_AYUV:
+			/* i915 doesn't support alpha, so we use XYUV */
+			f.pixel_format = DRM_FORMAT_XYUV;
+			break;
 		case FOURCC_YUY2:
 		default:
 			f.pixel_format = DRM_FORMAT_YUYV;
@@ -705,7 +709,12 @@ static int sna_video_sprite_query(ddQueryImageAttributes_ARGS)
 		tmp *= (*h >> 1);
 		size += tmp;
 		break;
-
+	case FOURCC_AYUV:
+		tmp = *w << 2;
+		if (pitches)
+			pitches[0] = tmp;
+		size = *h * tmp;
+		break;
 	default:
 		*w = (*w + 1) & ~1;
 		*h = (*h + 1) & ~1;
diff --git a/src/sna/sna_video_textured.c b/src/sna/sna_video_textured.c
index a784fe2e..21c5f379 100644
--- a/src/sna/sna_video_textured.c
+++ b/src/sna/sna_video_textured.c
@@ -68,6 +68,8 @@ static const XvImageRec gen4_Images[] = {
 	XVIMAGE_I420,
 	XVIMAGE_NV12,
 	XVIMAGE_UYVY,
+	XVIMAGE_AYUV,
+	XVMC_RGB888,
 	XVMC_YUV,
 };
 
@@ -337,6 +339,12 @@ sna_video_textured_query(ddQueryImageAttributes_ARGS)
 			pitches[0] = size;
 		size *= *h;
 		break;
+	case FOURCC_AYUV:
+		size = *w << 2;
+		if (pitches)
+			pitches[0] = size;
+		size *= *h;
+		break;
 	case FOURCC_XVMC:
 		*h = (*h + 1) & ~1;
 		size = sizeof(uint32_t);
-- 
2.17.1

_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* Re: [PATCH xf86-video-intel v1] sna: Added AYUV format support for textured and sprite video adapters.
  2018-10-02  9:38 [PATCH xf86-video-intel v1] sna: Added AYUV format support for textured and sprite video adapters Stanislav Lisovskiy
@ 2018-10-03 11:29 ` Chris Wilson
  2018-10-03 12:28   ` Ville Syrjälä
  2018-10-03 13:17   ` Lisovskiy, Stanislav
  0 siblings, 2 replies; 6+ messages in thread
From: Chris Wilson @ 2018-10-03 11:29 UTC (permalink / raw)
  To: Stanislav Lisovskiy, intel-gfx
  Cc: ville.syrjala, martin.peres, juha-pekka.heikkila

Quoting Stanislav Lisovskiy (2018-10-02 10:38:53)
> diff --git a/src/sna/sna_render.h b/src/sna/sna_render.h
> index 6669af9d..ef88d1f9 100644
> --- a/src/sna/sna_render.h
> +++ b/src/sna/sna_render.h
> @@ -139,20 +139,25 @@ struct sna_composite_op {
>  
>                 struct {
>                         uint32_t flags;
> +                       uint8_t wm_kernel;
>                 } gen6;
>  
>                 struct {
>                         uint32_t flags;
> +                       uint8_t wm_kernel;
>                 } gen7;
>  
>                 struct {
>                         uint32_t flags;
> +                       uint8_t wm_kernel;
>                 } gen8;
>  
>                 struct {
>                         uint32_t flags;
> +                       uint8_t wm_kernel;
>                 } gen9;
>         } u;
> +       unsigned long gen9_kernel;

Do you want to try again without the surplus changes? Maybe ask Ville
for his patches to base your work on?
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH xf86-video-intel v1] sna: Added AYUV format support for textured and sprite video adapters.
  2018-10-03 11:29 ` Chris Wilson
@ 2018-10-03 12:28   ` Ville Syrjälä
  2018-10-03 12:34     ` Chris Wilson
  2018-10-03 13:17   ` Lisovskiy, Stanislav
  1 sibling, 1 reply; 6+ messages in thread
From: Ville Syrjälä @ 2018-10-03 12:28 UTC (permalink / raw)
  To: Chris Wilson; +Cc: intel-gfx, ville.syrjala, martin.peres, juha-pekka.heikkila

On Wed, Oct 03, 2018 at 12:29:53PM +0100, Chris Wilson wrote:
> Quoting Stanislav Lisovskiy (2018-10-02 10:38:53)
> > diff --git a/src/sna/sna_render.h b/src/sna/sna_render.h
> > index 6669af9d..ef88d1f9 100644
> > --- a/src/sna/sna_render.h
> > +++ b/src/sna/sna_render.h
> > @@ -139,20 +139,25 @@ struct sna_composite_op {
> >  
> >                 struct {
> >                         uint32_t flags;
> > +                       uint8_t wm_kernel;
> >                 } gen6;
> >  
> >                 struct {
> >                         uint32_t flags;
> > +                       uint8_t wm_kernel;
> >                 } gen7;
> >  
> >                 struct {
> >                         uint32_t flags;
> > +                       uint8_t wm_kernel;
> >                 } gen8;
> >  
> >                 struct {
> >                         uint32_t flags;
> > +                       uint8_t wm_kernel;
> >                 } gen9;
> >         } u;
> > +       unsigned long gen9_kernel;
> 
> Do you want to try again without the surplus changes? Maybe ask Ville
> for his patches to base your work on?

Unfortunaltely I still haven't managed to figure out why chrome
becomes a bit hangy on my ivb when I start to emit
3DSTATE_CONSTANT_* in the ddx.

The error state is somewhat peculiar BTW. It always hangs at the
start of a batch like so:

  ACTHD: 0x00000000 00efa014

batch (rcs0 (submitted by chrome [23031], ctx 2 [5], score 0)) at 0x00000000_00efa000
0x00efa000:      0x7a000003: PIPE_CONTROL
0x00efa004:      0x00105021:    qword write, cs stall, render target cache flush, DC flush, depth cache flush, 
0x00efa008:      0x00000000:    destination address
0x00efa00c:      0x00000000:    immediate dword low
0x00efa010:      0x00000000:    immediate dword high
0x00efa014:      0x61010008: STATE_BASE_ADDRESS
0x00efa018:      0x00000111:    general state base address 0x00000110
0x00efa01c:      0x00001001:    surface state base address 0x00001000
0x00efa020:      0x00001001:    dynamic state base address 0x00001000
0x00efa024:      0x00000001:    indirect state base address 0x00000000
0x00efa028:      0x00005001:    instruction state base address 0x00005000
0x00efa02c:      0x00000001:    general state upper bound disabled
0x00efa030:      0xfffff001:    dynamic state upper bound 0xfffff000
0x00efa034:      0x00000001:    indirect state upper bound disabled
0x00efa038:      0x00000001:    instruction state upper bound disabled
0x00efa03c:      0x7a000003: PIPE_CONTROL
0x00efa040:      0x00000c04:    no write, instruction cache invalidate, texture cache invalidate, state cache invalida>
0x00efa044:      0x00000000:    destination address
0x00efa048:      0x00000000:    immediate dword low
0x00efa04c:      0x00000000:    immediate dword high

No idea why there's an end of pipe flush as the first thing in the batch,
and no idea how that could possibly hang due to stuff that was done in
another batch/context.

-- 
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH xf86-video-intel v1] sna: Added AYUV format support for textured and sprite video adapters.
  2018-10-03 12:28   ` Ville Syrjälä
@ 2018-10-03 12:34     ` Chris Wilson
  2018-10-03 13:38       ` Ville Syrjälä
  0 siblings, 1 reply; 6+ messages in thread
From: Chris Wilson @ 2018-10-03 12:34 UTC (permalink / raw)
  To: Ville Syrjälä
  Cc: intel-gfx, ville.syrjala, martin.peres, juha-pekka.heikkila

Quoting Ville Syrjälä (2018-10-03 13:28:30)
> On Wed, Oct 03, 2018 at 12:29:53PM +0100, Chris Wilson wrote:
> > Quoting Stanislav Lisovskiy (2018-10-02 10:38:53)
> > > diff --git a/src/sna/sna_render.h b/src/sna/sna_render.h
> > > index 6669af9d..ef88d1f9 100644
> > > --- a/src/sna/sna_render.h
> > > +++ b/src/sna/sna_render.h
> > > @@ -139,20 +139,25 @@ struct sna_composite_op {
> > >  
> > >                 struct {
> > >                         uint32_t flags;
> > > +                       uint8_t wm_kernel;
> > >                 } gen6;
> > >  
> > >                 struct {
> > >                         uint32_t flags;
> > > +                       uint8_t wm_kernel;
> > >                 } gen7;
> > >  
> > >                 struct {
> > >                         uint32_t flags;
> > > +                       uint8_t wm_kernel;
> > >                 } gen8;
> > >  
> > >                 struct {
> > >                         uint32_t flags;
> > > +                       uint8_t wm_kernel;
> > >                 } gen9;
> > >         } u;
> > > +       unsigned long gen9_kernel;
> > 
> > Do you want to try again without the surplus changes? Maybe ask Ville
> > for his patches to base your work on?
> 
> Unfortunaltely I still haven't managed to figure out why chrome
> becomes a bit hangy on my ivb when I start to emit
> 3DSTATE_CONSTANT_* in the ddx.
> 
> The error state is somewhat peculiar BTW. It always hangs at the
> start of a batch like so:
> 
>   ACTHD: 0x00000000 00efa014
> 
> batch (rcs0 (submitted by chrome [23031], ctx 2 [5], score 0)) at 0x00000000_00efa000
> 0x00efa000:      0x7a000003: PIPE_CONTROL
> 0x00efa004:      0x00105021:    qword write, cs stall, render target cache flush, DC flush, depth cache flush, 
> 0x00efa008:      0x00000000:    destination address
> 0x00efa00c:      0x00000000:    immediate dword low
> 0x00efa010:      0x00000000:    immediate dword high
> 0x00efa014:      0x61010008: STATE_BASE_ADDRESS
> 0x00efa018:      0x00000111:    general state base address 0x00000110
> 0x00efa01c:      0x00001001:    surface state base address 0x00001000
> 0x00efa020:      0x00001001:    dynamic state base address 0x00001000
> 0x00efa024:      0x00000001:    indirect state base address 0x00000000
> 0x00efa028:      0x00005001:    instruction state base address 0x00005000
> 0x00efa02c:      0x00000001:    general state upper bound disabled
> 0x00efa030:      0xfffff001:    dynamic state upper bound 0xfffff000
> 0x00efa034:      0x00000001:    indirect state upper bound disabled
> 0x00efa038:      0x00000001:    instruction state upper bound disabled
> 0x00efa03c:      0x7a000003: PIPE_CONTROL
> 0x00efa040:      0x00000c04:    no write, instruction cache invalidate, texture cache invalidate, state cache invalida>
> 0x00efa044:      0x00000000:    destination address
> 0x00efa048:      0x00000000:    immediate dword low
> 0x00efa04c:      0x00000000:    immediate dword high
> 
> No idea why there's an end of pipe flush as the first thing in the batch,
> and no idea how that could possibly hang due to stuff that was done in
> another batch/context.

Yeah, that is suspect. :|

Waitasec qword write to 0? That seems fishy.
-Chris
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Intel-gfx@lists.freedesktop.org
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^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH xf86-video-intel v1] sna: Added AYUV format support for textured and sprite video adapters.
  2018-10-03 11:29 ` Chris Wilson
  2018-10-03 12:28   ` Ville Syrjälä
@ 2018-10-03 13:17   ` Lisovskiy, Stanislav
  1 sibling, 0 replies; 6+ messages in thread
From: Lisovskiy, Stanislav @ 2018-10-03 13:17 UTC (permalink / raw)
  To: intel-gfx, chris; +Cc: Syrjala, Ville, Heikkila, Juha-pekka, Peres, Martin

On Wed, 2018-10-03 at 12:29 +0100, Chris Wilson wrote:
> Quoting Stanislav Lisovskiy (2018-10-02 10:38:53)
> > diff --git a/src/sna/sna_render.h b/src/sna/sna_render.h
> > index 6669af9d..ef88d1f9 100644
> > --- a/src/sna/sna_render.h
> > +++ b/src/sna/sna_render.h
> > @@ -139,20 +139,25 @@ struct sna_composite_op {
> >  
> >                 struct {
> >                         uint32_t flags;
> > +                       uint8_t wm_kernel;
> >                 } gen6;
> >  
> >                 struct {
> >                         uint32_t flags;
> > +                       uint8_t wm_kernel;
> >                 } gen7;
> >  
> >                 struct {
> >                         uint32_t flags;
> > +                       uint8_t wm_kernel;
> >                 } gen8;
> >  
> >                 struct {
> >                         uint32_t flags;
> > +                       uint8_t wm_kernel;
> >                 } gen9;
> >         } u;
> > +       unsigned long gen9_kernel;
> 
> Do you want to try again without the surplus changes? Maybe ask Ville
> for his patches to base your work on?
> -Chris

Yep, I took part of Ville's patch for the flags issue, required for
gen9+.

-- 
Best Regards,

Lisovskiy Stanislav
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH xf86-video-intel v1] sna: Added AYUV format support for textured and sprite video adapters.
  2018-10-03 12:34     ` Chris Wilson
@ 2018-10-03 13:38       ` Ville Syrjälä
  0 siblings, 0 replies; 6+ messages in thread
From: Ville Syrjälä @ 2018-10-03 13:38 UTC (permalink / raw)
  To: Chris Wilson; +Cc: intel-gfx, ville.syrjala, martin.peres, juha-pekka.heikkila

[-- Attachment #1: Type: text/plain, Size: 3712 bytes --]

On Wed, Oct 03, 2018 at 01:34:47PM +0100, Chris Wilson wrote:
> Quoting Ville Syrjälä (2018-10-03 13:28:30)
> > On Wed, Oct 03, 2018 at 12:29:53PM +0100, Chris Wilson wrote:
> > > Quoting Stanislav Lisovskiy (2018-10-02 10:38:53)
> > > > diff --git a/src/sna/sna_render.h b/src/sna/sna_render.h
> > > > index 6669af9d..ef88d1f9 100644
> > > > --- a/src/sna/sna_render.h
> > > > +++ b/src/sna/sna_render.h
> > > > @@ -139,20 +139,25 @@ struct sna_composite_op {
> > > >  
> > > >                 struct {
> > > >                         uint32_t flags;
> > > > +                       uint8_t wm_kernel;
> > > >                 } gen6;
> > > >  
> > > >                 struct {
> > > >                         uint32_t flags;
> > > > +                       uint8_t wm_kernel;
> > > >                 } gen7;
> > > >  
> > > >                 struct {
> > > >                         uint32_t flags;
> > > > +                       uint8_t wm_kernel;
> > > >                 } gen8;
> > > >  
> > > >                 struct {
> > > >                         uint32_t flags;
> > > > +                       uint8_t wm_kernel;
> > > >                 } gen9;
> > > >         } u;
> > > > +       unsigned long gen9_kernel;
> > > 
> > > Do you want to try again without the surplus changes? Maybe ask Ville
> > > for his patches to base your work on?
> > 
> > Unfortunaltely I still haven't managed to figure out why chrome
> > becomes a bit hangy on my ivb when I start to emit
> > 3DSTATE_CONSTANT_* in the ddx.
> > 
> > The error state is somewhat peculiar BTW. It always hangs at the
> > start of a batch like so:
> > 
> >   ACTHD: 0x00000000 00efa014
> > 
> > batch (rcs0 (submitted by chrome [23031], ctx 2 [5], score 0)) at 0x00000000_00efa000
> > 0x00efa000:      0x7a000003: PIPE_CONTROL
> > 0x00efa004:      0x00105021:    qword write, cs stall, render target cache flush, DC flush, depth cache flush, 
> > 0x00efa008:      0x00000000:    destination address
> > 0x00efa00c:      0x00000000:    immediate dword low
> > 0x00efa010:      0x00000000:    immediate dword high
> > 0x00efa014:      0x61010008: STATE_BASE_ADDRESS
> > 0x00efa018:      0x00000111:    general state base address 0x00000110
> > 0x00efa01c:      0x00001001:    surface state base address 0x00001000
> > 0x00efa020:      0x00001001:    dynamic state base address 0x00001000
> > 0x00efa024:      0x00000001:    indirect state base address 0x00000000
> > 0x00efa028:      0x00005001:    instruction state base address 0x00005000
> > 0x00efa02c:      0x00000001:    general state upper bound disabled
> > 0x00efa030:      0xfffff001:    dynamic state upper bound 0xfffff000
> > 0x00efa034:      0x00000001:    indirect state upper bound disabled
> > 0x00efa038:      0x00000001:    instruction state upper bound disabled
> > 0x00efa03c:      0x7a000003: PIPE_CONTROL
> > 0x00efa040:      0x00000c04:    no write, instruction cache invalidate, texture cache invalidate, state cache invalida>
> > 0x00efa044:      0x00000000:    destination address
> > 0x00efa048:      0x00000000:    immediate dword low
> > 0x00efa04c:      0x00000000:    immediate dword high
> > 
> > No idea why there's an end of pipe flush as the first thing in the batch,
> > and no idea how that could possibly hang due to stuff that was done in
> > another batch/context.
> 
> Yeah, that is suspect. :|
> 
> Waitasec qword write to 0? That seems fishy.

Yeah that one looked a bit odd to me as well, however looks like there
is something there:

Active (rcs0) [18]:
    00000000_03085000    20480 3f 00 00 dirty LLC
    00000000_00000000     4096 3e 02 00 dirty LLC

Full error state attached, in case you're curious about other details.

-- 
Ville Syrjälä
Intel

[-- Attachment #2: chrome.error --]
[-- Type: text/plain, Size: 34307 bytes --]

GPU HANG: ecode 7:0:0x85fffffc, in chrome [23031], reason: hang on rcs0, action: reset
Kernel: 4.18.0+
Time: 1538323109 s 571333 us
Boottime: 1207910 s 429320 us
Uptime: 7617 s 917098 us
Epoch: 4524289216 jiffies (300 HZ)
Capture: 4524291008 jiffies; 26767 ms ago, 5974 ms after epoch
Active process (on ring rcs0): chrome [23031], score 0
Reset count: 3
Suspend count: 27
Platform: IVYBRIDGE
PCI ID: 0x0166
PCI Revision: 0x09
PCI Subsystem: 17aa:21f9
IOMMU enabled?: -1
GT awake: yes
RPM wakelock: yes
PM suspended: no
EIR: 0x00000000
IER: 0xfc000421
GTIER[0]: 0x00401021
PGTBL_ER: 0x00000000
FORCEWAKE: 0x00010001
DERRMR: 0xffffffff
CCID: 0x7fff410d
Missed interrupts: 0x00000000
  fence[0] = 216c009020eb003
  fence[1] = 00000000
  fence[2] = 28f9009027f6003
  fence[3] = 00000000
  fence[4] = 00000000
  fence[5] = 20ea00901fe7003
  fence[6] = 1fe600901f65003
  fence[7] = 00000000
  fence[8] = 00000000
  fence[9] = 1e6006f00f9d001
  fence[10] = 00000000
  fence[11] = 00000000
  fence[12] = 00000000
  fence[13] = 23f600902375003
  fence[14] = 22700090216d003
  fence[15] = 00000000
  fence[16] = 00000000
  fence[17] = 1f6400901e61003
  fence[18] = 00000000
  fence[19] = 22f200902271003
  fence[20] = 00000000
  fence[21] = f7f00900efe003
  fence[22] = 27f5009026f2003
  fence[23] = 00000000
  fence[24] = 00000000
  fence[25] = 00000000
  fence[26] = 00000000
  fence[27] = 2374009022f3003
  fence[28] = ef300900df0003
  fence[29] = 00000000
  fence[30] = 00000000
  fence[31] = 00000000
ERROR: 0x00000000
DONE_REG: 0xffffffff
ERR_INT: 0x00000000
rcs0 command stream:
  IDLE?: no
  START: 0x00580000
  HEAD:  0x89c01bf0 [0x00001b50]
  TAIL:  0x00002138 [0x00001c00, 0x00001c28]
  CTL:   0x0001f001
  MODE:  0x00004000
  HWS:   0x7fffc000
  ACTHD: 0x00000000 00efa014
  IPEIR: 0x00000000
  IPEHR: 0x7a000003
  INSTDONE: 0xffffffff
  SC_INSTDONE: 0xffffffbf
  SAMPLER_INSTDONE[0][0]: 0xffffffff
  ROW_INSTDONE[0][0]: 0xffffffff
  batch: [0x00000000_00efa000, 0x00000000_00efb000]
  BBADDR: 0x00000000_00efa015
  BB_STATE: 0x00000000
  INSTPS: 0x8000020b
  INSTPM: 0x00000080
  FADDR: 0x00000000 00efa200
  RC PSMI: 0x00000010
  FAULT_REG: 0x00000000
  SYNC_0: 0x00000020
  SYNC_1: 0x001f3dd5
  GFX_MODE: 0x00002a00
  PP_DIR_BASE: 0x009f0000
  seqno: 0x035104f7
  last_seqno: 0x035104fe
  waiting: yes
  ring->head: 0x00001b28
  ring->tail: 0x00002138
  hangcheck stall: yes
  hangcheck action: dead
  hangcheck action timestamp: 0ms (4524289216; epoch)
  engine reset count: 0
  Active context: chrome[23031] user_handle 2 hw_id 5, prio 0, ban score 0 guilty 0 active 0
bcs0 command stream:
  IDLE?: yes
  START: 0x005a0000
  HEAD:  0x010054c8 [0x00000000]
  TAIL:  0x000054c8 [0x00000000, 0x00000000]
  CTL:   0x0001f001
  MODE:  0x00000200
  HWS:   0x7fffa000
  ACTHD: 0x00000000 010054c8
  IPEIR: 0x00000000
  IPEHR: 0x01000000
  INSTDONE: 0xfffffffe
  BBADDR: 0x00000000_00b470d0
  BB_STATE: 0x00000000
  INSTPS: 0x00000000
  INSTPM: 0x00000000
  FADDR: 0x00000000 005a54c8
  RC PSMI: 0x00000010
  FAULT_REG: 0x00000000
  SYNC_0: 0x035104f7
  SYNC_1: 0x00000020
  GFX_MODE: 0x00000200
  PP_DIR_BASE: 0x005e0000
  seqno: 0x001f3dd5
  last_seqno: 0x001f3dd5
  waiting: no
  ring->head: 0x00000000
  ring->tail: 0x00000000
  hangcheck stall: no
  hangcheck action: idle
  hangcheck action timestamp: 5974ms (4524291008)
  engine reset count: 0
  Active context: [0] user_handle 0 hw_id 0, prio 0, ban score 0 (unbannable) guilty 0 active 0
vcs0 command stream:
  IDLE?: yes
  START: 0x005c0000
  HEAD:  0x00000150 [0x00000000]
  TAIL:  0x00000150 [0x00000000, 0x00000000]
  CTL:   0x0001f001
  MODE:  0x00000200
  HWS:   0x7fff8000
  ACTHD: 0x00000000 00000150
  IPEIR: 0x00000000
  IPEHR: 0x00000000
  INSTDONE: 0xfffffffe
  BBADDR: 0x00000000_00000000
  BB_STATE: 0x00000000
  INSTPS: 0x00000000
  INSTPM: 0x00000000
  FADDR: 0x00000000 005c0150
  RC PSMI: 0x00000010
  FAULT_REG: 0x00000000
  SYNC_0: 0x001f3dd5
  SYNC_1: 0x035104f7
  GFX_MODE: 0x00000200
  PP_DIR_BASE: 0x7fdf0000
  seqno: 0x00000020
  last_seqno: 0x00000020
  waiting: no
  ring->head: 0x00000000
  ring->tail: 0x00000000
  hangcheck stall: no
  hangcheck action: idle
  hangcheck action timestamp: 5974ms (4524291008)
  engine reset count: 0
  Active context: [0] user_handle 0 hw_id 0, prio 0, ban score 0 (unbannable) guilty 0 active 0
Active (rcs0) [18]:
    00000000_03085000    20480 3f 00 00 dirty LLC
    00000000_00000000     4096 3e 02 00 dirty LLC
    00000000_00001000    16384 3f 00 00 dirty purgeable LLC
    00000000_00005000    16384 3f 00 00 dirty LLC
    00000000_01445000  8388608 3e 02 00 X dirty LLC
    00000000_02af6000  1048576 7e 00 00 Y dirty LLC
    00000000_0380c000   524288 7e 00 00 Y dirty LLC
    00000000_039fb000  8388608 3e 02 00 Y dirty LLC
    00000000_00c45000  1048576 3e 02 00 Y dirty LLC
    00000000_0360c000  2097152 3e 02 00 dirty LLC
    00000000_0001f000     4096 3f 00 00 dirty LLC
    00000000_00020000     4096 3f 00 00 dirty LLC
    00000000_03076000    20480 3f 00 00 dirty LLC
    00000000_03080000    20480 3f 00 00 dirty LLC
    00000000_0000d000    16384 3f 00 00 dirty purgeable LLC
    00000000_02c76000  1048576 7e 00 00 Y dirty LLC
    00000000_02d76000   524288 7e 00 00 Y dirty LLC
    00000000_0307b000    20480 3f 00 00 dirty LLC
Pinned (global) [4]:
    00000000_00580000   131072 41 00 00 dirty LLC
    00000000_7ffff000     4096 41 00 00 LLC
    00000000_7fffd000     8192 41 00 00 dirty L3+LLC
    00000000_7fffc000     4096 41 00 00 purgeable LLC
rcs0 (submitted by chrome [23031], ctx 2 [5], score 0) --- gtt_offset = 0x00000000 00efa000
:Q&M5X79jM%Z[^"8AQ^s1D6.)YDNdXNWlDK1nUf:KLTira\#ocP&skNsm%3.6Er$j0*o"W3GchAu6$*kKYG>Ec)f)ft-qh?c5u1,\Z4@]_HgC#4Rm4XYk\"fmQuDE.55tHJr8.$$34^9QDeX>k**A@S`PP"U<>-9(WYfWlaIN2Ger_VT`C4=7GcBp6\>q5UnQ0$mnKJ[W/F>#eT]nbhD0-pc8#5EP4%4tZb7;p16Hf3FMTS^r?Bee0o6gS@G^i?H-.,!("UCrfo.i0A.p(:Y4DI^>S3I\0J,F$Q8P_i.';Q_m6?Sng<-1`f@VnQFF:-EVib(;;EFdNYCfBJV/Y6-l&+25O,6gS5N)[!#>nW_.K#GGFIfJp_WVtj[Gb`$LjOW3^"YP3`=3ZaCe%,.M]=[RG:hV**QAckkqM<s5(YgbJ,FX8X4VKIs0_uI>HlcY_LeLN3"a)+=%XsJ09A*kkEcbKVOV>X"#HN;4-$2b6"[c4G&U@$Dl+*.a,\QF'heO_`UR"#k99aMaCF,s@DeA*JOMY%P)nW8JF;jqr0kd-HWSrS]M^;06Dt_+Y[m**+"'tgW4Mub@SH\0X$TZiQp!e'P(R`8Q`'O@W:3G`iD>/\K#5s(BacG6&E.%7:9f^[oGoC<W$[V(th@%QfmImHl2X/M_#+TP]VZRD+c8&>rB:L&+cGr\&1Z-%5QuIFl8%`XSk?;LQ[2tj^F7<pa$h-:&#MfF3;k4fhnChrgopcK#0)3OmWirntp:m)Fr]$_\h'l\qqCFV@*^Q4TF2#5GZEG,jMLWnMr8r=s>@tX?X8FHnkN<<Z]\n'XFpG"/^QGo6a&AVd^!J6Tq:&KPpDiCrB,a:q""!pQ_;>Q3s#+p*RDIc\2r!L(phcO<DB'+pIIG`mX>AG-3Ss[TkOsCpf29l4TGG:f<Sh*[F!>8c\%^Hh2t38UgZb4;f;tT(]tVu3I&M+d+t:OQ4NthV62mX^U&Js(o/:IZfItdglhGT^=76V'I>-:*;:NgZ_!Sl5Gi3)H]R'Uf'ZWk<T!KbV*,Uc,GPhs>IlMNG5C^6RRF@[*omu<'^VR(Crc$e-c2_<3eGGY,EAqm_kOrioJXl[XS2f?mmpA)9:+8\\Q4R8qQf0DT?fqn'7i0H^:N(@r;i4"$\$`p*j'-k:./75oNrB8j`W8GXb(>+?SG_YZm;q((2Z%=B>t7*aFi*n9?JeS>HW-H[hna)VY./F+;"m=o:38t_b26OC\,WsBs#>)r/cToDUMkQV^UF!,m.fULIlMC+k5[4MfH-n\n*mqL^RR8%On:1!@rJbHUZ$Qf$E"h'k?USB%n(R<qonT#iRW(T*cO&F!!GHo"98B$nn/U9A+73O
rcs0 --- user = 0x00000000 00005000
:=1"KB72p/>G%Z7@NU+LU+DiCkrj+M:*DgE_<:m!o%m[47NE2LIgFl*F<<u#CLam+V6a=ZU'%AC!<ri..<B*l+E^Yp1U^,D[C^8m=:cVRPMW.((ah5>q!@8qmO%5PAg#$CSRJ3:sQkRs#Vh-c1=>[<2?$OHKa&.5NYHNRsUhp,Acl<)TqB=AVr7G(E=&/oYNd:QTjJIA'Dlo4Gf>.'8A$<7P_WkRQXSi)ILNUsuKE*U@[^sKVWeOb^@I`e+`N-?D6;PT=#a:>WVB%8X3r,$nj5?1b.Ii6:i;'N>W0(c1E!?O>"3$IpE"2`8:WE23:RYubosXCqX<,5)*:[?Nh>)l.[OHP$.;`DKKD=?<gAmG/M`9MtZd"rN"lG,!7ubb8.W0"rB&m=9rVO7=P5EpVj(;OSf=1KjB1k-hmt>7UPHdoPI=-tVgV33+-_B?0+F9sFcF<SbONkLAlq[>+opJ"X1O#;ocOe-LcRb:/ReZd==-<N/j:GBRIOhCsF%Pu%%;2ERpH*$,C+PVl/'[s[/_p`^>X(Q!T@1;h*s+,^7LbgcFJEO2h>DX%E*Gho$'Yu3enQC$cs-i1lj;5g57pheoc;Ye3rLRE@,HkHinN5X%t$c((<cLCk4)gto8\3#JB_OkqY/:F/H"N+))1]WCl?Wg>E_9NQ`f$<+$p-aj68mRf59i2e;_o^,@(2f[WIS)96JP!+%!"M%R-3T:_:WiIhY5\3O*Y5HH4BAUZRW9N)r<.MrX)Nq=oDVK?lN.%QG4<4EIH!mh&u%r6_Zh3.q.6Spn*YhgD*WT(-7)kXYR,B7<\'Xm0$RDbAbQXP@W%$l9Q@i_suVgNH#[Qh6m,CY=/;J@DLe@rFsD1S!6:$1i]W`2'etgTcfcM"^61Y!cW<)a+$/4^CBeq@^B+qVo*God%7\EIDrZT/g`eI44.-L+ToP*0;*DDb=6q=.:2nMt_ipFQ).!1pPt.qI]L;*kLel?Deh9>NJMVK4_<M;9^0gR"%2G1jgP>l<I6E)0THbf)VLGZSd-=QFA>CkT;js1;H:_]H9I40u4jXhgArVr`clrnPf;E@&Fns\>0keStJ9%\>(-7?2#X/\;YEg`71hoONg2)g*JG?k3^N]=;$pO$0r5AC3GMll]-;+%0,*AeinimrMoTEQf]=skG\ubNC:,"OKXi5pEfgKGl.'<j6uJ#,`oh7&sK1<>ss$d6/g+*@RTg=hQ\Xa(U"Z;j\pYkScbOU9F+TW,DkDh"sUj:!;XF%&!/tro6"M!;#Z1;<D`Zpr`)eo5Ejo".QRE_EJ^!2%Ca<1HrsGTKlF9:>\l@>iJI)5j!4/;WQ]ajI&kJ=p-)I*rj!'mkPD=:+OFBdri?4]/K>:Tn;7*s&>S3:5u:5AjZ"^=I%m6H&0'9]]F%a+?^Afort4!r7Xi6o,C@?'3?JUC1-UhlE^#VSjF&6sOn=U',NW3T&V19J.r9q0+P@_!1ik%]c:S$kI*(l=r?LgTYHEN-kZ>pjbC"#%`IC9WhB7Gu7E]GD;=%6?IdsW%1]+Kd\aPsYDu?]_Oo/8YQi1"^UOW-:1jT[Z1(SQ\J!;Y%M%cs]TCKLNog^\3s7IgJKAQ%4]52=*gKdqeeg7K!bB8XM(]Dtbbd72iUKK+%QeD!V=S;OsooG_05A9la2#ej$J&BaPorlm53P*?,kO%0R6gP8g*"B+(%WD2CT;6J9InV`GU2p7FHc"C,`jO:_Xdc0ML7YQE:'_e"nQl."k)\\A[@W+DgiP1`Fr<rF5";&0aPEIlJ2\`<J+&D5Hr7L]eGc7/Q[mujj]gmJ>`JB/pt+_\hs!^O8sf-URq5ddAm,)uj_N(&6i&7K3X)ifs,gTu@,'K&)#?50Ir\mAAP;U\!na,'aKEE$2sttkn%j#"Xsq,q%-#n8#6+b)QP]+54_NXerE$CT\K1[>FdGLcf:79-Fd1$Gp*?o-IIH5DD>VE]Yg#<nrK,,KEQV%JJ:1>O>TrO[?C\CTT2^Yu+4E;:D*G/[$WHr,[&\iV0jF+k!h6/B0Hhqe4_6!P16(aHe=?,m!!!!`RI'tR<Es33qsVQ>]^GN]1FE"&EKX"ZCJF8F2JSJO2k;j9?nbH#C5\tT'=rlj:lmLa;OGSS/uIjDGe+F(&REEA#RRcfKFhG'+u+&J`p%'_pUT4Q9[9&rJqUrr3-/[;]Y/d_Hb]Q,]Jc2GFO*=pF+A0`*"D!teqg#:^X=ZVgIM*1Yhbs$s6@M8qr'cI&31_5.=oROnPD4^q"mh5hkTVPn+6/WYR.F^cq\uXFeS'qiC>j0l,3,mU<<5HXg06jr1ZA@-gI#H]S#LH]4e8+ceNdi,QF!$)HA<]X1=P=aqrTEPff69F8a%TXe.aZ4lNcnZWk]s%_0!8>!=P#9:!pWSo+!-ST]b_kEPA/:MoVLr;2b.YJrN4])6%o8$BokZTA"o[j8^I'ro"oP"sWgAo$uIF1(e3YJN6"&adgnr),\,Q1tl9?&h])\0m(j=T2/>hEnDUG$ElfSW^CURD#O+ZbW&G]q0XVSk:YtBq?ZBGfP"ucR?^)4$8a6cOt)aA9pIHDBEM]2U($dm@I>XpMBA[:MfS>YJg6cLaDhHX77??,+YCfngB]?r4a@IPSO!*ESEjBBQF]aj1\TRnR$OhF`M/pMM*V>6=%#e%;6!ITh+uF&h6"7X2Kn!*Bkb.i\`rV2Lo&Y-T(6<;YZ%=+j>B[A7hP`%q9MgicsCQFaUEK.F727oBt7+Zs!'86fgGm>V@4)`">*tINWVDkPU6#qbHr`h'[TL5Pa1qIUkIRN%_[sr?^@bT7<Y`rfA5oF?f!n!ZgJOFIhZ'-gm)bI3:W9+4X9tBU7t1]gkjO7F'?INO4_ZM.*ll6!pF;IZZ5Y.c7&FoS.SScqGB??D=C!f;LJuqS)=ejki'<S.6\1fDb9k?h]8M^YT`mIXCGAoc(HZHM`G>IW:Z"Um:?]G>rgf\t^W+QunJ&:;??:aC/1O@/2tc?>//j:6W0Tra%6LcE^q3>@-iQ_UY7B?`J8Q:AGNXh&[m:.PBR5dsS5[Z6u[&r71[1bDUQ6j!!jf.Y",][hL>6C:<,lpT,:t+MLk-?1GT)Q.8`[bFE*%cEO^$W[fo)>aXQs>2&b,ctDl[$+#7K?1CSdQlY;XW^T2<Er%cuWTU'tC=_Nelt*a4kuHLOg#O*"jc5CDkLNZsOV?j)Z@]4*FOl)!ZQ/6<J[Vq-2MIWd@Yu.hl+?CePtKJPbRqjegA'iTjYQOWq>7oK,$FP0hek+G7J<pqQhe.0__<NUVi/;$[I)/Oqa4OO24>5np8G00T?\5Xr^$(M5ee;&s(\7pC>OC<m#5:)rBRQ/S=BLGVLG6eU?VF;V)m%q*amH%[7os_YF6!"Mlq?(?>2P$(*6l3[%6B[9)hI:;GWJ%cB1lBgcga8",`\ba$BOtk0Bu=Z`8RZK;4_9doNqAfB=%3r@e%J*38XJ_lS87K83EO2?0n#_>4LST?X;5n"(M5+:iF-ecoPIEc]\_/?QJ_L20,J*QL4LdD0T>B&0>1nt3<qJ(uFGI#4ccl$qJ9EV,B+=T;D$n,#KK<49'mpK.<GkFoR-gsXo7A2&8h*[0%Gk%#Os9PRcdIl@mu$iIi!Q[e-n@13"Lhs;?[a,aYtA2B2S?6RkS1T_X1r5*n;mgclQJ"E"A\Dc$j3rZP4Y\N/n*F6Sn*HZ#T%G'QoU\1kghr";1rr<$!!Q+4'!!!!*YQ(8G!f@Te?bcXArr<$!!Q+4'!!!!*YQ(8G!f@Te?bcXArr<$!;ud%#&.G&;
rcs0 --- user = 0x00000000 00001000
:?t,XNfJEdTE%@775@@l-6eGoN2@qLoFEVa/a'o/k*BuW$Ce%q;&.<G(!eH0h%`DHZ3>JG'9PcuLB/A6?c++K=eXk3jWa=<3XF9XE=gtpSDc8fi4\9GhEU4a0@)DA?_Vc!Lc>Ls1-5KtZ:QUCT87aVdTCgH3@h:ca@5O=7>en]GLsD72O9#8SA]+TE#=[Ugna'X1*YXrmJb!<T*&cjX.)AEb@&!lB;1a`@_+"bcUBMJ_$.'Aoz_X.=&!!!<+s.FlBM@o`h^]4?9!!!"+_X.=&!!!<+s.FlBM@o`h^]4?9!!!"+_X.=&!!!<+s.FlBM@o`h^]4?9!!!"+!!E9$,rS\)
rcs0 --- user = 0x00000000 03085000
:;s^$!5f6>Og%CjH@'"q$+@uVJTV)kS9qjqI,*>/W*bn5A84<TqTTChC5mcMJ4;8[mgqYQdO,+gIDQ'LaG)l0ikB"=[g9(F^ORibV!)-go3E#ZARW7NU-)r;h_B5s\',--fEAcP+<[PkJIDjh60m^thW!7DnRsE)[p;*kIq5l<GMuL/Cc<e>qLT=t+M")=P^LH'3BtbcT"Crh&?lnk/5+0I_!4<2<hQJ)BN\cTg_p)!EiNL-K97+/KE9ompIq(&UM^j6B],C!G_S$BKWU['+-0BiuC2#dU'`CW>\P!teI[8*\G$sgB*q;fcXF6W'-1.7+9@^E-VD!&\I*o,6UWfDBs*!,%V\8Mg""2&&dlHn`;W*u9`;*:%Am-DrC?GmsGHOICn=ckgW_3kCC=Rf8`E(t<f)QdccMcukgH?>7e]s!NF0E3X_:QCBQH\JA*#oq=*#oq<*#oq<!$<*Xs8N'!#m%p0J,fQLqlg$m!!8#i!+3MAs8N'!#m%p0J,fQLqlg$m!!8#i!+3MAs8N'!#m%p0J,fQLqlg$m!!8#i!+3MAs8N'!#m%p0J,fQLqlg$m!!8#i!+3MAs8N'!VtC#lC>:@"
rcs0 --- 7 requests
  pid 23031, ban score 0, seqno        5:035104f8, prio -2147483648, emitted 1431654066ms, start 00580000, head 00001b50, tail 00001c28
  pid 23031, ban score 0, seqno        5:035104f9, prio -2147483648, emitted 1431654069ms, start 00580000, head 00001c28, tail 00001d00
  pid 22761, ban score 0, seqno        1:035104fa, prio -2147483648, emitted 1431654079ms, start 00580000, head 00001d00, tail 00001dd8
  pid 22761, ban score 0, seqno        1:035104fb, prio -2147483648, emitted 1431654089ms, start 00580000, head 00001dd8, tail 00001eb0
  pid 23031, ban score 0, seqno        5:035104fc, prio -2147483648, emitted 1431654119ms, start 00580000, head 00001eb0, tail 00001f88
  pid 23031, ban score 0, seqno        5:035104fd, prio -2147483648, emitted 1431654119ms, start 00580000, head 00001f88, tail 00002060
  pid 22761, ban score 0, seqno        1:035104fe, prio -2147483648, emitted 1431654126ms, start 00580000, head 00002060, tail 00002138
rcs0 --- 2 waiters
 seqno 0x035104f9 for chrome [23031]
 seqno 0x035104fb for X [22761]
rcs0 --- ringbuffer = 0x00000000 00580000
:eC:"55f6>Y=l9Jq-H.b#Z5!ubJiP6X#c+:AK5a'l2oHE["+f5nIf'RmJ[d3ppl75bO\3!7p.H9XdG:DH+Kk)Z7=B<&T&X0GK'rte&S,g'8P6ZZ&7,4jU;pOk9^_cgbXWW8e__ab1@(K\8KuGCQg`:Vk5shU;86(MhP\YQ[Vqo4<OlM+[^q,TF.SbZTBd7DRMptOEiNegg\t,Q?%3X-cOX9V/e=:<#<lB7$LH'i.tAAMIs&jmU3Q@d$p)Jq.tSMP^l%Pj@Om!E'u>dqYi[HgDfM;^9&M"9E,_)X.:&=sV/T>B#%?--)-dTQXq"NSF#dJF!j2Q*=*"OM>S=1G"]oak'jM*Kb`MFOXpnh&#;oa))S7hmC>^sg(;m>C>.?.h>Rmq!juU!m4^9&2q[Rq^\hsB/i!jW0l\YTZrr<$<_:-p6(bgORZqFg2@$V<'$"0&*ed5`MJKZ0=n8])%X.P`iB)#!i='\UF28D*(GDJ,l_DT1i*4q(c-S>m6Rc'Y&rY1gZH%4S[?<fV&?*O"<<rfB(L2cSm(2JY?,.L'cQ/#5A-#cK7p7B$Q$X='Hl[k%"\5p4QnQ*/#)-es-g?pMpg>L]CXp&+Lpeb)o<W?q%<H+tsG/r2<E:%W32BCfE9jAUHRCRIV"0Ma/_kBH#LLK#Bs4,#f!!2r_eGoOK_@=]B@>#1G%nITFPR0T3H,PP).62\++VKN`(]:'Ci&Hh%T=F^-m`X['g1RQi_R77gYk0EQY#Ck#XpqNCmE4JVNgt>Y554esI@^9(qrr"5'!;k$FhptY>TC@OPP6[>X?HULWo0o8mP=>IC:J#2QN_-6^sjHGLt0;kX+dePaAo9pnMdu$]XW6+G+.`K>QVD=*J_9nSQm1?5/pnqLT?3C'l[6Tf)XE:hB:DM&Zu_`0-O2q_)f>@.5eq!CAj+$'uDJS_`3"^.lG4%lg/3D\/)Ri03uefrr<$!]@k^6(bgRWOGr-cWrb$g^hdL"9,E0SC&]-!,JFbb^TZ'ci8qf#>Wq(e>2`ZDr\F$ZLR/MnN4:C]CP-:"mh9Jh^ajqD1@c+oXrW2p_-O2a&IJAH'NYRC.tV3une@A*"8?so6`pNomd+N$>UNc(0+W<*0"<ODo3T(`Q,>2EXpW>1_fac/Mflp[<PYj5GmZ%Z<I*_T<Eq#`?-K^m<sGf:LLKWb("L4&]m_a-Xp;*7r+3]7!NlNN*n0o9!!!%Kg!p'%+N"er(=<7!O8Ff>#R#\ZV&l:k6]^H#mV`D=L\:VOQNo,Qkf_UW%k\oL)/rZD'u2J.5N3%.i7d,E1A2F9.th6?>SS!jJld0R`0J.h[DTM(lmoK]"2/ef6`pNoGBrkt>V`g#"c*"Y;-*h%HK`Q)<sl)F>o@T]K^4<[@K.&-e\S;=\h`sn_lJQ!7U-\Y%<*9<&,:mh\1Y9EN4jotFi/F+\1;^>iA[ounP*tk(:Yt=p<W&0!!!"Fg!p'%+G:@^qp@b25ZA;eKt.@P;Ka_\-Ld%6^!H]BE!t8cK7^T:#eb=QROa%mCP-U+fQ1h\*PHPfh6%d$hRY#Lf)aJ("N14I3@f\_?FhHLQ,>,,l_7W)>RItU-\qW=Vd(TSl_7_'>Um6`\g>2C_5i2pfRM,qF`?X)f0m<-i4@jYU0J\Lh/M395N^d@i-O=/')!;k28F-9/e/fX>UK-krb8MK(TnRl04EJ8>Sd"[-hXVM!!!P4gslB(0Z+@1(=>M]0DgW3M0PhQE%sb9C2FX\3tDWkFOg]M%UIt?':/qVbD2eKmM4j$!53Jc-nBgLY4"QaXokg/&Vka$<*'@.p!K,9XpJ>G\h`3>_^gIJ=Eh`L'lYY\>oA!CiDmauUFlnRST(.c45ufM\2A5AN4m)slJ^?tQN_MN>R'lK^*0W]K\$OJbM4R_f*D?Pi2,$/_>jM?Mflp[[D?hNpBk*^"5^UEUXoV"hRYK#[DQd7+2bbkrr<$!1"k(V'Hi#@.Nm,-EEaQY1BW"(`nZIi317]lo0&kP]=l0jK3&8p3kL6L0!64"3oE'e?,Se^STXrcH1fYTfD=q8J+_($_97J77U-Yh)W2ZD\S`>DLS<Us($3?Vjn*-PXq@fKoOYj9$*FTrLO;[r>VfV@N4m*7$K)o<QN[P3>U,T_^*p,rJl`)mbM4Ns>RSa=Jr<kA/'I/"X'@/[>VclbmOYLY\.rs4N=Ng_[DBRp\1+i%Ki`'`+'$1Y!#snNeGoOK`!s?3d6nZk$lesW7K5WmI?Stp.A^e,]-_4MK;&.V']m0S\[jQijho8s]C&o=i"a$XN'H;/U:<X22b%,j\0Z)ikf\R@%'CK1@K.*E<PYYd\h`sn"kNqR1>o"\X+bi1J&PF)E,+=`N4jp&Fi/ZG\1;^>iSJI2nTAg9#.P-b04@4QE'Khe$9`>k:Re+3;d:ZZ>VCm1_QR2t?T1G\QFJMck31!?f+"l%J`6VErcQ$B!!h,geGoOK`"BW7d0("'5R/nU+;+,FkA#L/B,\[rn:]=srdiX8s1H&43H0()bCZ7o/fp;A^DE4IJ6)`gAaCfqXoli=_*b@-'?]rY;m$e:>U'aVYc+]:'._IsUok#/ja&]?f*0b0)2EYe<`]^4Q0?ED<s#N.]btcdiDmb#fQZ>T2/m<gY)L&J_f`k@qRA%ulJ^:M47RH4\.*Bs7UErd9lQTRl[l"DE'8EOi]V6DotpKJlmh\F"hf"hrG.#:!!W&;eGoOKJ/,WJd/sq6N,A'eLp-YN#gK)c;LcP_]lef_Xp_B?%YssT;jR_AHK`Q)QOb\i>o@T_i"a$\N'H;/U:<X2f1')`\0Z)ekf\R@%'CIo@K.*E<PYYd\h`sn_Q/As7U-[.]&C9QJ&T"XE,+=`N4jp&ot^=)\1%$ciRb5knTAg9#.P-b04@4Q\4u:a_,FSc"hf"hM/.^p[DQt`HOAKc_!bPH$9I*f^$DFG]l:Z("7Z=Ts8N'!'tN#I";!8?PVs6'!XD(er1j^oLFp=5KK:gWqRsK?/e3[5fMe+A*d[%n=-jFM03oH7$K)Z7E/[$@_P4P/gXeo$g>L]Cf1'!Z\0Z)eG7XJ3G.;_*Y)L&J^idG:rjXA!<t)8#s,/C^K^4<\bLfe[Xp'.8E)B[<'j]\p'itaFX+Oj\p(Z&nLL.PI("L4&)qRPaL:@\3\1\BfKeBkfGHQn<Fi/@>Y)Kk@E15`E/g'UXlWb48!$8hKs8N'!'sZHA!rsHo&J7IZrK't];QJPFs+Fq9h1"dT!53JI3%KM\gXej'g>L]Ci>@'gLIH0>gXej,g>UcEl_7W)>S=Om#D`6!LKk'hl_7_'>V`g#\g>2G^oN#mG^mq;Fi&:<\g?](_Q/AsU0J^=)RqZjL]#D%<t;ARFA(81$a'lN-,Id-f+$TJrb^6r#He<L04Do(>R'lKi8Lg@_J`]mk*k6dHJs69p)SJ<_/ETl5?d!Q!!#3peGoOK`!s!)d0(.+l]eOfJClOaG<-ZDFFT-.GY;a3hr`2;jh]8K5N6_A\9W&c7UEsE"`Ok$l[j_ui7dVr`7j/'MW#D%]nJmoi0UU*"XS+[[GC#t[DTDiJFNSs;!WYtHK`Q)<t)5L>o@T^i)RRrX?Y\oWjl&Jf1')`iB#pZ7U-Zh2/m?_&,;U'XrUb/d?h)?"'c''1>nk/f*1$Br[$/")m1-t04A(f\4u:a_,FSc"hf"hrG.#:!"XkKs8N'!&\6TE!u*H,,@$P^:DE=fS#'Ml4:Wb6O:C.sk^L;63H0#sY)L&J^idG:N4:9Yo&8c7+7XVqE1Ls>)1)^]'u2J./d_sD\4,_Yr)$]C"Ki&dbLf]oXr2QLE)p$K^oq#]i[Wkd<H,$(?G`_Pi4IT1'Y<56CY)$\R^b4o>WWJkYcb,L#5-B1TrnK&hRYK#28X-^i4+9UKe77I\#t\'D/e4f]B@cLL?jT[iVs\Zf)sV,04*]1rr<$!\_5L4&2;!6PSCq:-/o1m\kOqd)%>`h\e*Sq^REJdHK`Q-QNo,Q^3ss!%_*"\*UsWL>WfNB7UG%[3oN0P>ST<YE!t8epk$!Z&R6Oj06!km\0^I9_+@lE%)$aoM^sN`<PYj-pBiD.KjM>G'ii,O]@TMW]&:0Xi7N7lEA_]M_lJPo"'rmr:tG`N_kSm[>UHsUFCi9eK%C1YE:8X!g>THWXrFP'gfpp#_"GM9HKb;"rr<$"\_>R5&0Sn'1]5Wg`#o]OIcT^lgX`B?1tCOp>[RM5QNo,QN&UN1jhnkT/dh1.E!Q]Dpk$!Z&R6Oj06!kmE(C5/Js*Vi/ck1Z0"<OD\7QcOiE9D@:_-$%'lYY\"4<G=>Um6_2huc\[p1jse\S;rY2X3SXp;*7)1CI6X+s1C>SYf,i%_u9nI9FU-Fcek[G4\c/T=nO>oF`;_eY"L7U-\93oG%F*Ut.hE4p5)5.Wtlrr<$!Z.d_-&0Sk&>Sb^T":+g]Jj:Fk7/iFB-+sdIm`X:rig3mL3H0#sh=oM)E:VuL$p4!)K"(u'QUY;u_6q+b5.E&L<sYtthhiq;_(1+G1A2EIXrWb<_-O2a#:Xb+LKk'h\7QcV@9Hhj.8-EhMRXC?;Wu;UXqb1k-\m.#Vd(TSQUY;uE,+=Zd?b"o3k0:.%fBU;Xoho6d?h)2?#X%//dbm'iOEs(`Ob$>28X>$HO?5#"m,b%rG.#:!!%?/eGoOK`"C,Fd6eHf1LlXH;!Q84Su;O7GX@YToS]/l0@?+f>TC78*eujQ=-jFM?_]9!\-6g]kf\R0&R6QI_k&9Z.tUh*\1YCMEA"aR_^gIC"^T*4&Q]%:._&K&5N,UI2]MHI[p1jsDqN6b>T1+/%u38AO'E3#e\eGtY2\a*COk";Z'X5o9lQKWbCZV$\1DRN4A/op%B^Y**Hr:N7pHP6I`@-dL$OHQqVhD=rr<$!\_>R5&2;!6'GS@d#1)jt"HSC(ESQ)+65s,/24a,9oK(r\""jcsU#-HKA\uWE/e21+G8$;J>WfNAi"b$RK`uE&M!/inXq=n_meYk?"Ki&:iSP8Lf*0b0iO\G''tWA8UZcrGXr1J"m/#YA!j2]4@G_Yu<PkejXpn[UfMbiUlMI:6]!um%IF.;3E'8/'Hop=NHJs2/XohtKG7`@,>UHsT%_gn#CP(E6Xu<](!!!!@g=60&+N"[NnBhCR0k11='Q>!.`@/g<\O@]XmZHlWEke'<JR4lb`)XUR[DB@s]8<r3Xqb1kE,+ej_O@tlj]raPf+-CB\h`3HLK=u.nF):9l[\;OE1M1aigk%ZJCah)-G,(L.BX=h/T=n]J&7M](X$o6QWt>3QKZMD]']#0p$9*EK;%.&`9"hY%k\o/"a:cLiEQGomZ5sM,L#ApW3-_;o/\Yb.tUh*__CP9+3NQ-G4d5c#XJTRK[<!e3.$A\Fj^6gIS2*?e0?,$jipA'3H0#sbD2F(p(c],49bXo4`EQ'0B4Yli"a$M(jFsH7<".C.tUiB?,W#E>VB>8N5!04Q,>`0/dfb[E%a#BpklQr._&M"e_F/02/m<gX+sbrp(c,q"6O]::tG`Nq4/CB28X-^KCJ?K'C1;:(:Yr?[G4D[D/e4fr>C$;_!?RL7U-XM]&A-'lbD7prr<$(\_GX6&2;!:i0Q_s6cC<Q"[K3LS3$\\;9X^mf`4.O%hEEX%_*"YbCQ""?,U<iQO>D]k1A6cjh]`tXpT4-iB$@M`B)s=o&8eZ=)iM)'u2>MXq=sXfMkoX5(;YG9&PuNE*[bK$=.UVH.RIiE8>KhAU3:k=^3_l.c==^*eb>J.K]TeWid(A"oR*4>T1+/*J_:%='#m797D;.^h\JPRp6Xb'3llsHL<5bqVZ\Xrr<$$\(fF4&2=8!7#')Ve8Ij(AK"X")'%?pAV2qj?,V*nQNo,QN=Ye_bD1in>SZA<^a"lZiX4TY7<"2G/%D=`9&PuNp,"c:%'CHX)/rVXXp9`/4@cOZ03g/cX15?<.c==BH8IVh$Eb-+)/rSW<sJ7ZkD?6liRPiM!NtGI-u4@bA*D;#>UHsVoOYj;$X=LQ_k&0WCPLFM>RnB(mN\k>\6X'b)1BB)>VGGl!"\i(eGoOK_[X<5iC+G'4!5Cb`W2*2:X!VZBrK6&IPg:%'B'u1k7gM^\1)am_:p#iic<u=H#WC;/%E7%$K)Z7Xp(ufiC0mQ4!'?pMW#;ea.k6oiEG2H\9Gnq[DB8ecQ9SF_(1f*$;06A1;2^#XKEFGO%*JqE%9dOd?b"Om;VN(46#XHi&]dYT3N'k_Q0O1$EE&bjgm91XqRrOFCi9e#-JEYU"E:FXrUkhG8F<j>R%\Ir+3]3'3lkC?Z<!Irqs5p!!'aDeGoOKKFu&Td6nNgNKc=8&O?ssL-NdGMuC>k?4cRRLG^p5i*,U3hcq.).tC]Fp)Fg__CO\Dk)/+4's8:S-,J-7<s4NN\2c'k\2M"<LGlY#Z1LD-Xr1J#]_^RQ"^DDHLV@6#>WZ1Pge3:3#@%KQ97r")<Pkf\q$sF`'C:,[e#j@ef_Qo1<sGf:$cCjXbH;5U0;;c]E9cE9ka)Ns#.P/$%q3@\_g$UK4*AG`*kk%P*k39$n+`4SE15`>M0t(Q!"\E;eGoOK`"FfYd6e<b!X+\8l[VM/*K0f5)o=Z/$5XW8K"(u'@.[*E\.6"Z'Kq3]f*UF9i9Ai"_/[!u3H`/\6uGE&d9Im*^I5fpi0D,;d4Po$]&C?kp)Ua')&rKMG#o*T.,9YuMRXC?I,mqQ<PkejoLnTm*k3;XQNnSA\2Q#'@Ei$qFa_4>h-<"N)W3L.QNmt=Xr$oT_:Ph+_=cq:3VC5]A*A[.>UHsVqB`u,"g/6c_r!6$CPLFM:[?4d!!i85eGoOK_\'H5_#t<'_MT$A,Wn<ob>AmY4?1kh]')M20)fcPbCc,d^5TQNiT7u/$p3J>K"(u'?AuS7JEqaX)/rF<.thTLGJt<6E(]&U)1.&`.u%V@>SWOAi)s,NnJ-!mST(/@Y2Z!kXp_B?iDnZ+KiN)lb.9A.X+OIXn%Q:\LK=tgE:8^c)W3KgH8>4%K\$O=5.E(Xf*/>Gmtkh3L?jT`Qag)^E'6_=$9`>kg5i!][^^0n!.PL2s8N'!&\6WF";!9)8>:f(Hq47&=!CGYc8&>0p::gmGPS?*>TC76UG$%N3oE&[>SK6W_K?qiMKQdYbD2eKp(c],!1S9i-nBgL-Jj]kMW#;ei0\`JE@#Qr_^gIC(L>"FQWt>3<PYZFIgR[`.Z!<+Wid(AU,k'fX+OIXLLK(s("L4&Pe&XDCOk";/r[:giAJJ`\9Hr$/T=nO*fRddL?jTP)/rXBf)rfOIO!GH%B^Y*le#7i!5/4+s8N'!&\6WF!u*H,MHgqEM('2jk`pD%f_lJ*O:C.s"0QPC6`pNo!W6NF/e2,+%n#2$Mp$mB::O'2*edA!$\pqb9<JZ**;jBa\8Jfo"s3;P6!OK$kMn3=E/NTcnWsDJ-#cCr%sX8IXr1J#Z'UQR$FgnAota(%\5da$]N&2d#-JDjbK*U`\0&uJ"Wk/pe_TE?F`?X)\.0SM+[]K=T/U75VRT?>c.L3kXp\JN%E%$Ks(dA@!!hi#eGoOK`"BQ6_#t0#pn>V'1*h6GiFBDQ\e*WOIVSt!%U:!a]'^pu]&:0X/fn<:G8HSV>QVD=)B[p(.tgN#>SS!ji0'ErnKi-H1:Up:<SU_^'lYY\]c%oF_Q/Ab7U-[.C>dQZ*Uu"+E8>Ki%^+gIMlVV7"'c&BRdM?%VRT?>H8+6nK%C0qN4:<Pl[e3Th\#1*$eGdFg?pKC[^^0nFhm=QH@J!6!!"*JeGoOK`"BQ6d0(.+'&rN\GcAV(h`CJl<T+8@oDNpYEfZtKS@CRuUZfmQ/fn7[!5lN(Lb"!W&R6Nl9("+1P.2fWSrCG$K'S$U)/rL>.u%7kGK#ibE%9dJKi`7/`DsdU2dA:I^V[Hb_6Eot$>SMLHp=AYHJj,-iRi@mEHQ6c^h\JP'4&O6<7_GZ<RI0.>Sah%FCi9]%B^Y8iSPF&Fhm<o>VBC$TC6#<!!#3n"98B$N,GHl!!!!o
rcs0 --- HW Status = 0x00000000 7fffc000
:cKq'G0E;P:Og"fk$iJr-O9S/4B,V,aG5ls!!!!!@!!9`>"98B$!Bh.t!!!!r
rcs0 --- HW context = 0x00000000 7fff4000
:f@6=8<E)qIn*g;uhANtQ__..g>bV<c)B$J$d7BdI5`L2n;)[FT)`&e3Cnr/k8!ZB&36h#?HB7":G@GoL-m3olSurD5@V)Ssf64:<h9E8`ntcLA>39G;]tSA5gJV94s0UsaI*C^>qq_#7pYPl:!!)u[Ylo()o,nHB&L-q;0P]uC0CcpoL&b2KS4-UtPQG;s@oi(/Tno'?n@g5Y1s#a&T`.@!"uIkKWT?W"[7\sNCt'J(>EKD1)H=L#1;:\b>\S3Z=kmgYS4$DLEAq>qbG=[J+Wh@.e0Ur284q?(/[B_nH(g9I5:SZj[mJo`5cT*.eItnN#?8Z96^jK%W>/$rRul>rlY,@X6(g`i$/ioN=ONQXKc0B#ir_i$[+CnH`pVfi>\lT=PW6cBR[uAW\9ZdnS;__rY6sKCK#6Q.SI4hH0(-#pbHUEG@;uqtYr>f,R32etJ%J"VA;V]`Ds[oB&%#4TM%"H>Er0Q$79r<]C4<.IWe%a3)c8Oj<DkKLNO9./U?t8#U[FiD;@QC8;fAX^6p3s<8j,L(8(rdtU7S"u9q%:FJ9%@.Xq<Z>_Z:en%"M?o*Q)Q)EeIe_&PL%_""HsN.1RlcK;Sdl>PHR.['>n!#F-pd83/c,$/\1a6GtdU3.28,I?Sdj3;[g!4JAOL[n-g3*Z<]L2mETl%Vm6[NJg%r5"T=o%\c>JhD&m\)"HRU+'ng^E"\*FIR0(ckZWBM,"e]1S3ba%Tad+u09%/K`uCb'YjtN!<(DA1GJKr.?8t5\Ar/Mg6[DTGEfsheU5)QjNJ@g^3t0u.kJC[t&;;[X]L#%0\P))JmD71AhWmfI4aWag'UU=W$fMDlQ[hCb#!hhRRGUAq4RWam>/LtZNqk=RQ1J8kCR:.D1(6YkL0)B`-u#auVJ2qRM;I<T@qUQIdIN&c,,j3e,F_sIKRHqI!JsUTON"$/7._%cXXOf8GBG0k8^?!B?2s:Zgb)0-Vk$Z"[7!t$H`4PSL'Qn?&3.=CDUVf.>&P6tUgN`1.KrcB?)_#%o@,qQ(]<M6,Ph*6k'6gF3M'MQ6jd6WrJ5Yuk+BPj>%YH@n@'lcrHb/#6C7K6G15Yp>X(Y629%^2Yj-P^o?N;ef\Si!p$h-%[emu00uH_A<CG*B?W,'S0fXJ"Ye618WVlkQr=A)CCG0;\PX!rl5@"g"s7]*4+7=pT64uFcS2VnK`NB<Dl0W6FZ"r!qj5S>]Bs6@K$lis$s*l?q[KAt5lL(/<,I>t$MN1-N<57)^!,RDjh74PT(UrXFHemB,'OT$Mo76NDX">6mK$(pZQ\[g'Y(egE2j&1KcAHeCHS>&,A[i+*jEq'B1PnL_f"LpF[&ApPY:8-IgqMR34YH$3j^<*=S$#8#f5n6)-!;bb>WoQ'F0kbW]$.TE`-FHj.%Q$S6'J.sG6>WX&#q\nUH?G-Mt0=;'V4Xk?33?6Y9E.eK6C*g1>mpe;ZVtea+FJ1Iou+h&t_L'YVM+iA!15>ij(-U675kGI_)"i\oH6WQ]6>I2Xi!p?c!iI\_12Yk9npCkOQ.?A1-o`WAi\j2g6's+-<`($kJIs=<bkPW:or3h;De>H:9\+Z*B"Mi&cq$X^`XZrV]5HO<ASWYD"\I(!H;T<*':4UcO)B5UXc;.+T=9h-8"m(&*Q>53ebQ5)fLu.!3a`8"j(Im;5jFF3<&.2/9nLjD`\b/9^L)q:B330V"-O1u2XS"d5?nR_W4X["`YQRohnh-($hJIZQ54nE[cBc;6D'6?@GeGS\"X@g<=i%^m<[]/&E2:s/H$U.g/XPCcKS1(.$,I@YN$2P4eP@\YcoQF2+k1_3j-q6l`p^UnihfTrN31N2UXS]pZ4hg1,n5UZBoi-KHfV'7Rt"CSm*mu9c6EYu_t^+pC7$K[HKbq53\28u2f(p-_+)`U-%Zei,qe(f,Y]^,F^6ZF4k$1K2nqV?=DR^SuHQefFdT)Bd\cITUIS3_"aU0HCSGHGDjB=TjkG6a/W(gIk:.Id%\$f:-g)'L(U8IRS<ap>,P&[]AYY&Re;II,"VQ!.1"$k_%%./3>9*55!L8X"CYH1TsRg0Jk,4Wi61*Z4Nl!2i\)XW.1rHAErD'>&!4d`[sGEJ8`t"KQ;e<bdV^bC]Ic5Ng`L8T6Aoe^j<'C1AV;jP$`VPsAc7hbQRE4p>68CRD(Hbp7Xm=&Wd<le?c8Oc:jFN*+6<&ihm^2"&JuX,CZc,H0-6arO7RZF9]/j?0Je*ho>mbHVOBVMk*5icQN4YIuOu3diE_"h+.E$TQ=pieMR)[<3GF:VkNOXpqLjE'J\*qR4W2ZW>bc*nQ1mqg_!c"AZ'AjPVb^hDV1T\<648kFA,F'N:5#fXoPt/L^_n=`EeBqkNGulm#f<V@KO'iGSf@XK4\<O74m-`$hAC*[9C,<8!cYj$`8(P:HXcpHNV0DsqP(:\33;:k>B+Z`32;^J?rgA+=NH>0i$o#dJaJR:c4-)J\L-I>Cr"`1#>T4E%'mbd4U&S=1+H]5niBgTi*?)iRY=!SEg>,r>6BR\n;[p`9[?g5EKnH3)DmS'\:@pD$ZnH?lAgAmH&Lk(V+&&YLm,]J@ksk9&LK[.*9aGCNY@VlQEc,^Z"FW8<,II(_"SZ876Os"a3YX2lrcgN%IF5H8p\0pI_9n8,c8G`I[Wb<b45jsA`O<;t;@kk6Rn.nT$J4GD7C+]8"noO3r.WXiu#n1/or&!dXL&)*HjbUtKM_C]=$rL$)<_;t%^4acBFeaL.Qe=TeW2<VSfQY;BHR<f5U7n.md]"%o4eh.`JZkl^,\i."kR8#S[B&mC\\W:)&/QOFX13%>ND?G)b=^<+NRc\$e3.oTLWlBA9,!qp>lJt3B_W[L0QYZK7Hjb[8H2%GD'S=EBSc8W[=&s[GEd7R?)s:Vt`?5;E/!,keG]j%LK!-M(UM$rS9o].n[N#r2?C_lk",6\5"^'k@AheXJ_3B?Ngkpu_IYLVqFF8d.p,K`r$MjP]54OSWlh+8<:#JYX@iBsKqpMgPgDRGq0J&]c9W6=CS+ctAcGt&`n2`1F5HE(<No>7e*ZI_TFT7\s<AQ=&!FYG_4P>+T=Rlqj40bkA?s6s+hVVf/TQ2h!mf/Fe!!E5]m/R(c;f$rNcc6`"[jum?h<-D%(09tUB'le4mGp1_>HP_Y1C_ai.<@4dFYO1`(-n#g(^CmcRM.3!&2%LM$Rr$nnH;PF&5X2KN>S+R(rhDh69g'S6:_@NH%@.F]S)?HJ&D26DFrVW^:aEYV`=\LRN:Rh44ai#AaOimXf<@?0=(1U3L6#Vm%XkD>gt$DM+k+9g6]MsB+K(<2>F:TCR7QHJW^6%>tf]LFLQb[^FQA6p"o]HA,%_'L\dM>ep$D#IkD(M0KnfuN=YM^UBfHtQUXlfN=T*Tbe@8NOM"rh//&t>)5T\r41jU:FakC2(Mj_<qtj=fcZ&fj-CI1p\>O'/Y4f:4%]S(:gCW.-nD:@X);>+)"UVG,C0-*CAbjPW-c<sT]P^HIH2C<NB=2[W;hbPCa#13F&:2/5:f,$2N]lS.j5ELPX,@XVFh;"]Pm_HsEsUpL$<'Pf+,fF%B.H_H%i(<5;>qA[J*AVfahW,CAW4'nUcg>DCJ?Y07XFJ(fC.*!5HGkfM/dGjHR@d'lh<=e=8f<"\@a;?>MXaUq9?*9ojHmoIqqJ\7aI4i@N6qMK4c#=O(`X_1[>eY*S\Z+?1$m_REV1j:?qe&ic20#9W7tXnf,g"i'0<&P]uJQY`NqFMMZk.%'XfCkj3IFZj5cWB^\4^QeXbM\P^JM-P[MK`;DV;Un?u6E=GYAlMe&(ijJ[Ze?s?Ij>D$ZQ"oH]*NQWLg:DI1X1)j*?$fX%j/V*E=f\dl9"DE46%<*)5.OSiS<:IAHC4Yu]u&j)Gnm2(m4[V[s*MZLA0q,4q#U?3%%-%b^Nj]=%P&Lg>H)MO&0_6"0]94RG67ETBP\)b#osSo6W[rR]`R+Yn2^;r"[H<4PJ<huhkqQ.'E!sM5iq_,M>)l=LscnI@h`?ekei;)80S,&&V:?7bVqgS3dN(LQ9*X&2G?$MLebp]VseoPE!1A3::VhnD1aS.XZ6lg3.kgKe3B^Dd2^'l/ijKL+i)M"P=V4tP]R0o9S7o^5XH,*MdB)UVf)tU(1#KXGYWtLSI.Qi(W$6hQ)%B3C5t2ZkM@OM9O'G>9k:Q2!Fh:*&C.e1d&YQ!(=E"+kD_27bRN3u!j%=E'JVSrTP%>2]]J<!ducZs-CD+8Ag21;8>`=G?s/$'B]`PJG):f]$t2HcOj[fU1'4`<BAY,#Xjb0m`iI[m$VApGrVC$b:j+HnrL*Cc^4=bL@ut73`IqT%H-)YP,k?B('9SdW=lL))BUMb^,31ZS.0=.:FH]KXPZu5<[hG>g?n5^U3:I55d,+kP*<b:.TJ!.VIQZj@i_&XDjh'Phi&4e0M8;Zh.R([^;,,Fd2c(kf1d$HZ=q3C16o_I^5mLe@TW?+le$"<,C_HL^&J/@P7O<)N'oeCor?um<Ph]fmTlUR8,`tSb^dMF14LjBC#I2mbC-RqA$_0j07<[/+;@H-(.PiK-@ghmp7]Rl50k2Of>AuAi0"ANdr=l%.=IU:@kEBusjNRAZ'.Ynf/mJhD$L*NM_P8Vg[3l;,Kgqh&P77b_(eNf*g^(]*?#nskb(U/jR'$[B]#%MHI+,j1E^Wp1@5_-6fC<eC6_&8P0:[RN_=9R<*trm&KH7]2W.nQ]b&l^[FGmLp3#PT2'PM4q12H[XQR#(Y&6a_Fdg%SYi9@;h%C?:pUiEurH#5`#kK]<H98W,cbK>su44^+FOJuD?dXA?+c8Mu99d*.+T`/_=goTNb+q?mIRj_(NPo%85HLXS7<M;O-E!BhY+;R;B\Cq\-IH#E;40D(;N/9SG#(kbNE=JNTA`ih?9Fq=i*,RkrOg':MS06aON`*)/2$Uk@D3b$g*P(_^i)Ntt7p1BKm=ij@2bKl[*'G-ciT@B8%grmtpDc<99o$E$\9U"D*c8gJiS6T)G7RI-_qV\HHM7q!dt`d)_q9DZb.Khe]KN=5*eVAUcGSFd!=mbAF0U4?_Nq?*C84[jmukBj:]*4@(%f;$Ph1<_9pF=*Qi30%!!#g^"98B$#>:lns8V@t
rcs0 --- NULL context = 0xffffffff ffffffff
:f$'Y/AJA6rn*g;uYiE%u$S49=ZLEZ%.nd+JROK2YKF61NhGUaLi[pQ1aY#mjqQ/j%M_=I'J2O8W='a3:"H"f6fqmqbniaDlbj2mB)1M/C/jGULYtE=oQ\CpaT(76(pU^@ioB4tU]ZfiYR@X*@!!VM/(l*ol&.2;K<Z=1/-k0Gf]^Y]*.6n6-k7ek0:OqYq,Ga:N6qN7#JJ'e-U,`e+=s@X72I]^CRlH0XM/s4VU*@MZYoe4CY;/)kFoJ3MGYqbtaGYm1G1!i3E[PQG-]nj+,'o(1fnilVCuQGQ%$X#O.OAsWZ;mB<.E5>A!R*Y<:p(R6iFC5pQ6'3letP-oQbib\J]>:@9:[%`35m?V'GCij>T@&04K(D-Sf-aA$Ojonr$SX5pN`&%]+91K/h,5+Xl`R*4K+b%U!:Q#73cD+Ot\ir$6r::f$+em3AjYG&h'3_d4l1k2\G[T<oPD==n+:W'D+tm`1;b>ia1Uc`2hmHG`T*0id:HVi_e]DLu72Hi^(N]Ld0lJ+rnPSh[$jslp]?lg]OniW!.JqR%-H=hCYUu)2<:NJE-K@c)C50d=kj=>KZcDd6J$dSTpMO6Rfmd4,W;k<[O)s.YYh9/7/rZfCR9G4^1?V.,J6dqUpr&!DN*l/MI6p6UMC>A,:DtqK:4o1Z4*KMJOdkO]:#dYsa2I>:%2,3P5,NYAJkP1hcqSZk;"l)dib20a1eLZW87L.TH$W*f4EI$A,t;G7;IM?@b-85iVffQ1@(4So!HBV:-QO_OH&k,S\W(%3O>S46qCMK!)V+1j7:!V!jj:@pbr:nV3%61p+$cUnfMkAJ$M0TMpn]*nQYj7+0SE=uIBK45@#=LrfBj1*-+m$q73IU^^8+>UMXi8_;[G1dSW$SXO)8R/W?@$IXg0H4EEZ:L,-LM#h'[\M<&o1JT7Ta'\sV3[pV)'i)Uj7X=Ln$B.eYj_FUp6A/;b$@lTEE9are*tY+NFG1$e-Z>8YDYF(0UVr.Vdj+9Y;R(ZMb1DNdR?Y_O)"0ZSE+Tk32%e'.,&!Q9'))t2M&[I!G[TP$l-HVnj24[-'B:?FBV%ULpCR$B8@q)!^\GR`N1h>SP`OsfrfR-KX.3Qq*Cq#GqNn>/;V\)?iI^-!\:Wa]E:q*2_NmE(O3<iLS>7_ma[bVWrNYd96_)Y;?B:.W7TpVoW"c5s!&0sL;nT3jL*,of$].U[FY0Fu;rRXji<gP-J,#.WF5d&\5Nhucf,4AV;m-Hp>2=:4G[4M3$gtAQIiV_hhS]9!a$Nka;rBf1+o3gWV4[b'YHH4`gM:)@2a<>Jn+r2bYSre`lJP4m[a!-`K5jNb4?'OaYUIZmf/IO@XNIi'hH8>ceBBn+>jV/Pl>sSU-;:CNZ^7]\=iFNo6gUSaR9`pjUoJ:`A'`7"fpSu^iP!sMPQ_h73eIhoMVK4n>Sk"XZM>ulT%?1)D0=-"H)/,(&M^6F]3P-aJL#jTH3%msMTS.]P1qFlYO^J*GLSG)d7M.CV$gj#%>mQ^$KbSUH'VmeWl+%>'\t\e@DsnW$QT<Mokb[01[E.mG1MFCg&BHGQK;(EOomXH<j3/(=J$\[pu9!EG.jM<;aV)Wd`u5r':bg^OF";-o-`EB:996mn&W9WS?GcUWNU4K'VStf4%!j.;?P9eNdXCnYhPZF0c-2&oiQ!fPB.YdLR,VZKQUT*)Z5AKUq)Cel,\nPT4\tLjLdY@E46bp>$r$sC[;`K@fCS\?e)^cBj^,3p#UK\(>[-9b=sp\U`q.!QYtiP*NieU-77P^>Q<'uH)8\_V8es,]9,nKIAUj&4/#Ugq==G2]Ggn1[+=%HPle1<)mYu<AI61?&Ml<V5<?)F3UMm21!m0%H<Fuq\J".,&55ENH-A49HJ?"0PU-:TDp/%)R2&(EX9f<I'9^1E$Oe&+UdXbnN#O9HeFafsR2%#UjWR]H/QjaKf[t?:<,$\/$.[S,AKF<\GMM#,Xk.c?/O/qLCbGbu/pN$:Dq@Y=?+j%FmE>kYDUSi)j*S)&SjimH;gEnUFDR94#%nb@lcjU^0YK'D;j$G>(Oac`A'YHh8.kcKU$$@$>BC=K()-'8pNhI[eeg?lJZRQd-o\h)3;FjT3csPBkKAH;Bn".)C,^lO%V5-RJ<HS09O#3mecaID"Q-]5EFmm<]1SoT"'7CD19K*(EqI!$]@5t9$=4,olLT:,FjZD1F_is7@j"]>s4A[1LOi5fpr$_[3&g;9qXVl<]"BA.%Qdjh(kdi]hDM?[3&'Ea7eVh)h]>h4k&BU8hoZV1bQR6<[t+\tRsI4)'D^!V9O6oE;0RLnp,ZI4^orl^A$:e=42/`Fa7j?5Rh[#4p1N`\=ig'Fdq8/Y#F0UP`)8^76O2lYX_%Qc8Y!fH_kk(a4YJQ>Hi_m*a<4>T5#(:qGL-oKm)i&V4\Q'T8)>iX,N25O"&gF)NNJR&jiSY*F/;"LBQ.Vjj4-eO4rLcWi;Y;G40RcITDj2oH2Fa?9<L)Wcomt]AX3+?8h;(-hiuo@`g?maWQ&DTg?*7P@\r3087NiBAE7dc`<Wqt)!ona-UG@!C@s[8RENFh%OVV)be>B"pU/_@ntPa2K$-"d\[PZUPA?`9WclE/$Gc(PY/t9Udtdd2;4JMtidRI9F>"#G1nX_-pU67A(/O2[`gk9o[:^e#I+Ts=`IVe/!1pgX`nl=qjh/t,0.MHtB,9W(FAp54ITNMuh5So25F7s.V(-5Ac#fM;X.?"fQ[j/!&pFI36ZkU=gDUhme"sC$V6V4K`JpGKD'4+XP"1Yq-b2>T_YiV3pPO_ZlK5aoT(=*M,5]X(jCGJUNu283Uu%Qkcc.T=nna]3[_@dMf$8VS'V,V7NH2FEU<Uf93u5]p#IM="_#/sa[3I0tcc;YK1Sulo)#=so!X0,J"D(ui;;;L?>VblZ_;i\r1pgu?*UhC3pc<QMSb#i`\q^)<#N*.#21(oDa0L<-[T5*C\]Qm`9`LbS<]/#=Vj/4mqL-VTOp,r8N)A*@NiNU;KS%@RB1h&cA)UITN.i2a,YPD7H,_f)2eH51)o.[aNc1Q&oqn!4m<@rUL8JF-BkDpR?^MV;IQ2&4i:=Lgs"?A;)hn6(H>=qD])H\gWb+N[!Dq1&5?RaN,WH#:Cfo7WbM^08pY"t:'FoFTCgYUX!!'dXm/R(c>A/MRcc6`"2iW*r[jNb1MTpRS25HSqlg([V>&B[CV!T_aZW`K+Yp,L9;R!KK2aVE9AS/WpQD:I7,G9Mqi2kZbag(d++rSYTq?S:$2cHZA'^MX9CE!1_R-3#5rt-@An:Bp<j<a!6H-^im)BIug>1X,ElXTgU;,TBQQ-Zfq/.1_(FpWpBc`cOV`$CYl@o(u1V=uc-#L<5D2$W;k&5kkuLAFZj5NZn>0?1m,bB(D3D1=&l[sLPmH$=#7*qJ6YM1k,14EPq?318XK.IA!KruE%0[sGr4HPLn>/?i#g7&T5@QF0MW,-pW?Z6J&Bh<Z1iCQ@\"\;bN_HK'XRn8"hE$u_V#\_+J;L[/o#lc$aD0EhrjT;\*1_g?l4c;-r_fm#a+k*tMGX(EjMi['RB/19Pcbn3"Q"]qYX[t-U(NW%djAS'[RI(8#d\0WWXOt=[;R,!s'K6OlpS$S>l^O*\Z>8E_9FWLbXM,LW"ROOF@9.GrnJXjUe6r9K0a._h_<_$0'3!nbiR6@c_T4X_W>j6Jsbmh5OS$&r[iOJlf;+TAZ)qdL:=TD/<0N-%N8O>nk9FG2,_,tL(U2O5eCd5BfW^b:1WhA)Nm0JU);aCJuAVri.#NJrG)S;gtR!=MqLKM\IlXJc[IX-+>FV!e'@j;+N%.`r%=dT#NU]0h(qHrC>H>i<rqA1*,hET;h>;EW;>=EE#[]6e7ZPqP`2V-Edm;:T^CLK*)[QUaZfoELE1%huD>GruTb<G_[:\F>V')h+kZfQR4L=*g42a;)eVJ2\J621\'kr?P)QEYu^6;/0T:XJA8=s*pfE$9[Xgr*6iIKk$:d.RW.MnM]S<,p75\9<`.`<[SAKTEu-9JGJUE>f[%5XR+35u;8,kU?DVKHI&AS+f=rRd$TfCg$W1]C_bK'&4Ck_GFaX.>:YWa>>Yg)R:rn4VLpc1B;Dpl!%.U%7f3\1jr2Ucm&0T%XG2`#Y]M"nmgW"?so@*n$3ZUZo7G0"PQcU#kJ)(_%ISdIZ+1pI2tIE\Z;?lAN/unA*9^b;P87E9$pl[@Lbj^d);kVBn_,1D-KJ;M9;4J9'5'7?MOaFLsSTe@nQ'/$GlM#1Z3s*bU-4UZJf(]9G8X?$7A*GO=`kKjbiteiFn@8cOP@(0:FdUc8@iM;4eu#fV)d+A^*)$H1q:IP:4\_C>+jkRHeHjP3k@'LL$l,&X[O-b*3f?+Z6#]lTASl1pZmJejQE2N:E..N%^d4LPVf/pp90Sb6+'9Q+c^'=&(UoQ^*KuDmcpGfP;NDK!fZW]n"KD)59r,T[&@f=UO&`*+b82EMO#m<l43fP_g6/hZ>f)*q7^]';5N0-$#j@[Gq75.!@@7hIOgiQ4KbO,)2[VR^gd@Bu_*A@4u#6HnB4`]cKC'5+u'i3^.j1XJ-S!(]%C8G#_H:bcng@_+co._T,G-I#nKBXD*l?6."_'ZbMZp[*n]5\Aa+P9BlLCZRe9S-OM!5H:'q4'a:%gET"^o#f'u<E[*p+KaD['/pi#he7Je#?G3GQ"AtkB0iTnai8)bsC!ha>dR0T9i\_9S"aFI-k.LEVL0T7_')9<lSZ#!"R5)L!C!%,LMo`:3--(p!W]f8VKp[W32,`X0g.K;fC!+/C@m;`ED(,nadI&dP8iOtd1lp%5'%3N2bX$?)HRhH0+"OGQeL'@?Sn'_GaF5$B$+Q'^E'?'hZ>X9-SjpD4.0;_1aJB@NJKG"Wh2uS%a^rK%)b$ZI>Q[!KMW1g9@M]/5"7o<pO0ta-n*A$[\BgG>gCiXMR4sVOk.@n0q3bNtU2q<m?frSdkeZ.:<J/%o=?;cRi9WE_*34^JcF>iMD@Z?U_9?k=F)DJi4+k.aE,_<e*.*=)IIM?KE-(FW*=%53,Ji'G_8q'8!nc&SMs&uh^`^Gn5!r5/htU6k^V5lb/Y^Pjg+B&Qm?ddG!!!!X!!E9$<?9##
bcs0 --- HW Status = 0x00000000 7fffa000
:cKq'G!!!H/9eZPMJNqO-qd<ks\)KL`!&!'0H,'C[rr<$$3rfB_!&=T(
vcs0 --- HW Status = 0x00000000 7fff8000
:cKq'G!!!<+7A'_kO-KZi^mYH^"1?lo0E;(Q!!!&X!!E9$+TN&J
Num Pipes: 3
Pipe [0]:
  Power: on
  SRC: 063f0383
  STAT: 00000000
Plane [0]:
  CNTR: d8004400
  STRIDE: 00003800
  ADDR: 00000000
  SURF: 00f9d000
  TILEOFF: 00000000
Cursor [0]:
  CNTR: 00000000
  POS: 00000000
  BASE: 00000000
Pipe [1]:
  Power: on
  SRC: 077f0437
  STAT: 00000000
Plane [1]:
  CNTR: d8004400
  STRIDE: 00003800
  ADDR: 00000100
  SURF: 00fa9000
  TILEOFF: 00000040
Cursor [1]:
  CNTR: 00000000
  POS: 00000000
  BASE: 00000000
Pipe [2]:
  Power: on
  SRC: 00000000
  STAT: 00000000
Plane [2]:
  CNTR: 00004000
  STRIDE: 00000000
  ADDR: 00000000
  SURF: 00000000
  TILEOFF: 00000000
Cursor [2]:
  CNTR: 00000000
  POS: 00000000
  BASE: 00000000
CPU transcoder: A
  Power: on
  CONF: c0000050
  HTOTAL: 0783063f
  HBLANK: 0783063f
  HSYNC: 068f066f
  VTOTAL: 03a70383
  VBLANK: 03a70383
  VSYNC: 038b0386
CPU transcoder: B
  Power: on
  CONF: c0002000
  HTOTAL: 0897077f
  HBLANK: 0897077f
  HSYNC: 080307d7
  VTOTAL: 04640437
  VBLANK: 04640437
  VSYNC: 0440043b
CPU transcoder: C
  Power: on
  CONF: 00000000
  HTOTAL: 00000000
  HBLANK: 00000000
  HSYNC: 00000000
  VTOTAL: 00000000
  VBLANK: 00000000
  VSYNC: 00000000
is_mobile: yes
is_lp: no
is_alpha_support: no
has_64bit_reloc: no
has_aliasing_ppgtt: yes
has_csr: no
has_ddi: no
has_dp_mst: no
has_reset_engine: no
has_fbc: yes
has_fpga_dbg: no
has_full_ppgtt: yes
has_full_48bit_ppgtt: no
has_gmch_display: no
has_guc: no
has_guc_ct: no
has_hotplug: yes
has_l3_dpf: yes
has_llc: yes
has_logical_ring_contexts: no
has_logical_ring_elsq: no
has_logical_ring_preemption: no
has_overlay: no
has_pooled_eu: no
has_psr: no
has_rc6: yes
has_rc6p: yes
has_runtime_pm: no
has_snoop: no
has_coherent_ggtt: yes
unfenced_needs_alignment: no
cursor_needs_physical: no
hws_needs_physical: no
overlay_needs_physical: no
supports_tv: no
has_ipc: no
Has logical contexts? yes
scheduler: 0
Unavailable
i915.vbt_firmware=(null)
i915.modeset=-1
i915.lvds_channel_mode=0
i915.panel_use_ssc=-1
i915.vbt_sdvo_panel_type=-1
i915.enable_dc=-1
i915.enable_fbc=1
i915.enable_ppgtt=2
i915.enable_psr=-1
i915.disable_power_well=1
i915.enable_ips=1
i915.invert_brightness=0
i915.enable_guc=0
i915.guc_log_level=0
i915.guc_firmware_path=(null)
i915.huc_firmware_path=(null)
i915.dmc_firmware_path=(null)
i915.mmio_debug=0
i915.edp_vswing=0
i915.reset=2
i915.inject_load_failure=0
i915.alpha_support=no
i915.enable_hangcheck=yes
i915.fastboot=no
i915.prefault_disable=no
i915.load_detect_test=no
i915.force_reset_modeset_test=no
i915.error_capture=yes
i915.disable_display=no
i915.verbose_state_checks=yes
i915.nuclear_pageflip=no
i915.enable_dp_mst=yes
i915.enable_dpcd_backlight=no
i915.enable_blcm=yes
i915.enable_gvt=no

[-- Attachment #3: Type: text/plain, Size: 160 bytes --]

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^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2018-10-03 13:38 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-10-02  9:38 [PATCH xf86-video-intel v1] sna: Added AYUV format support for textured and sprite video adapters Stanislav Lisovskiy
2018-10-03 11:29 ` Chris Wilson
2018-10-03 12:28   ` Ville Syrjälä
2018-10-03 12:34     ` Chris Wilson
2018-10-03 13:38       ` Ville Syrjälä
2018-10-03 13:17   ` Lisovskiy, Stanislav

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