From: David Miller <davem@davemloft.net>
To: dhowells@redhat.com
Cc: nic_swsd@realtek.com, netdev@vger.kernel.org
Subject: Re: r8169 tx batching(?) causing performance problems
Date: Wed, 03 Oct 2018 14:43:34 -0700 (PDT) [thread overview]
Message-ID: <20181003.144334.513463899629095170.davem@davemloft.net> (raw)
In-Reply-To: <21374.1538597980@warthog.procyon.org.uk>
From: David Howells <dhowells@redhat.com>
Date: Wed, 03 Oct 2018 21:19:40 +0100
> David Miller <davem@davemloft.net> wrote:
>
>> Probably you are seeing some interrupt mitigation.
>>
>> It seems there is a difference in how the interrupt mitigation is
>> programmed on for 8168 chips vs. others by default. Most get
>> all zeros in the IntrMitigate register, whilst for 8168 chips
>> a value of 0x5151 is programmed.
>
> I'm not sure what that means. I can't seem to find a programmer's manual for
> the chip.
There is a comment which documents what might be the register layout
elsewhere in the driver:
/*
* Undocumented corner. Supposedly:
* (TxTimer << 12) | (TxPackets << 8) | (RxTimer << 4) | RxPackets
*/
RTL_W16(tp, IntrMitigate, 0x0000);
prev parent reply other threads:[~2018-10-04 4:33 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-03 10:27 r8169 tx batching(?) causing performance problems David Howells
2018-10-03 15:23 ` David Howells
2018-10-03 16:31 ` David Miller
2018-10-03 20:19 ` David Howells
2018-10-03 21:43 ` David Miller [this message]
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