From mboxrd@z Thu Jan 1 00:00:00 1970 From: Rajesh Bhagat Date: Wed, 3 Oct 2018 17:07:17 +0530 Subject: [U-Boot] [PATCH 34/53] armv8: ls1046aqds: Add TFABOOT defconfig for secure boot In-Reply-To: <20181003113736.14981-1-rajesh.bhagat@nxp.com> References: <20181003113736.14981-1-rajesh.bhagat@nxp.com> Message-ID: <20181003113736.14981-35-rajesh.bhagat@nxp.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de From: Vinitha V Pillai This defconfig is for Secure TFABOOT, to be loaded by trusted firmware Signed-off-by: Vinitha V Pillai --- configs/ls1046aqds_ram_SECURE_BOOT_defconfig | 58 ++++++++++++++++++++ 1 file changed, 58 insertions(+) create mode 100644 configs/ls1046aqds_ram_SECURE_BOOT_defconfig diff --git a/configs/ls1046aqds_ram_SECURE_BOOT_defconfig b/configs/ls1046aqds_ram_SECURE_BOOT_defconfig new file mode 100644 index 0000000000..1a20d0becf --- /dev/null +++ b/configs/ls1046aqds_ram_SECURE_BOOT_defconfig @@ -0,0 +1,58 @@ +CONFIG_ARM=y +CONFIG_TARGET_LS1046AQDS=y +CONFIG_SYS_TEXT_BASE=0x82000000 +CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y +CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y +CONFIG_SECURE_BOOT=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" +CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=2 +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_OF_BOARD_SETUP=y +CONFIG_TFABOOT=y +CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTARGS=y +CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m at 0x100000(nor_bank0_uboot),40m at 0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m at 0x4100000(nor_bank4_uboot),40m at 0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)" +# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_MISC_INIT_R=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_CMD_BOOTZ=y +CONFIG_CMD_IMLS=y +CONFIG_CMD_GREPENV=y +CONFIG_CMD_MEMINFO=y +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_NAND=y +CONFIG_CMD_PCI=y +CONFIG_CMD_SF=y +CONFIG_CMD_USB=y +CONFIG_CMD_CACHE=y +CONFIG_MP=y +CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m at 0x100000(nor_bank0_uboot),40m at 0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m at 0x4100000(nor_bank4_uboot),40m at 0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)" +CONFIG_OF_CONTROL=y +CONFIG_ENV_IS_NOWHERE=y +CONFIG_DM=y +CONFIG_FSL_ESDHC=y +CONFIG_FSL_CAAM=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_SPI_FLASH=y +CONFIG_PHYLIB=y +CONFIG_NETDEVICES=y +CONFIG_E1000=y +CONFIG_PCI=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_LAYERSCAPE=y +CONFIG_SYS_NS16550=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_FSL_DSPI=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_STORAGE=y +CONFIG_RSA=y -- 2.17.1