* [PATCH v2 00/13] drm/i915: First cleanup pass to get rid of more crtc->config users.
@ 2018-10-04 9:45 Maarten Lankhorst
2018-10-04 9:45 ` [PATCH v2 01/13] drm/i915: Remove dereferences of crtc->config in set_pipeconf/misc functions, v2 Maarten Lankhorst
` (20 more replies)
0 siblings, 21 replies; 30+ messages in thread
From: Maarten Lankhorst @ 2018-10-04 9:45 UTC (permalink / raw)
To: intel-gfx
New version, already reviewed but need to get CI results before committing. :)
Maarten Lankhorst (13):
drm/i915: Remove dereferences of crtc->config in set_pipeconf/misc
functions, v2.
drm/i915: Make panel fitter functions take state
drm/i915: Make intel_set_pipe_timings/src_size take a pointer to
crtc_state
drm/i915: Use crtc_state in ironlake_enable_pch_transcoder
drm/i915: Make skl_detach_scalers take crtc_state
drm/i915: Make pll functions take crtc_state, v2.
drm/i915: Make ironlake_pch_transcoder_set_timings take crtc_state
drm/i915: Make shared dpll functions take crtc_state
drm/i915: Get rid of crtc->config from icl_pll_to_ddi_pll_sel
drm/i915: Use crtc->state in intel_fbdev_init_bios
drm/i915: Get rid of crtc->config dereference in intel_dp_retrain_link
drm/i915: Get rid of crtc->config in chv_data_lane_soft_reset
drm/i915: Get rid of intel_crtc->config in crtc_enable/disable
functions, v2.
drivers/gpu/drm/i915/intel_ddi.c | 15 +-
drivers/gpu/drm/i915/intel_display.c | 353 +++++++++++++-------------
drivers/gpu/drm/i915/intel_dp.c | 4 +-
drivers/gpu/drm/i915/intel_dpio_phy.c | 4 +-
drivers/gpu/drm/i915/intel_dpll_mgr.c | 31 +--
drivers/gpu/drm/i915/intel_dpll_mgr.h | 6 +-
drivers/gpu/drm/i915/intel_fbdev.c | 8 +-
7 files changed, 207 insertions(+), 214 deletions(-)
--
2.19.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 30+ messages in thread
* [PATCH v2 01/13] drm/i915: Remove dereferences of crtc->config in set_pipeconf/misc functions, v2.
2018-10-04 9:45 [PATCH v2 00/13] drm/i915: First cleanup pass to get rid of more crtc->config users Maarten Lankhorst
@ 2018-10-04 9:45 ` Maarten Lankhorst
2018-10-04 9:45 ` [PATCH v2 02/13] drm/i915: Make panel fitter functions take state Maarten Lankhorst
` (19 subsequent siblings)
20 siblings, 0 replies; 30+ messages in thread
From: Maarten Lankhorst @ 2018-10-04 9:45 UTC (permalink / raw)
To: intel-gfx
One more user of crtc->config down. :)
Changes since v1:
- Constify crtc_state
- int pipe -> enum pipe pipe
- Move i9xx_set_pipeconf declaration to the other pipeconf declarations.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 82 ++++++++++++++--------------
1 file changed, 41 insertions(+), 41 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 36434c5359b1..c2a54440dc63 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -141,15 +141,15 @@ static void ironlake_pch_clock_get(struct intel_crtc *crtc,
static int intel_framebuffer_init(struct intel_framebuffer *ifb,
struct drm_i915_gem_object *obj,
struct drm_mode_fb_cmd2 *mode_cmd);
-static void i9xx_set_pipeconf(struct intel_crtc *intel_crtc);
static void intel_set_pipe_timings(struct intel_crtc *intel_crtc);
static void intel_set_pipe_src_size(struct intel_crtc *intel_crtc);
static void intel_cpu_transcoder_set_m_n(struct intel_crtc *crtc,
struct intel_link_m_n *m_n,
struct intel_link_m_n *m2_n2);
-static void ironlake_set_pipeconf(struct drm_crtc *crtc);
-static void haswell_set_pipeconf(struct drm_crtc *crtc);
-static void haswell_set_pipemisc(struct drm_crtc *crtc);
+static void i9xx_set_pipeconf(const struct intel_crtc_state *crtc_state);
+static void ironlake_set_pipeconf(const struct intel_crtc_state *crtc_state);
+static void haswell_set_pipeconf(const struct intel_crtc_state *crtc_state);
+static void haswell_set_pipemisc(const struct intel_crtc_state *crtc_state);
static void vlv_prepare_pll(struct intel_crtc *crtc,
const struct intel_crtc_state *pipe_config);
static void chv_prepare_pll(struct intel_crtc *crtc,
@@ -5604,7 +5604,7 @@ static void ironlake_crtc_enable(struct intel_crtc_state *pipe_config,
&intel_crtc->config->fdi_m_n, NULL);
}
- ironlake_set_pipeconf(crtc);
+ ironlake_set_pipeconf(pipe_config);
intel_crtc->active = true;
@@ -5737,9 +5737,9 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
}
if (!transcoder_is_dsi(cpu_transcoder))
- haswell_set_pipeconf(crtc);
+ haswell_set_pipeconf(pipe_config);
- haswell_set_pipemisc(crtc);
+ haswell_set_pipemisc(pipe_config);
intel_color_set_csc(&pipe_config->base);
@@ -6073,7 +6073,7 @@ static void valleyview_crtc_enable(struct intel_crtc_state *pipe_config,
I915_WRITE(CHV_CANVAS(pipe), 0);
}
- i9xx_set_pipeconf(intel_crtc);
+ i9xx_set_pipeconf(pipe_config);
intel_color_set_csc(&pipe_config->base);
@@ -6138,7 +6138,7 @@ static void i9xx_crtc_enable(struct intel_crtc_state *pipe_config,
intel_set_pipe_timings(intel_crtc);
intel_set_pipe_src_size(intel_crtc);
- i9xx_set_pipeconf(intel_crtc);
+ i9xx_set_pipeconf(pipe_config);
intel_crtc->active = true;
@@ -7480,29 +7480,30 @@ void intel_mode_from_pipe_config(struct drm_display_mode *mode,
drm_mode_set_name(mode);
}
-static void i9xx_set_pipeconf(struct intel_crtc *intel_crtc)
+static void i9xx_set_pipeconf(const struct intel_crtc_state *crtc_state)
{
- struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
+ struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
uint32_t pipeconf;
pipeconf = 0;
/* we keep both pipes enabled on 830 */
if (IS_I830(dev_priv))
- pipeconf |= I915_READ(PIPECONF(intel_crtc->pipe)) & PIPECONF_ENABLE;
+ pipeconf |= I915_READ(PIPECONF(crtc->pipe)) & PIPECONF_ENABLE;
- if (intel_crtc->config->double_wide)
+ if (crtc_state->double_wide)
pipeconf |= PIPECONF_DOUBLE_WIDE;
/* only g4x and later have fancy bpc/dither controls */
if (IS_G4X(dev_priv) || IS_VALLEYVIEW(dev_priv) ||
IS_CHERRYVIEW(dev_priv)) {
/* Bspec claims that we can't use dithering for 30bpp pipes. */
- if (intel_crtc->config->dither && intel_crtc->config->pipe_bpp != 30)
+ if (crtc_state->dither && crtc_state->pipe_bpp != 30)
pipeconf |= PIPECONF_DITHER_EN |
PIPECONF_DITHER_TYPE_SP;
- switch (intel_crtc->config->pipe_bpp) {
+ switch (crtc_state->pipe_bpp) {
case 18:
pipeconf |= PIPECONF_6BPC;
break;
@@ -7518,9 +7519,9 @@ static void i9xx_set_pipeconf(struct intel_crtc *intel_crtc)
}
}
- if (intel_crtc->config->base.adjusted_mode.flags & DRM_MODE_FLAG_INTERLACE) {
+ if (crtc_state->base.adjusted_mode.flags & DRM_MODE_FLAG_INTERLACE) {
if (INTEL_GEN(dev_priv) < 4 ||
- intel_crtc_has_type(intel_crtc->config, INTEL_OUTPUT_SDVO))
+ intel_crtc_has_type(crtc_state, INTEL_OUTPUT_SDVO))
pipeconf |= PIPECONF_INTERLACE_W_FIELD_INDICATION;
else
pipeconf |= PIPECONF_INTERLACE_W_SYNC_SHIFT;
@@ -7528,11 +7529,11 @@ static void i9xx_set_pipeconf(struct intel_crtc *intel_crtc)
pipeconf |= PIPECONF_PROGRESSIVE;
if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) &&
- intel_crtc->config->limited_color_range)
+ crtc_state->limited_color_range)
pipeconf |= PIPECONF_COLOR_RANGE_SELECT;
- I915_WRITE(PIPECONF(intel_crtc->pipe), pipeconf);
- POSTING_READ(PIPECONF(intel_crtc->pipe));
+ I915_WRITE(PIPECONF(crtc->pipe), pipeconf);
+ POSTING_READ(PIPECONF(crtc->pipe));
}
static int i8xx_crtc_compute_clock(struct intel_crtc *crtc,
@@ -8431,16 +8432,16 @@ void intel_init_pch_refclk(struct drm_i915_private *dev_priv)
lpt_init_pch_refclk(dev_priv);
}
-static void ironlake_set_pipeconf(struct drm_crtc *crtc)
+static void ironlake_set_pipeconf(const struct intel_crtc_state *crtc_state)
{
- struct drm_i915_private *dev_priv = to_i915(crtc->dev);
- struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
- int pipe = intel_crtc->pipe;
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
+ struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ enum pipe pipe = crtc->pipe;
uint32_t val;
val = 0;
- switch (intel_crtc->config->pipe_bpp) {
+ switch (crtc_state->pipe_bpp) {
case 18:
val |= PIPECONF_6BPC;
break;
@@ -8458,32 +8459,32 @@ static void ironlake_set_pipeconf(struct drm_crtc *crtc)
BUG();
}
- if (intel_crtc->config->dither)
+ if (crtc_state->dither)
val |= (PIPECONF_DITHER_EN | PIPECONF_DITHER_TYPE_SP);
- if (intel_crtc->config->base.adjusted_mode.flags & DRM_MODE_FLAG_INTERLACE)
+ if (crtc_state->base.adjusted_mode.flags & DRM_MODE_FLAG_INTERLACE)
val |= PIPECONF_INTERLACED_ILK;
else
val |= PIPECONF_PROGRESSIVE;
- if (intel_crtc->config->limited_color_range)
+ if (crtc_state->limited_color_range)
val |= PIPECONF_COLOR_RANGE_SELECT;
I915_WRITE(PIPECONF(pipe), val);
POSTING_READ(PIPECONF(pipe));
}
-static void haswell_set_pipeconf(struct drm_crtc *crtc)
+static void haswell_set_pipeconf(const struct intel_crtc_state *crtc_state)
{
- struct drm_i915_private *dev_priv = to_i915(crtc->dev);
- struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
- enum transcoder cpu_transcoder = intel_crtc->config->cpu_transcoder;
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
+ struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
u32 val = 0;
- if (IS_HASWELL(dev_priv) && intel_crtc->config->dither)
+ if (IS_HASWELL(dev_priv) && crtc_state->dither)
val |= (PIPECONF_DITHER_EN | PIPECONF_DITHER_TYPE_SP);
- if (intel_crtc->config->base.adjusted_mode.flags & DRM_MODE_FLAG_INTERLACE)
+ if (crtc_state->base.adjusted_mode.flags & DRM_MODE_FLAG_INTERLACE)
val |= PIPECONF_INTERLACED_ILK;
else
val |= PIPECONF_PROGRESSIVE;
@@ -8492,16 +8493,15 @@ static void haswell_set_pipeconf(struct drm_crtc *crtc)
POSTING_READ(PIPECONF(cpu_transcoder));
}
-static void haswell_set_pipemisc(struct drm_crtc *crtc)
+static void haswell_set_pipemisc(const struct intel_crtc_state *crtc_state)
{
- struct drm_i915_private *dev_priv = to_i915(crtc->dev);
- struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
- struct intel_crtc_state *config = intel_crtc->config;
+ struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc);
+ struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);
if (IS_BROADWELL(dev_priv) || INTEL_GEN(dev_priv) >= 9) {
u32 val = 0;
- switch (intel_crtc->config->pipe_bpp) {
+ switch (crtc_state->pipe_bpp) {
case 18:
val |= PIPEMISC_DITHER_6_BPC;
break;
@@ -8519,10 +8519,10 @@ static void haswell_set_pipemisc(struct drm_crtc *crtc)
BUG();
}
- if (intel_crtc->config->dither)
+ if (crtc_state->dither)
val |= PIPEMISC_DITHER_ENABLE | PIPEMISC_DITHER_TYPE_SP;
- if (config->ycbcr420) {
+ if (crtc_state->ycbcr420) {
val |= PIPEMISC_OUTPUT_COLORSPACE_YUV |
PIPEMISC_YUV420_ENABLE |
PIPEMISC_YUV420_MODE_FULL_BLEND;
--
2.19.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v2 02/13] drm/i915: Make panel fitter functions take state
2018-10-04 9:45 [PATCH v2 00/13] drm/i915: First cleanup pass to get rid of more crtc->config users Maarten Lankhorst
2018-10-04 9:45 ` [PATCH v2 01/13] drm/i915: Remove dereferences of crtc->config in set_pipeconf/misc functions, v2 Maarten Lankhorst
@ 2018-10-04 9:45 ` Maarten Lankhorst
2018-10-04 9:45 ` [PATCH v2 03/13] drm/i915: Make intel_set_pipe_timings/src_size take a pointer to crtc_state Maarten Lankhorst
` (18 subsequent siblings)
20 siblings, 0 replies; 30+ messages in thread
From: Maarten Lankhorst @ 2018-10-04 9:45 UTC (permalink / raw)
To: intel-gfx
If we look at the correct state instead of crtc->config, we can nuke the
force parameter, and we cleanup a few more users of crtc->config at the
same time.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 91 ++++++++++++++--------------
1 file changed, 45 insertions(+), 46 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index c2a54440dc63..2c59124b2269 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -158,9 +158,9 @@ static void intel_begin_crtc_commit(struct drm_crtc *, struct drm_crtc_state *);
static void intel_finish_crtc_commit(struct drm_crtc *, struct drm_crtc_state *);
static void intel_crtc_init_scalers(struct intel_crtc *crtc,
struct intel_crtc_state *crtc_state);
-static void skylake_pfit_enable(struct intel_crtc *crtc);
-static void ironlake_pfit_disable(struct intel_crtc *crtc, bool force);
-static void ironlake_pfit_enable(struct intel_crtc *crtc);
+static void skylake_pfit_enable(const struct intel_crtc_state *crtc_state);
+static void ironlake_pfit_disable(const struct intel_crtc_state *old_crtc_state);
+static void ironlake_pfit_enable(const struct intel_crtc_state *crtc_state);
static void intel_modeset_setup_hw_state(struct drm_device *dev,
struct drm_modeset_acquire_ctx *ctx);
static void intel_pre_disable_primary_noatomic(struct drm_crtc *crtc);
@@ -3919,12 +3919,12 @@ static void intel_update_pipe_config(const struct intel_crtc_state *old_crtc_sta
skl_detach_scalers(crtc);
if (new_crtc_state->pch_pfit.enabled)
- skylake_pfit_enable(crtc);
+ skylake_pfit_enable(new_crtc_state);
} else if (HAS_PCH_SPLIT(dev_priv)) {
if (new_crtc_state->pch_pfit.enabled)
- ironlake_pfit_enable(crtc);
+ ironlake_pfit_enable(new_crtc_state);
else if (old_crtc_state->pch_pfit.enabled)
- ironlake_pfit_disable(crtc, true);
+ ironlake_pfit_disable(old_crtc_state);
}
}
@@ -5041,19 +5041,19 @@ static void skylake_scaler_disable(struct intel_crtc *crtc)
skl_detach_scaler(crtc, i);
}
-static void skylake_pfit_enable(struct intel_crtc *crtc)
+static void skylake_pfit_enable(const struct intel_crtc_state *crtc_state)
{
- struct drm_device *dev = crtc->base.dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
- int pipe = crtc->pipe;
- struct intel_crtc_scaler_state *scaler_state =
- &crtc->config->scaler_state;
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
+ struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ enum pipe pipe = crtc->pipe;
+ const struct intel_crtc_scaler_state *scaler_state =
+ &crtc_state->scaler_state;
- if (crtc->config->pch_pfit.enabled) {
+ if (crtc_state->pch_pfit.enabled) {
u16 uv_rgb_hphase, uv_rgb_vphase;
int id;
- if (WARN_ON(crtc->config->scaler_state.scaler_id < 0))
+ if (WARN_ON(crtc_state->scaler_state.scaler_id < 0))
return;
uv_rgb_hphase = skl_scaler_calc_phase(1, false);
@@ -5066,18 +5066,18 @@ static void skylake_pfit_enable(struct intel_crtc *crtc)
PS_Y_PHASE(0) | PS_UV_RGB_PHASE(uv_rgb_vphase));
I915_WRITE_FW(SKL_PS_HPHASE(pipe, id),
PS_Y_PHASE(0) | PS_UV_RGB_PHASE(uv_rgb_hphase));
- I915_WRITE(SKL_PS_WIN_POS(pipe, id), crtc->config->pch_pfit.pos);
- I915_WRITE(SKL_PS_WIN_SZ(pipe, id), crtc->config->pch_pfit.size);
+ I915_WRITE(SKL_PS_WIN_POS(pipe, id), crtc_state->pch_pfit.pos);
+ I915_WRITE(SKL_PS_WIN_SZ(pipe, id), crtc_state->pch_pfit.size);
}
}
-static void ironlake_pfit_enable(struct intel_crtc *crtc)
+static void ironlake_pfit_enable(const struct intel_crtc_state *crtc_state)
{
- struct drm_device *dev = crtc->base.dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
+ struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
int pipe = crtc->pipe;
- if (crtc->config->pch_pfit.enabled) {
+ if (crtc_state->pch_pfit.enabled) {
/* Force use of hard-coded filter coefficients
* as some pre-programmed values are broken,
* e.g. x201.
@@ -5087,8 +5087,8 @@ static void ironlake_pfit_enable(struct intel_crtc *crtc)
PF_PIPE_SEL_IVB(pipe));
else
I915_WRITE(PF_CTL(pipe), PF_ENABLE | PF_FILTER_MED_3x3);
- I915_WRITE(PF_WIN_POS(pipe), crtc->config->pch_pfit.pos);
- I915_WRITE(PF_WIN_SZ(pipe), crtc->config->pch_pfit.size);
+ I915_WRITE(PF_WIN_POS(pipe), crtc_state->pch_pfit.pos);
+ I915_WRITE(PF_WIN_SZ(pipe), crtc_state->pch_pfit.size);
}
}
@@ -5620,7 +5620,7 @@ static void ironlake_crtc_enable(struct intel_crtc_state *pipe_config,
assert_fdi_rx_disabled(dev_priv, pipe);
}
- ironlake_pfit_enable(intel_crtc);
+ ironlake_pfit_enable(pipe_config);
/*
* On ILK+ LUT must be loaded before the pipe is running but with
@@ -5752,9 +5752,9 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
glk_pipe_scaler_clock_gating_wa(dev_priv, pipe, true);
if (INTEL_GEN(dev_priv) >= 9)
- skylake_pfit_enable(intel_crtc);
+ skylake_pfit_enable(pipe_config);
else
- ironlake_pfit_enable(intel_crtc);
+ ironlake_pfit_enable(pipe_config);
/*
* On ILK+ LUT must be loaded before the pipe is running but with
@@ -5812,15 +5812,15 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
}
}
-static void ironlake_pfit_disable(struct intel_crtc *crtc, bool force)
+static void ironlake_pfit_disable(const struct intel_crtc_state *old_crtc_state)
{
- struct drm_device *dev = crtc->base.dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
- int pipe = crtc->pipe;
+ struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc);
+ struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ enum pipe pipe = crtc->pipe;
/* To avoid upsetting the power well on haswell only disable the pfit if
* it's in use. The hw state code will make sure we get this right. */
- if (force || crtc->config->pch_pfit.enabled) {
+ if (old_crtc_state->pch_pfit.enabled) {
I915_WRITE(PF_CTL(pipe), 0);
I915_WRITE(PF_WIN_POS(pipe), 0);
I915_WRITE(PF_WIN_SZ(pipe), 0);
@@ -5851,7 +5851,7 @@ static void ironlake_crtc_disable(struct intel_crtc_state *old_crtc_state,
intel_disable_pipe(old_crtc_state);
- ironlake_pfit_disable(intel_crtc, false);
+ ironlake_pfit_disable(old_crtc_state);
if (intel_crtc->config->has_pch_encoder)
ironlake_fdi_disable(crtc);
@@ -5912,7 +5912,7 @@ static void haswell_crtc_disable(struct intel_crtc_state *old_crtc_state,
if (INTEL_GEN(dev_priv) >= 9)
skylake_scaler_disable(intel_crtc);
else
- ironlake_pfit_disable(intel_crtc, false);
+ ironlake_pfit_disable(old_crtc_state);
intel_encoders_post_disable(crtc, old_crtc_state, old_state);
@@ -5920,13 +5920,12 @@ static void haswell_crtc_disable(struct intel_crtc_state *old_crtc_state,
icl_unmap_plls_to_ports(crtc, old_crtc_state, old_state);
}
-static void i9xx_pfit_enable(struct intel_crtc *crtc)
+static void i9xx_pfit_enable(const struct intel_crtc_state *crtc_state)
{
- struct drm_device *dev = crtc->base.dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
- struct intel_crtc_state *pipe_config = crtc->config;
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
+ struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
- if (!pipe_config->gmch_pfit.control)
+ if (!crtc_state->gmch_pfit.control)
return;
/*
@@ -5936,8 +5935,8 @@ static void i9xx_pfit_enable(struct intel_crtc *crtc)
WARN_ON(I915_READ(PFIT_CONTROL) & PFIT_ENABLE);
assert_pipe_disabled(dev_priv, crtc->pipe);
- I915_WRITE(PFIT_PGM_RATIOS, pipe_config->gmch_pfit.pgm_ratios);
- I915_WRITE(PFIT_CONTROL, pipe_config->gmch_pfit.control);
+ I915_WRITE(PFIT_PGM_RATIOS, crtc_state->gmch_pfit.pgm_ratios);
+ I915_WRITE(PFIT_CONTROL, crtc_state->gmch_pfit.control);
/* Border color in case we don't scale up to the full screen. Black by
* default, change to something else for debugging. */
@@ -6093,7 +6092,7 @@ static void valleyview_crtc_enable(struct intel_crtc_state *pipe_config,
intel_encoders_pre_enable(crtc, pipe_config, old_state);
- i9xx_pfit_enable(intel_crtc);
+ i9xx_pfit_enable(pipe_config);
intel_color_load_luts(&pipe_config->base);
@@ -6149,7 +6148,7 @@ static void i9xx_crtc_enable(struct intel_crtc_state *pipe_config,
i9xx_enable_pll(intel_crtc, pipe_config);
- i9xx_pfit_enable(intel_crtc);
+ i9xx_pfit_enable(pipe_config);
intel_color_load_luts(&pipe_config->base);
@@ -6166,12 +6165,12 @@ static void i9xx_crtc_enable(struct intel_crtc_state *pipe_config,
intel_encoders_enable(crtc, pipe_config, old_state);
}
-static void i9xx_pfit_disable(struct intel_crtc *crtc)
+static void i9xx_pfit_disable(const struct intel_crtc_state *old_crtc_state)
{
- struct drm_device *dev = crtc->base.dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
+ struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc);
+ struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
- if (!crtc->config->gmch_pfit.control)
+ if (!old_crtc_state->gmch_pfit.control)
return;
assert_pipe_disabled(dev_priv, crtc->pipe);
@@ -6204,7 +6203,7 @@ static void i9xx_crtc_disable(struct intel_crtc_state *old_crtc_state,
intel_disable_pipe(old_crtc_state);
- i9xx_pfit_disable(intel_crtc);
+ i9xx_pfit_disable(old_crtc_state);
intel_encoders_post_disable(crtc, old_crtc_state, old_state);
--
2.19.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v2 03/13] drm/i915: Make intel_set_pipe_timings/src_size take a pointer to crtc_state
2018-10-04 9:45 [PATCH v2 00/13] drm/i915: First cleanup pass to get rid of more crtc->config users Maarten Lankhorst
2018-10-04 9:45 ` [PATCH v2 01/13] drm/i915: Remove dereferences of crtc->config in set_pipeconf/misc functions, v2 Maarten Lankhorst
2018-10-04 9:45 ` [PATCH v2 02/13] drm/i915: Make panel fitter functions take state Maarten Lankhorst
@ 2018-10-04 9:45 ` Maarten Lankhorst
2018-10-04 9:45 ` [PATCH v2 04/13] drm/i915: Use crtc_state in ironlake_enable_pch_transcoder Maarten Lankhorst
` (17 subsequent siblings)
20 siblings, 0 replies; 30+ messages in thread
From: Maarten Lankhorst @ 2018-10-04 9:45 UTC (permalink / raw)
To: intel-gfx
Pass the state instead of looking at crtc->config and rename intel_crtc
to crtc.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 47 ++++++++++++++--------------
1 file changed, 23 insertions(+), 24 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 2c59124b2269..4b13f3a1ad28 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -141,8 +141,8 @@ static void ironlake_pch_clock_get(struct intel_crtc *crtc,
static int intel_framebuffer_init(struct intel_framebuffer *ifb,
struct drm_i915_gem_object *obj,
struct drm_mode_fb_cmd2 *mode_cmd);
-static void intel_set_pipe_timings(struct intel_crtc *intel_crtc);
-static void intel_set_pipe_src_size(struct intel_crtc *intel_crtc);
+static void intel_set_pipe_timings(const struct intel_crtc_state *crtc_state);
+static void intel_set_pipe_src_size(const struct intel_crtc_state *crtc_state);
static void intel_cpu_transcoder_set_m_n(struct intel_crtc *crtc,
struct intel_link_m_n *m_n,
struct intel_link_m_n *m2_n2);
@@ -5596,8 +5596,8 @@ static void ironlake_crtc_enable(struct intel_crtc_state *pipe_config,
if (intel_crtc_has_dp_encoder(intel_crtc->config))
intel_dp_set_m_n(intel_crtc, M1_N1);
- intel_set_pipe_timings(intel_crtc);
- intel_set_pipe_src_size(intel_crtc);
+ intel_set_pipe_timings(pipe_config);
+ intel_set_pipe_src_size(pipe_config);
if (intel_crtc->config->has_pch_encoder) {
intel_cpu_transcoder_set_m_n(intel_crtc,
@@ -5721,9 +5721,9 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
intel_dp_set_m_n(intel_crtc, M1_N1);
if (!transcoder_is_dsi(cpu_transcoder))
- intel_set_pipe_timings(intel_crtc);
+ intel_set_pipe_timings(pipe_config);
- intel_set_pipe_src_size(intel_crtc);
+ intel_set_pipe_src_size(pipe_config);
if (cpu_transcoder != TRANSCODER_EDP &&
!transcoder_is_dsi(cpu_transcoder)) {
@@ -6062,12 +6062,10 @@ static void valleyview_crtc_enable(struct intel_crtc_state *pipe_config,
if (intel_crtc_has_dp_encoder(intel_crtc->config))
intel_dp_set_m_n(intel_crtc, M1_N1);
- intel_set_pipe_timings(intel_crtc);
- intel_set_pipe_src_size(intel_crtc);
+ intel_set_pipe_timings(pipe_config);
+ intel_set_pipe_src_size(pipe_config);
if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_B) {
- struct drm_i915_private *dev_priv = to_i915(dev);
-
I915_WRITE(CHV_BLEND(pipe), CHV_BLEND_LEGACY);
I915_WRITE(CHV_CANVAS(pipe), 0);
}
@@ -6134,8 +6132,8 @@ static void i9xx_crtc_enable(struct intel_crtc_state *pipe_config,
if (intel_crtc_has_dp_encoder(intel_crtc->config))
intel_dp_set_m_n(intel_crtc, M1_N1);
- intel_set_pipe_timings(intel_crtc);
- intel_set_pipe_src_size(intel_crtc);
+ intel_set_pipe_timings(pipe_config);
+ intel_set_pipe_src_size(pipe_config);
i9xx_set_pipeconf(pipe_config);
@@ -7331,12 +7329,13 @@ static void i8xx_compute_dpll(struct intel_crtc *crtc,
crtc_state->dpll_hw_state.dpll = dpll;
}
-static void intel_set_pipe_timings(struct intel_crtc *intel_crtc)
+static void intel_set_pipe_timings(const struct intel_crtc_state *crtc_state)
{
- struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);
- enum pipe pipe = intel_crtc->pipe;
- enum transcoder cpu_transcoder = intel_crtc->config->cpu_transcoder;
- const struct drm_display_mode *adjusted_mode = &intel_crtc->config->base.adjusted_mode;
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
+ struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ enum pipe pipe = crtc->pipe;
+ enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
+ const struct drm_display_mode *adjusted_mode = &crtc_state->base.adjusted_mode;
uint32_t crtc_vtotal, crtc_vblank_end;
int vsyncshift = 0;
@@ -7350,7 +7349,7 @@ static void intel_set_pipe_timings(struct intel_crtc *intel_crtc)
crtc_vtotal -= 1;
crtc_vblank_end -= 1;
- if (intel_crtc_has_type(intel_crtc->config, INTEL_OUTPUT_SDVO))
+ if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_SDVO))
vsyncshift = (adjusted_mode->crtc_htotal - 1) / 2;
else
vsyncshift = adjusted_mode->crtc_hsync_start -
@@ -7392,18 +7391,18 @@ static void intel_set_pipe_timings(struct intel_crtc *intel_crtc)
}
-static void intel_set_pipe_src_size(struct intel_crtc *intel_crtc)
+static void intel_set_pipe_src_size(const struct intel_crtc_state *crtc_state)
{
- struct drm_device *dev = intel_crtc->base.dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
- enum pipe pipe = intel_crtc->pipe;
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
+ struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ enum pipe pipe = crtc->pipe;
/* pipesrc controls the size that is scaled from, which should
* always be the user's requested size.
*/
I915_WRITE(PIPESRC(pipe),
- ((intel_crtc->config->pipe_src_w - 1) << 16) |
- (intel_crtc->config->pipe_src_h - 1));
+ ((crtc_state->pipe_src_w - 1) << 16) |
+ (crtc_state->pipe_src_h - 1));
}
static void intel_get_pipe_timings(struct intel_crtc *crtc,
--
2.19.0
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v2 04/13] drm/i915: Use crtc_state in ironlake_enable_pch_transcoder
2018-10-04 9:45 [PATCH v2 00/13] drm/i915: First cleanup pass to get rid of more crtc->config users Maarten Lankhorst
` (2 preceding siblings ...)
2018-10-04 9:45 ` [PATCH v2 03/13] drm/i915: Make intel_set_pipe_timings/src_size take a pointer to crtc_state Maarten Lankhorst
@ 2018-10-04 9:45 ` Maarten Lankhorst
2018-10-04 9:45 ` [PATCH v2 05/13] drm/i915: Make skl_detach_scalers take crtc_state Maarten Lankhorst
` (16 subsequent siblings)
20 siblings, 0 replies; 30+ messages in thread
From: Maarten Lankhorst @ 2018-10-04 9:45 UTC (permalink / raw)
To: intel-gfx
Rename intel_crtc to crtc, and pass crtc_state so we don't have to
dereference crtc->config.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 4b13f3a1ad28..6f2b613be3cb 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1666,16 +1666,16 @@ void vlv_wait_port_ready(struct drm_i915_private *dev_priv,
I915_READ(dpll_reg) & port_mask, expected_mask);
}
-static void ironlake_enable_pch_transcoder(struct drm_i915_private *dev_priv,
- enum pipe pipe)
+static void ironlake_enable_pch_transcoder(const struct intel_crtc_state *crtc_state)
{
- struct intel_crtc *intel_crtc = intel_get_crtc_for_pipe(dev_priv,
- pipe);
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
+ struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ enum pipe pipe = crtc->pipe;
i915_reg_t reg;
uint32_t val, pipeconf_val;
/* Make sure PCH DPLL is enabled */
- assert_shared_dpll_enabled(dev_priv, intel_crtc->config->shared_dpll);
+ assert_shared_dpll_enabled(dev_priv, crtc_state->shared_dpll);
/* FDI must be feeding us bits for PCH ports */
assert_fdi_tx_enabled(dev_priv, pipe);
@@ -1701,7 +1701,7 @@ static void ironlake_enable_pch_transcoder(struct drm_i915_private *dev_priv,
* here for both 8bpc and 12bpc.
*/
val &= ~PIPECONF_BPC_MASK;
- if (intel_crtc_has_type(intel_crtc->config, INTEL_OUTPUT_HDMI))
+ if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
val |= PIPECONF_8BPC;
else
val |= pipeconf_val & PIPECONF_BPC_MASK;
@@ -1710,7 +1710,7 @@ static void ironlake_enable_pch_transcoder(struct drm_i915_private *dev_priv,
val &= ~TRANS_INTERLACE_MASK;
if ((pipeconf_val & PIPECONF_INTERLACE_MASK) == PIPECONF_INTERLACED_ILK)
if (HAS_PCH_IBX(dev_priv) &&
- intel_crtc_has_type(intel_crtc->config, INTEL_OUTPUT_SDVO))
+ intel_crtc_has_type(crtc_state, INTEL_OUTPUT_SDVO))
val |= TRANS_LEGACY_INTERLACED_ILK;
else
val |= TRANS_INTERLACED;
@@ -4784,7 +4784,7 @@ static void ironlake_pch_enable(const struct intel_atomic_state *state,
I915_WRITE(reg, temp);
}
- ironlake_enable_pch_transcoder(dev_priv, pipe);
+ ironlake_enable_pch_transcoder(crtc_state);
}
static void lpt_pch_enable(const struct intel_atomic_state *state,
--
2.19.0
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v2 05/13] drm/i915: Make skl_detach_scalers take crtc_state
2018-10-04 9:45 [PATCH v2 00/13] drm/i915: First cleanup pass to get rid of more crtc->config users Maarten Lankhorst
` (3 preceding siblings ...)
2018-10-04 9:45 ` [PATCH v2 04/13] drm/i915: Use crtc_state in ironlake_enable_pch_transcoder Maarten Lankhorst
@ 2018-10-04 9:45 ` Maarten Lankhorst
2018-10-04 9:45 ` [PATCH v2 06/13] drm/i915: Make pll functions take crtc_state, v2 Maarten Lankhorst
` (15 subsequent siblings)
20 siblings, 0 replies; 30+ messages in thread
From: Maarten Lankhorst @ 2018-10-04 9:45 UTC (permalink / raw)
To: intel-gfx
Rename intel_crtc to crtc, and pass crtc_state instead of looking at
crtc->config.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 6f2b613be3cb..bc1238628138 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3502,13 +3502,13 @@ static void skl_detach_scaler(struct intel_crtc *intel_crtc, int id)
/*
* This function detaches (aka. unbinds) unused scalers in hardware
*/
-static void skl_detach_scalers(struct intel_crtc *intel_crtc)
+static void skl_detach_scalers(const struct intel_crtc_state *crtc_state)
{
- struct intel_crtc_scaler_state *scaler_state;
+ struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc);
+ const struct intel_crtc_scaler_state *scaler_state =
+ &crtc_state->scaler_state;
int i;
- scaler_state = &intel_crtc->config->scaler_state;
-
/* loop through and disable scalers that aren't in use */
for (i = 0; i < intel_crtc->num_scalers; i++) {
if (!scaler_state->scalers[i].in_use)
@@ -3916,7 +3916,7 @@ static void intel_update_pipe_config(const struct intel_crtc_state *old_crtc_sta
/* on skylake this is done by detaching scalers */
if (INTEL_GEN(dev_priv) >= 9) {
- skl_detach_scalers(crtc);
+ skl_detach_scalers(new_crtc_state);
if (new_crtc_state->pch_pfit.enabled)
skylake_pfit_enable(new_crtc_state);
@@ -13335,7 +13335,7 @@ static void intel_begin_crtc_commit(struct drm_crtc *crtc,
if (intel_cstate->update_pipe)
intel_update_pipe_config(old_intel_cstate, intel_cstate);
else if (INTEL_GEN(dev_priv) >= 9)
- skl_detach_scalers(intel_crtc);
+ skl_detach_scalers(intel_cstate);
out:
if (dev_priv->display.atomic_update_watermarks)
--
2.19.0
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v2 06/13] drm/i915: Make pll functions take crtc_state, v2.
2018-10-04 9:45 [PATCH v2 00/13] drm/i915: First cleanup pass to get rid of more crtc->config users Maarten Lankhorst
` (4 preceding siblings ...)
2018-10-04 9:45 ` [PATCH v2 05/13] drm/i915: Make skl_detach_scalers take crtc_state Maarten Lankhorst
@ 2018-10-04 9:45 ` Maarten Lankhorst
2018-10-04 9:45 ` [PATCH v2 07/13] drm/i915: Make ironlake_pch_transcoder_set_timings take crtc_state Maarten Lankhorst
` (14 subsequent siblings)
20 siblings, 0 replies; 30+ messages in thread
From: Maarten Lankhorst @ 2018-10-04 9:45 UTC (permalink / raw)
To: intel-gfx
Instead of passing crtc and dereferencing crtc->config,
passs the correct crtc_state and obtain the crtc pointer from there.
Changes since v1:
- Move vlv/chv changes and i9xx_set_pll_dividers changes
from crtc_enable/disable patches to here.
- Add commit message.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 37 ++++++++++++++--------------
1 file changed, 19 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index bc1238628138..e6f8dbb17dd2 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1565,14 +1565,15 @@ static void i9xx_enable_pll(struct intel_crtc *crtc,
}
}
-static void i9xx_disable_pll(struct intel_crtc *crtc)
+static void i9xx_disable_pll(const struct intel_crtc_state *crtc_state)
{
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
enum pipe pipe = crtc->pipe;
/* Disable DVO 2x clock on both PLLs if necessary */
if (IS_I830(dev_priv) &&
- intel_crtc_has_type(crtc->config, INTEL_OUTPUT_DVO) &&
+ intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DVO) &&
!intel_num_dvo_pipes(dev_priv)) {
I915_WRITE(DPLL(PIPE_B),
I915_READ(DPLL(PIPE_B)) & ~DPLL_DVO_2X_MODE);
@@ -4323,10 +4324,10 @@ static void ivb_manual_fdi_link_train(struct intel_crtc *crtc,
DRM_DEBUG_KMS("FDI train done.\n");
}
-static void ironlake_fdi_pll_enable(struct intel_crtc *intel_crtc)
+static void ironlake_fdi_pll_enable(const struct intel_crtc_state *crtc_state)
{
- struct drm_device *dev = intel_crtc->base.dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
+ struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc);
+ struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);
int pipe = intel_crtc->pipe;
i915_reg_t reg;
u32 temp;
@@ -4335,7 +4336,7 @@ static void ironlake_fdi_pll_enable(struct intel_crtc *intel_crtc)
reg = FDI_RX_CTL(pipe);
temp = I915_READ(reg);
temp &= ~(FDI_DP_PORT_WIDTH_MASK | (0x7 << 16));
- temp |= FDI_DP_PORT_WIDTH(intel_crtc->config->fdi_lanes);
+ temp |= FDI_DP_PORT_WIDTH(crtc_state->fdi_lanes);
temp |= (I915_READ(PIPECONF(pipe)) & PIPECONF_BPC_MASK) << 11;
I915_WRITE(reg, temp | FDI_RX_PLL_ENABLE);
@@ -5614,7 +5615,7 @@ static void ironlake_crtc_enable(struct intel_crtc_state *pipe_config,
/* Note: FDI PLL enabling _must_ be done before we enable the
* cpu pipes, hence this is separate from all the other fdi/pch
* enabling. */
- ironlake_fdi_pll_enable(intel_crtc);
+ ironlake_fdi_pll_enable(pipe_config);
} else {
assert_fdi_tx_disabled(dev_priv, pipe);
assert_fdi_rx_disabled(dev_priv, pipe);
@@ -6081,11 +6082,11 @@ static void valleyview_crtc_enable(struct intel_crtc_state *pipe_config,
intel_encoders_pre_pll_enable(crtc, pipe_config, old_state);
if (IS_CHERRYVIEW(dev_priv)) {
- chv_prepare_pll(intel_crtc, intel_crtc->config);
- chv_enable_pll(intel_crtc, intel_crtc->config);
+ chv_prepare_pll(intel_crtc, pipe_config);
+ chv_enable_pll(intel_crtc, pipe_config);
} else {
- vlv_prepare_pll(intel_crtc, intel_crtc->config);
- vlv_enable_pll(intel_crtc, intel_crtc->config);
+ vlv_prepare_pll(intel_crtc, pipe_config);
+ vlv_enable_pll(intel_crtc, pipe_config);
}
intel_encoders_pre_enable(crtc, pipe_config, old_state);
@@ -6104,13 +6105,13 @@ static void valleyview_crtc_enable(struct intel_crtc_state *pipe_config,
intel_encoders_enable(crtc, pipe_config, old_state);
}
-static void i9xx_set_pll_dividers(struct intel_crtc *crtc)
+static void i9xx_set_pll_dividers(const struct intel_crtc_state *crtc_state)
{
- struct drm_device *dev = crtc->base.dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
+ struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
- I915_WRITE(FP0(crtc->pipe), crtc->config->dpll_hw_state.fp0);
- I915_WRITE(FP1(crtc->pipe), crtc->config->dpll_hw_state.fp1);
+ I915_WRITE(FP0(crtc->pipe), crtc_state->dpll_hw_state.fp0);
+ I915_WRITE(FP1(crtc->pipe), crtc_state->dpll_hw_state.fp1);
}
static void i9xx_crtc_enable(struct intel_crtc_state *pipe_config,
@@ -6127,7 +6128,7 @@ static void i9xx_crtc_enable(struct intel_crtc_state *pipe_config,
if (WARN_ON(intel_crtc->active))
return;
- i9xx_set_pll_dividers(intel_crtc);
+ i9xx_set_pll_dividers(pipe_config);
if (intel_crtc_has_dp_encoder(intel_crtc->config))
intel_dp_set_m_n(intel_crtc, M1_N1);
@@ -6211,7 +6212,7 @@ static void i9xx_crtc_disable(struct intel_crtc_state *old_crtc_state,
else if (IS_VALLEYVIEW(dev_priv))
vlv_disable_pll(dev_priv, pipe);
else
- i9xx_disable_pll(intel_crtc);
+ i9xx_disable_pll(old_crtc_state);
}
intel_encoders_post_pll_disable(crtc, old_crtc_state, old_state);
--
2.19.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v2 07/13] drm/i915: Make ironlake_pch_transcoder_set_timings take crtc_state
2018-10-04 9:45 [PATCH v2 00/13] drm/i915: First cleanup pass to get rid of more crtc->config users Maarten Lankhorst
` (5 preceding siblings ...)
2018-10-04 9:45 ` [PATCH v2 06/13] drm/i915: Make pll functions take crtc_state, v2 Maarten Lankhorst
@ 2018-10-04 9:45 ` Maarten Lankhorst
2018-10-04 9:45 ` [PATCH v2 08/13] drm/i915: Make shared dpll functions " Maarten Lankhorst
` (13 subsequent siblings)
20 siblings, 0 replies; 30+ messages in thread
From: Maarten Lankhorst @ 2018-10-04 9:45 UTC (permalink / raw)
To: intel-gfx
Instead of passing crtc and dereferencing crtc->config,
pass the correct crtc_state and obtain the crtc pointer from there.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index e6f8dbb17dd2..fe8ccbdd4ea1 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4599,12 +4599,12 @@ int lpt_get_iclkip(struct drm_i915_private *dev_priv)
desired_divisor << auxdiv);
}
-static void ironlake_pch_transcoder_set_timings(struct intel_crtc *crtc,
+static void ironlake_pch_transcoder_set_timings(const struct intel_crtc_state *crtc_state,
enum pipe pch_transcoder)
{
- struct drm_device *dev = crtc->base.dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
- enum transcoder cpu_transcoder = crtc->config->cpu_transcoder;
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
+ struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
I915_WRITE(PCH_TRANS_HTOTAL(pch_transcoder),
I915_READ(HTOTAL(cpu_transcoder)));
@@ -4753,7 +4753,7 @@ static void ironlake_pch_enable(const struct intel_atomic_state *state,
/* set transcoder timing, panel must allow it */
assert_panel_unlocked(dev_priv, pipe);
- ironlake_pch_transcoder_set_timings(crtc, pipe);
+ ironlake_pch_transcoder_set_timings(crtc_state, pipe);
intel_fdi_normal_train(crtc);
@@ -4800,7 +4800,7 @@ static void lpt_pch_enable(const struct intel_atomic_state *state,
lpt_program_iclkip(crtc);
/* Set transcoder timing. */
- ironlake_pch_transcoder_set_timings(crtc, PIPE_A);
+ ironlake_pch_transcoder_set_timings(crtc_state, PIPE_A);
lpt_enable_pch_transcoder(dev_priv, cpu_transcoder);
}
--
2.19.0
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v2 08/13] drm/i915: Make shared dpll functions take crtc_state
2018-10-04 9:45 [PATCH v2 00/13] drm/i915: First cleanup pass to get rid of more crtc->config users Maarten Lankhorst
` (6 preceding siblings ...)
2018-10-04 9:45 ` [PATCH v2 07/13] drm/i915: Make ironlake_pch_transcoder_set_timings take crtc_state Maarten Lankhorst
@ 2018-10-04 9:45 ` Maarten Lankhorst
2018-10-04 12:57 ` Ville Syrjälä
2018-10-04 9:46 ` [PATCH v2 09/13] drm/i915: Get rid of crtc->config from icl_pll_to_ddi_pll_sel Maarten Lankhorst
` (12 subsequent siblings)
20 siblings, 1 reply; 30+ messages in thread
From: Maarten Lankhorst @ 2018-10-04 9:45 UTC (permalink / raw)
To: intel-gfx
Do not rely on crtc->config any more. Remove the assertion from
ibx_pch_dpll_disable, because we the dpll state tracking should
already handle this case correctly.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 14 ++++++------
drivers/gpu/drm/i915/intel_dpll_mgr.c | 31 +++++++++++----------------
drivers/gpu/drm/i915/intel_dpll_mgr.h | 6 +++---
3 files changed, 22 insertions(+), 29 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index fe8ccbdd4ea1..4df4293a7917 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4749,7 +4749,7 @@ static void ironlake_pch_enable(const struct intel_atomic_state *state,
* Note that enable_shared_dpll tries to do the right thing, but
* get_shared_dpll unconditionally resets the pll - we need that to have
* the right LVDS enable sequence. */
- intel_enable_shared_dpll(crtc);
+ intel_enable_shared_dpll(crtc_state);
/* set transcoder timing, panel must allow it */
assert_panel_unlocked(dev_priv, pipe);
@@ -5591,8 +5591,8 @@ static void ironlake_crtc_enable(struct intel_crtc_state *pipe_config,
intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false);
intel_set_pch_fifo_underrun_reporting(dev_priv, pipe, false);
- if (intel_crtc->config->has_pch_encoder)
- intel_prepare_shared_dpll(intel_crtc);
+ if (pipe_config->has_pch_encoder)
+ intel_prepare_shared_dpll(pipe_config);
if (intel_crtc_has_dp_encoder(intel_crtc->config))
intel_dp_set_m_n(intel_crtc, M1_N1);
@@ -5710,8 +5710,8 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
intel_encoders_pre_pll_enable(crtc, pipe_config, old_state);
- if (intel_crtc->config->shared_dpll)
- intel_enable_shared_dpll(intel_crtc);
+ if (pipe_config->shared_dpll)
+ intel_enable_shared_dpll(pipe_config);
if (INTEL_GEN(dev_priv) >= 11)
icl_map_plls_to_ports(crtc, pipe_config, old_state);
@@ -6286,7 +6286,7 @@ static void intel_crtc_disable_noatomic(struct drm_crtc *crtc,
intel_fbc_disable(intel_crtc);
intel_update_watermarks(intel_crtc);
- intel_disable_shared_dpll(intel_crtc);
+ intel_disable_shared_dpll(crtc_state);
domains = intel_crtc->enabled_power_domains;
for_each_power_domain(domain, domains)
@@ -12735,7 +12735,7 @@ static void intel_atomic_commit_tail(struct drm_atomic_state *state)
dev_priv->display.crtc_disable(old_intel_crtc_state, state);
intel_crtc->active = false;
intel_fbc_disable(intel_crtc);
- intel_disable_shared_dpll(intel_crtc);
+ intel_disable_shared_dpll(old_intel_crtc_state);
/*
* Underruns don't always raise
diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c b/drivers/gpu/drm/i915/intel_dpll_mgr.c
index e6cac9225536..54662c974c0b 100644
--- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
@@ -131,13 +131,13 @@ void assert_shared_dpll(struct drm_i915_private *dev_priv,
* This calls the PLL's prepare hook if it has one and if the PLL is not
* already enabled. The prepare hook is platform specific.
*/
-void intel_prepare_shared_dpll(struct intel_crtc *crtc)
+void intel_prepare_shared_dpll(const struct intel_crtc_state *crtc_state)
{
- struct drm_device *dev = crtc->base.dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
- struct intel_shared_dpll *pll = crtc->config->shared_dpll;
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
+ struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ struct intel_shared_dpll *pll = crtc_state->shared_dpll;
- if (WARN_ON(pll == NULL))
+ if (!WARN_ON(!pll))
return;
mutex_lock(&dev_priv->dpll_lock);
@@ -158,11 +158,11 @@ void intel_prepare_shared_dpll(struct intel_crtc *crtc)
*
* Enable the shared DPLL used by @crtc.
*/
-void intel_enable_shared_dpll(struct intel_crtc *crtc)
+void intel_enable_shared_dpll(const struct intel_crtc_state *crtc_state)
{
- struct drm_device *dev = crtc->base.dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
- struct intel_shared_dpll *pll = crtc->config->shared_dpll;
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
+ struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ struct intel_shared_dpll *pll = crtc_state->shared_dpll;
unsigned int crtc_mask = drm_crtc_mask(&crtc->base);
unsigned int old_mask;
@@ -203,10 +203,11 @@ void intel_enable_shared_dpll(struct intel_crtc *crtc)
*
* Disable the shared DPLL used by @crtc.
*/
-void intel_disable_shared_dpll(struct intel_crtc *crtc)
+void intel_disable_shared_dpll(const struct intel_crtc_state *crtc_state)
{
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
- struct intel_shared_dpll *pll = crtc->config->shared_dpll;
+ struct intel_shared_dpll *pll = crtc_state->shared_dpll;
unsigned int crtc_mask = drm_crtc_mask(&crtc->base);
/* PCH only available on ILK+ */
@@ -409,14 +410,6 @@ static void ibx_pch_dpll_disable(struct drm_i915_private *dev_priv,
struct intel_shared_dpll *pll)
{
const enum intel_dpll_id id = pll->info->id;
- struct drm_device *dev = &dev_priv->drm;
- struct intel_crtc *crtc;
-
- /* Make sure no transcoder isn't still depending on us. */
- for_each_intel_crtc(dev, crtc) {
- if (crtc->config->shared_dpll == pll)
- assert_pch_transcoder_disabled(dev_priv, crtc->pipe);
- }
I915_WRITE(PCH_DPLL(id), 0);
POSTING_READ(PCH_DPLL(id));
diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.h b/drivers/gpu/drm/i915/intel_dpll_mgr.h
index bf0de8a4dc63..9c033236f2ba 100644
--- a/drivers/gpu/drm/i915/intel_dpll_mgr.h
+++ b/drivers/gpu/drm/i915/intel_dpll_mgr.h
@@ -334,9 +334,9 @@ struct intel_shared_dpll *intel_get_shared_dpll(struct intel_crtc *crtc,
void intel_release_shared_dpll(struct intel_shared_dpll *dpll,
struct intel_crtc *crtc,
struct drm_atomic_state *state);
-void intel_prepare_shared_dpll(struct intel_crtc *crtc);
-void intel_enable_shared_dpll(struct intel_crtc *crtc);
-void intel_disable_shared_dpll(struct intel_crtc *crtc);
+void intel_prepare_shared_dpll(const struct intel_crtc_state *crtc_state);
+void intel_enable_shared_dpll(const struct intel_crtc_state *crtc_state);
+void intel_disable_shared_dpll(const struct intel_crtc_state *crtc_state);
void intel_shared_dpll_swap_state(struct drm_atomic_state *state);
void intel_shared_dpll_init(struct drm_device *dev);
--
2.19.0
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v2 09/13] drm/i915: Get rid of crtc->config from icl_pll_to_ddi_pll_sel
2018-10-04 9:45 [PATCH v2 00/13] drm/i915: First cleanup pass to get rid of more crtc->config users Maarten Lankhorst
` (7 preceding siblings ...)
2018-10-04 9:45 ` [PATCH v2 08/13] drm/i915: Make shared dpll functions " Maarten Lankhorst
@ 2018-10-04 9:46 ` Maarten Lankhorst
2018-10-04 9:46 ` [PATCH v2 10/13] drm/i915: Use crtc->state in intel_fbdev_init_bios Maarten Lankhorst
` (11 subsequent siblings)
20 siblings, 0 replies; 30+ messages in thread
From: Maarten Lankhorst @ 2018-10-04 9:46 UTC (permalink / raw)
To: intel-gfx
Pass the full state to intel_ddi_clk_select, so we can pass it
to icl_pll_to_ddi_pll_sel instead of passign the crtc and having
to dereference crtc->config
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_ddi.c | 15 ++++++++-------
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index b6594948b617..9e82281b4fdf 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -1060,10 +1060,10 @@ static uint32_t hsw_pll_to_ddi_pll_sel(const struct intel_shared_dpll *pll)
}
static uint32_t icl_pll_to_ddi_pll_sel(struct intel_encoder *encoder,
- const struct intel_shared_dpll *pll)
+ const struct intel_crtc_state *crtc_state)
{
- struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
- int clock = crtc->config->port_clock;
+ const struct intel_shared_dpll *pll = crtc_state->shared_dpll;
+ int clock = crtc_state->port_clock;
const enum intel_dpll_id id = pll->info->id;
switch (id) {
@@ -2798,11 +2798,12 @@ void icl_unmap_plls_to_ports(struct drm_crtc *crtc,
}
static void intel_ddi_clk_select(struct intel_encoder *encoder,
- const struct intel_shared_dpll *pll)
+ const struct intel_crtc_state *crtc_state)
{
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
enum port port = encoder->port;
uint32_t val;
+ const struct intel_shared_dpll *pll = crtc_state->shared_dpll;
if (WARN_ON(!pll))
return;
@@ -2812,7 +2813,7 @@ static void intel_ddi_clk_select(struct intel_encoder *encoder,
if (IS_ICELAKE(dev_priv)) {
if (port >= PORT_C)
I915_WRITE(DDI_CLK_SEL(port),
- icl_pll_to_ddi_pll_sel(encoder, pll));
+ icl_pll_to_ddi_pll_sel(encoder, crtc_state));
} else if (IS_CANNONLAKE(dev_priv)) {
/* Configure DPCLKA_CFGCR0 to map the DPLL to the DDI. */
val = I915_READ(DPCLKA_CFGCR0);
@@ -2886,7 +2887,7 @@ static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder,
intel_edp_panel_on(intel_dp);
- intel_ddi_clk_select(encoder, crtc_state->shared_dpll);
+ intel_ddi_clk_select(encoder, crtc_state);
intel_display_power_get(dev_priv, dig_port->ddi_io_power_domain);
@@ -2928,7 +2929,7 @@ static void intel_ddi_pre_enable_hdmi(struct intel_encoder *encoder,
struct intel_digital_port *dig_port = enc_to_dig_port(&encoder->base);
intel_dp_dual_mode_set_tmds_output(intel_hdmi, true);
- intel_ddi_clk_select(encoder, crtc_state->shared_dpll);
+ intel_ddi_clk_select(encoder, crtc_state);
intel_display_power_get(dev_priv, dig_port->ddi_io_power_domain);
--
2.19.0
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v2 10/13] drm/i915: Use crtc->state in intel_fbdev_init_bios
2018-10-04 9:45 [PATCH v2 00/13] drm/i915: First cleanup pass to get rid of more crtc->config users Maarten Lankhorst
` (8 preceding siblings ...)
2018-10-04 9:46 ` [PATCH v2 09/13] drm/i915: Get rid of crtc->config from icl_pll_to_ddi_pll_sel Maarten Lankhorst
@ 2018-10-04 9:46 ` Maarten Lankhorst
2018-10-04 9:46 ` [PATCH v2 11/13] drm/i915: Get rid of crtc->config dereference in intel_dp_retrain_link Maarten Lankhorst
` (10 subsequent siblings)
20 siblings, 0 replies; 30+ messages in thread
From: Maarten Lankhorst @ 2018-10-04 9:46 UTC (permalink / raw)
To: intel-gfx
fbdev init shouldn't race with userspace since it's called from
intel_modeset_init, so it's safe to dereference crtc->state and
assume nothing changed yet.
At least not more harmful than crtc->config.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_fbdev.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_fbdev.c b/drivers/gpu/drm/i915/intel_fbdev.c
index f99332972b7a..2480c7d6edee 100644
--- a/drivers/gpu/drm/i915/intel_fbdev.c
+++ b/drivers/gpu/drm/i915/intel_fbdev.c
@@ -593,7 +593,7 @@ static bool intel_fbdev_init_bios(struct drm_device *dev,
* pipe. Note we need to use the selected fb's pitch and bpp
* rather than the current pipe's, since they differ.
*/
- cur_size = intel_crtc->config->base.adjusted_mode.crtc_hdisplay;
+ cur_size = crtc->state->adjusted_mode.crtc_hdisplay;
cur_size = cur_size * fb->base.format->cpp[0];
if (fb->base.pitches[0] < cur_size) {
DRM_DEBUG_KMS("fb not wide enough for plane %c (%d vs %d)\n",
@@ -603,13 +603,13 @@ static bool intel_fbdev_init_bios(struct drm_device *dev,
break;
}
- cur_size = intel_crtc->config->base.adjusted_mode.crtc_vdisplay;
+ cur_size = crtc->state->adjusted_mode.crtc_vdisplay;
cur_size = intel_fb_align_height(&fb->base, 0, cur_size);
cur_size *= fb->base.pitches[0];
DRM_DEBUG_KMS("pipe %c area: %dx%d, bpp: %d, size: %d\n",
pipe_name(intel_crtc->pipe),
- intel_crtc->config->base.adjusted_mode.crtc_hdisplay,
- intel_crtc->config->base.adjusted_mode.crtc_vdisplay,
+ crtc->state->adjusted_mode.crtc_hdisplay,
+ crtc->state->adjusted_mode.crtc_vdisplay,
fb->base.format->cpp[0] * 8,
cur_size);
--
2.19.0
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v2 11/13] drm/i915: Get rid of crtc->config dereference in intel_dp_retrain_link
2018-10-04 9:45 [PATCH v2 00/13] drm/i915: First cleanup pass to get rid of more crtc->config users Maarten Lankhorst
` (9 preceding siblings ...)
2018-10-04 9:46 ` [PATCH v2 10/13] drm/i915: Use crtc->state in intel_fbdev_init_bios Maarten Lankhorst
@ 2018-10-04 9:46 ` Maarten Lankhorst
2018-10-04 9:46 ` [PATCH v2 12/13] drm/i915: Get rid of crtc->config in chv_data_lane_soft_reset Maarten Lankhorst
` (9 subsequent siblings)
20 siblings, 0 replies; 30+ messages in thread
From: Maarten Lankhorst @ 2018-10-04 9:46 UTC (permalink / raw)
To: intel-gfx
We're already using crtc_state here and made sure no modeset is occuring
by looking at conn_state->commit->hw_done, so there's no need to
dereference crtc->config.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_dp.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 15a981ef5966..d9cc52b2ba79 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -4417,7 +4417,7 @@ int intel_dp_retrain_link(struct intel_encoder *encoder,
/* Suppress underruns caused by re-training */
intel_set_cpu_fifo_underrun_reporting(dev_priv, crtc->pipe, false);
- if (crtc->config->has_pch_encoder)
+ if (crtc_state->has_pch_encoder)
intel_set_pch_fifo_underrun_reporting(dev_priv,
intel_crtc_pch_transcoder(crtc), false);
@@ -4428,7 +4428,7 @@ int intel_dp_retrain_link(struct intel_encoder *encoder,
intel_wait_for_vblank(dev_priv, crtc->pipe);
intel_set_cpu_fifo_underrun_reporting(dev_priv, crtc->pipe, true);
- if (crtc->config->has_pch_encoder)
+ if (crtc_state->has_pch_encoder)
intel_set_pch_fifo_underrun_reporting(dev_priv,
intel_crtc_pch_transcoder(crtc), true);
--
2.19.0
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v2 12/13] drm/i915: Get rid of crtc->config in chv_data_lane_soft_reset
2018-10-04 9:45 [PATCH v2 00/13] drm/i915: First cleanup pass to get rid of more crtc->config users Maarten Lankhorst
` (10 preceding siblings ...)
2018-10-04 9:46 ` [PATCH v2 11/13] drm/i915: Get rid of crtc->config dereference in intel_dp_retrain_link Maarten Lankhorst
@ 2018-10-04 9:46 ` Maarten Lankhorst
2018-10-04 9:46 ` [PATCH v2 13/13] drm/i915: Get rid of intel_crtc->config in crtc_enable/disable functions, v2 Maarten Lankhorst
` (8 subsequent siblings)
20 siblings, 0 replies; 30+ messages in thread
From: Maarten Lankhorst @ 2018-10-04 9:46 UTC (permalink / raw)
To: intel-gfx
Fixing chv_set_phy_signal_level() still requires too many levels of
indirection to pass crtc_state along, but chv_data_lane_soft_reset()
already has a crtc_state we can use.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_dpio_phy.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dpio_phy.c b/drivers/gpu/drm/i915/intel_dpio_phy.c
index 00b3ab656b06..3c7f10d17658 100644
--- a/drivers/gpu/drm/i915/intel_dpio_phy.c
+++ b/drivers/gpu/drm/i915/intel_dpio_phy.c
@@ -748,7 +748,7 @@ void chv_data_lane_soft_reset(struct intel_encoder *encoder,
val |= DPIO_PCS_TX_LANE2_RESET | DPIO_PCS_TX_LANE1_RESET;
vlv_dpio_write(dev_priv, pipe, VLV_PCS01_DW0(ch), val);
- if (crtc->config->lane_count > 2) {
+ if (crtc_state->lane_count > 2) {
val = vlv_dpio_read(dev_priv, pipe, VLV_PCS23_DW0(ch));
if (reset)
val &= ~(DPIO_PCS_TX_LANE2_RESET | DPIO_PCS_TX_LANE1_RESET);
@@ -765,7 +765,7 @@ void chv_data_lane_soft_reset(struct intel_encoder *encoder,
val |= DPIO_PCS_CLK_SOFT_RESET;
vlv_dpio_write(dev_priv, pipe, VLV_PCS01_DW1(ch), val);
- if (crtc->config->lane_count > 2) {
+ if (crtc_state->lane_count > 2) {
val = vlv_dpio_read(dev_priv, pipe, VLV_PCS23_DW1(ch));
val |= CHV_PCS_REQ_SOFTRESET_EN;
if (reset)
--
2.19.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v2 13/13] drm/i915: Get rid of intel_crtc->config in crtc_enable/disable functions, v2.
2018-10-04 9:45 [PATCH v2 00/13] drm/i915: First cleanup pass to get rid of more crtc->config users Maarten Lankhorst
` (11 preceding siblings ...)
2018-10-04 9:46 ` [PATCH v2 12/13] drm/i915: Get rid of crtc->config in chv_data_lane_soft_reset Maarten Lankhorst
@ 2018-10-04 9:46 ` Maarten Lankhorst
2018-10-04 10:42 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: First cleanup pass to get rid of more crtc->config users. (rev2) Patchwork
` (7 subsequent siblings)
20 siblings, 0 replies; 30+ messages in thread
From: Maarten Lankhorst @ 2018-10-04 9:46 UTC (permalink / raw)
To: intel-gfx
These functions already have a pointer to the correct state,
so use it instead of crtc->config.
Changes since v1:
- Move pll changes to the pll patch.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 42 ++++++++++++++--------------
1 file changed, 21 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 4df4293a7917..0de1ae969c87 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5594,15 +5594,15 @@ static void ironlake_crtc_enable(struct intel_crtc_state *pipe_config,
if (pipe_config->has_pch_encoder)
intel_prepare_shared_dpll(pipe_config);
- if (intel_crtc_has_dp_encoder(intel_crtc->config))
+ if (intel_crtc_has_dp_encoder(pipe_config))
intel_dp_set_m_n(intel_crtc, M1_N1);
intel_set_pipe_timings(pipe_config);
intel_set_pipe_src_size(pipe_config);
- if (intel_crtc->config->has_pch_encoder) {
+ if (pipe_config->has_pch_encoder) {
intel_cpu_transcoder_set_m_n(intel_crtc,
- &intel_crtc->config->fdi_m_n, NULL);
+ &pipe_config->fdi_m_n, NULL);
}
ironlake_set_pipeconf(pipe_config);
@@ -5611,7 +5611,7 @@ static void ironlake_crtc_enable(struct intel_crtc_state *pipe_config,
intel_encoders_pre_enable(crtc, pipe_config, old_state);
- if (intel_crtc->config->has_pch_encoder) {
+ if (pipe_config->has_pch_encoder) {
/* Note: FDI PLL enabling _must_ be done before we enable the
* cpu pipes, hence this is separate from all the other fdi/pch
* enabling. */
@@ -5630,10 +5630,10 @@ static void ironlake_crtc_enable(struct intel_crtc_state *pipe_config,
intel_color_load_luts(&pipe_config->base);
if (dev_priv->display.initial_watermarks != NULL)
- dev_priv->display.initial_watermarks(old_intel_state, intel_crtc->config);
+ dev_priv->display.initial_watermarks(old_intel_state, pipe_config);
intel_enable_pipe(pipe_config);
- if (intel_crtc->config->has_pch_encoder)
+ if (pipe_config->has_pch_encoder)
ironlake_pch_enable(old_intel_state, pipe_config);
assert_vblank_disabled(crtc);
@@ -5650,7 +5650,7 @@ static void ironlake_crtc_enable(struct intel_crtc_state *pipe_config,
* some interlaced HDMI modes. Let's do the double wait always
* in case there are more corner cases we don't know about.
*/
- if (intel_crtc->config->has_pch_encoder) {
+ if (pipe_config->has_pch_encoder) {
intel_wait_for_vblank(dev_priv, pipe);
intel_wait_for_vblank(dev_priv, pipe);
}
@@ -5699,7 +5699,7 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
struct drm_i915_private *dev_priv = to_i915(crtc->dev);
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
int pipe = intel_crtc->pipe, hsw_workaround_pipe;
- enum transcoder cpu_transcoder = intel_crtc->config->cpu_transcoder;
+ enum transcoder cpu_transcoder = pipe_config->cpu_transcoder;
struct intel_atomic_state *old_intel_state =
to_intel_atomic_state(old_state);
bool psl_clkgate_wa;
@@ -5718,7 +5718,7 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
intel_encoders_pre_enable(crtc, pipe_config, old_state);
- if (intel_crtc_has_dp_encoder(intel_crtc->config))
+ if (intel_crtc_has_dp_encoder(pipe_config))
intel_dp_set_m_n(intel_crtc, M1_N1);
if (!transcoder_is_dsi(cpu_transcoder))
@@ -5729,12 +5729,12 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
if (cpu_transcoder != TRANSCODER_EDP &&
!transcoder_is_dsi(cpu_transcoder)) {
I915_WRITE(PIPE_MULT(cpu_transcoder),
- intel_crtc->config->pixel_multiplier - 1);
+ pipe_config->pixel_multiplier - 1);
}
- if (intel_crtc->config->has_pch_encoder) {
+ if (pipe_config->has_pch_encoder) {
intel_cpu_transcoder_set_m_n(intel_crtc,
- &intel_crtc->config->fdi_m_n, NULL);
+ &pipe_config->fdi_m_n, NULL);
}
if (!transcoder_is_dsi(cpu_transcoder))
@@ -5748,7 +5748,7 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
/* Display WA #1180: WaDisableScalarClockGating: glk, cnl */
psl_clkgate_wa = (IS_GEMINILAKE(dev_priv) || IS_CANNONLAKE(dev_priv)) &&
- intel_crtc->config->pch_pfit.enabled;
+ pipe_config->pch_pfit.enabled;
if (psl_clkgate_wa)
glk_pipe_scaler_clock_gating_wa(dev_priv, pipe, true);
@@ -5788,10 +5788,10 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
if (!transcoder_is_dsi(cpu_transcoder))
intel_enable_pipe(pipe_config);
- if (intel_crtc->config->has_pch_encoder)
+ if (pipe_config->has_pch_encoder)
lpt_pch_enable(old_intel_state, pipe_config);
- if (intel_crtc_has_type(intel_crtc->config, INTEL_OUTPUT_DP_MST))
+ if (intel_crtc_has_type(pipe_config, INTEL_OUTPUT_DP_MST))
intel_ddi_set_vc_payload_alloc(pipe_config, true);
assert_vblank_disabled(crtc);
@@ -5854,12 +5854,12 @@ static void ironlake_crtc_disable(struct intel_crtc_state *old_crtc_state,
ironlake_pfit_disable(old_crtc_state);
- if (intel_crtc->config->has_pch_encoder)
+ if (old_crtc_state->has_pch_encoder)
ironlake_fdi_disable(crtc);
intel_encoders_post_disable(crtc, old_crtc_state, old_state);
- if (intel_crtc->config->has_pch_encoder) {
+ if (old_crtc_state->has_pch_encoder) {
ironlake_disable_pch_transcoder(dev_priv, pipe);
if (HAS_PCH_CPT(dev_priv)) {
@@ -6060,7 +6060,7 @@ static void valleyview_crtc_enable(struct intel_crtc_state *pipe_config,
if (WARN_ON(intel_crtc->active))
return;
- if (intel_crtc_has_dp_encoder(intel_crtc->config))
+ if (intel_crtc_has_dp_encoder(pipe_config))
intel_dp_set_m_n(intel_crtc, M1_N1);
intel_set_pipe_timings(pipe_config);
@@ -6130,7 +6130,7 @@ static void i9xx_crtc_enable(struct intel_crtc_state *pipe_config,
i9xx_set_pll_dividers(pipe_config);
- if (intel_crtc_has_dp_encoder(intel_crtc->config))
+ if (intel_crtc_has_dp_encoder(pipe_config))
intel_dp_set_m_n(intel_crtc, M1_N1);
intel_set_pipe_timings(pipe_config);
@@ -6153,7 +6153,7 @@ static void i9xx_crtc_enable(struct intel_crtc_state *pipe_config,
if (dev_priv->display.initial_watermarks != NULL)
dev_priv->display.initial_watermarks(old_intel_state,
- intel_crtc->config);
+ pipe_config);
else
intel_update_watermarks(intel_crtc);
intel_enable_pipe(pipe_config);
@@ -6206,7 +6206,7 @@ static void i9xx_crtc_disable(struct intel_crtc_state *old_crtc_state,
intel_encoders_post_disable(crtc, old_crtc_state, old_state);
- if (!intel_crtc_has_type(intel_crtc->config, INTEL_OUTPUT_DSI)) {
+ if (!intel_crtc_has_type(old_crtc_state, INTEL_OUTPUT_DSI)) {
if (IS_CHERRYVIEW(dev_priv))
chv_disable_pll(dev_priv, pipe);
else if (IS_VALLEYVIEW(dev_priv))
--
2.19.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 30+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for drm/i915: First cleanup pass to get rid of more crtc->config users. (rev2)
2018-10-04 9:45 [PATCH v2 00/13] drm/i915: First cleanup pass to get rid of more crtc->config users Maarten Lankhorst
` (12 preceding siblings ...)
2018-10-04 9:46 ` [PATCH v2 13/13] drm/i915: Get rid of intel_crtc->config in crtc_enable/disable functions, v2 Maarten Lankhorst
@ 2018-10-04 10:42 ` Patchwork
2018-10-04 11:07 ` ✗ Fi.CI.BAT: failure " Patchwork
` (6 subsequent siblings)
20 siblings, 0 replies; 30+ messages in thread
From: Patchwork @ 2018-10-04 10:42 UTC (permalink / raw)
To: Maarten Lankhorst; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: First cleanup pass to get rid of more crtc->config users. (rev2)
URL : https://patchwork.freedesktop.org/series/50506/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
654cd8d08aa3 drm/i915: Remove dereferences of crtc->config in set_pipeconf/misc functions, v2.
4216229fac2b drm/i915: Make panel fitter functions take state
47636b9dae35 drm/i915: Make intel_set_pipe_timings/src_size take a pointer to crtc_state
90ff6ed8409b drm/i915: Use crtc_state in ironlake_enable_pch_transcoder
bd7e0d07f78d drm/i915: Make skl_detach_scalers take crtc_state
0f6736a66898 drm/i915: Make pll functions take crtc_state, v2.
ebd9c2fd900a drm/i915: Make ironlake_pch_transcoder_set_timings take crtc_state
20f554fbe934 drm/i915: Make shared dpll functions take crtc_state
0477a069952b drm/i915: Get rid of crtc->config from icl_pll_to_ddi_pll_sel
965bb90ce620 drm/i915: Use crtc->state in intel_fbdev_init_bios
862d313c94d3 drm/i915: Get rid of crtc->config dereference in intel_dp_retrain_link
-:10: WARNING:TYPO_SPELLING: 'occuring' may be misspelled - perhaps 'occurring'?
#10:
We're already using crtc_state here and made sure no modeset is occuring
total: 0 errors, 1 warnings, 0 checks, 16 lines checked
feca0de37865 drm/i915: Get rid of crtc->config in chv_data_lane_soft_reset
0191cf1155d7 drm/i915: Get rid of intel_crtc->config in crtc_enable/disable functions, v2.
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 30+ messages in thread
* ✗ Fi.CI.BAT: failure for drm/i915: First cleanup pass to get rid of more crtc->config users. (rev2)
2018-10-04 9:45 [PATCH v2 00/13] drm/i915: First cleanup pass to get rid of more crtc->config users Maarten Lankhorst
` (13 preceding siblings ...)
2018-10-04 10:42 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: First cleanup pass to get rid of more crtc->config users. (rev2) Patchwork
@ 2018-10-04 11:07 ` Patchwork
2018-10-04 14:03 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: First cleanup pass to get rid of more crtc->config users. (rev3) Patchwork
` (5 subsequent siblings)
20 siblings, 0 replies; 30+ messages in thread
From: Patchwork @ 2018-10-04 11:07 UTC (permalink / raw)
To: Maarten Lankhorst; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: First cleanup pass to get rid of more crtc->config users. (rev2)
URL : https://patchwork.freedesktop.org/series/50506/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4930 -> Patchwork_10357 =
== Summary - FAILURE ==
Serious unknown changes coming with Patchwork_10357 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_10357, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://patchwork.freedesktop.org/api/1.0/series/50506/revisions/2/mbox/
== Possible new issues ==
Here are the unknown changes that may have been introduced in Patchwork_10357:
=== IGT changes ===
==== Possible regressions ====
igt@drv_getparams_basic@basic-subslice-total:
fi-bwr-2160: PASS -> TIMEOUT +10
igt@gem_busy@basic-busy-default:
fi-gdg-551: SKIP -> TIMEOUT
fi-bwr-2160: SKIP -> TIMEOUT
igt@gem_close_race@basic-threads:
fi-gdg-551: PASS -> TIMEOUT +11
igt@gem_cpu_reloc@basic:
fi-bwr-2160: PASS -> INCOMPLETE
igt@gem_ctx_create@basic:
fi-gdg-551: SKIP -> INCOMPLETE
igt@kms_flip@basic-flip-vs-wf_vblank:
fi-snb-2600: PASS -> DMESG-WARN +37
igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a:
fi-ivb-3520m: PASS -> DMESG-WARN +40
==== Warnings ====
igt@prime_vgem@basic-fence-flip:
fi-ivb-3520m: PASS -> SKIP
== Known issues ==
Here are the changes found in Patchwork_10357 that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt@gem_exec_suspend@basic-s3:
fi-bdw-samus: PASS -> INCOMPLETE (fdo#107773)
igt@kms_pipe_crc_basic@read-crc-pipe-a-frame-sequence:
fi-byt-clapper: PASS -> FAIL (fdo#103191, fdo#107362)
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
fi-byt-clapper: PASS -> INCOMPLETE (fdo#102657)
igt@prime_vgem@basic-fence-flip:
fi-hsw-4770: NOTRUN -> FAIL (fdo#104008)
==== Possible fixes ====
igt@gem_exec_suspend@basic-s4-devices:
fi-blb-e6850: INCOMPLETE (fdo#107718) -> PASS
igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a:
fi-glk-j4005: DMESG-WARN (fdo#106238) -> PASS
igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence:
fi-byt-clapper: FAIL (fdo#103191, fdo#107362) -> PASS
igt@pm_rpm@basic-pci-d3-state:
fi-glk-dsi: INCOMPLETE (fdo#103359, k.org#198133) -> PASS
igt@pm_rpm@module-reload:
fi-glk-j4005: DMESG-WARN (fdo#107726) -> PASS
fdo#102657 https://bugs.freedesktop.org/show_bug.cgi?id=102657
fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191
fdo#103359 https://bugs.freedesktop.org/show_bug.cgi?id=103359
fdo#104008 https://bugs.freedesktop.org/show_bug.cgi?id=104008
fdo#106238 https://bugs.freedesktop.org/show_bug.cgi?id=106238
fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362
fdo#107718 https://bugs.freedesktop.org/show_bug.cgi?id=107718
fdo#107726 https://bugs.freedesktop.org/show_bug.cgi?id=107726
fdo#107773 https://bugs.freedesktop.org/show_bug.cgi?id=107773
k.org#198133 https://bugzilla.kernel.org/show_bug.cgi?id=198133
== Participating hosts (45 -> 41) ==
Additional (1): fi-hsw-4770
Missing (5): fi-ilk-650 fi-bsw-cyan fi-byt-squawks fi-icl-u2 fi-snb-2520m
== Build changes ==
* Linux: CI_DRM_4930 -> Patchwork_10357
CI_DRM_4930: bf1bd5e86f267d58ac68c342fcfff70e8ef1fd34 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4666: bba38422e7f903094562f1b78cc3579683c0a667 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_10357: 0191cf1155d724780241e9b8f17ea3e4e3fd58ba @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
0191cf1155d7 drm/i915: Get rid of intel_crtc->config in crtc_enable/disable functions, v2.
feca0de37865 drm/i915: Get rid of crtc->config in chv_data_lane_soft_reset
862d313c94d3 drm/i915: Get rid of crtc->config dereference in intel_dp_retrain_link
965bb90ce620 drm/i915: Use crtc->state in intel_fbdev_init_bios
0477a069952b drm/i915: Get rid of crtc->config from icl_pll_to_ddi_pll_sel
20f554fbe934 drm/i915: Make shared dpll functions take crtc_state
ebd9c2fd900a drm/i915: Make ironlake_pch_transcoder_set_timings take crtc_state
0f6736a66898 drm/i915: Make pll functions take crtc_state, v2.
bd7e0d07f78d drm/i915: Make skl_detach_scalers take crtc_state
90ff6ed8409b drm/i915: Use crtc_state in ironlake_enable_pch_transcoder
47636b9dae35 drm/i915: Make intel_set_pipe_timings/src_size take a pointer to crtc_state
4216229fac2b drm/i915: Make panel fitter functions take state
654cd8d08aa3 drm/i915: Remove dereferences of crtc->config in set_pipeconf/misc functions, v2.
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10357/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v2 08/13] drm/i915: Make shared dpll functions take crtc_state
2018-10-04 9:45 ` [PATCH v2 08/13] drm/i915: Make shared dpll functions " Maarten Lankhorst
@ 2018-10-04 12:57 ` Ville Syrjälä
2018-10-04 13:25 ` Maarten Lankhorst
2018-10-04 13:27 ` [PATCH] drm/i915: Make shared dpll functions take crtc_state, v2 Maarten Lankhorst
0 siblings, 2 replies; 30+ messages in thread
From: Ville Syrjälä @ 2018-10-04 12:57 UTC (permalink / raw)
To: Maarten Lankhorst; +Cc: intel-gfx
On Thu, Oct 04, 2018 at 11:45:59AM +0200, Maarten Lankhorst wrote:
> Do not rely on crtc->config any more. Remove the assertion from
> ibx_pch_dpll_disable, because we the dpll state tracking should
> already handle this case correctly.
>
> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/intel_display.c | 14 ++++++------
> drivers/gpu/drm/i915/intel_dpll_mgr.c | 31 +++++++++++----------------
> drivers/gpu/drm/i915/intel_dpll_mgr.h | 6 +++---
> 3 files changed, 22 insertions(+), 29 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index fe8ccbdd4ea1..4df4293a7917 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -4749,7 +4749,7 @@ static void ironlake_pch_enable(const struct intel_atomic_state *state,
> * Note that enable_shared_dpll tries to do the right thing, but
> * get_shared_dpll unconditionally resets the pll - we need that to have
> * the right LVDS enable sequence. */
> - intel_enable_shared_dpll(crtc);
> + intel_enable_shared_dpll(crtc_state);
>
> /* set transcoder timing, panel must allow it */
> assert_panel_unlocked(dev_priv, pipe);
> @@ -5591,8 +5591,8 @@ static void ironlake_crtc_enable(struct intel_crtc_state *pipe_config,
> intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false);
> intel_set_pch_fifo_underrun_reporting(dev_priv, pipe, false);
>
> - if (intel_crtc->config->has_pch_encoder)
> - intel_prepare_shared_dpll(intel_crtc);
> + if (pipe_config->has_pch_encoder)
> + intel_prepare_shared_dpll(pipe_config);
>
> if (intel_crtc_has_dp_encoder(intel_crtc->config))
> intel_dp_set_m_n(intel_crtc, M1_N1);
> @@ -5710,8 +5710,8 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
>
> intel_encoders_pre_pll_enable(crtc, pipe_config, old_state);
>
> - if (intel_crtc->config->shared_dpll)
> - intel_enable_shared_dpll(intel_crtc);
> + if (pipe_config->shared_dpll)
> + intel_enable_shared_dpll(pipe_config);
>
> if (INTEL_GEN(dev_priv) >= 11)
> icl_map_plls_to_ports(crtc, pipe_config, old_state);
> @@ -6286,7 +6286,7 @@ static void intel_crtc_disable_noatomic(struct drm_crtc *crtc,
>
> intel_fbc_disable(intel_crtc);
> intel_update_watermarks(intel_crtc);
> - intel_disable_shared_dpll(intel_crtc);
> + intel_disable_shared_dpll(crtc_state);
I guess this is the explosion on i915g/i965g. We've already freed this
crtc state at this point. So I guess s/crtc_state/crtc->state/ and it
should be fine?
--
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v2 08/13] drm/i915: Make shared dpll functions take crtc_state
2018-10-04 12:57 ` Ville Syrjälä
@ 2018-10-04 13:25 ` Maarten Lankhorst
2018-10-04 15:24 ` Ville Syrjälä
2018-10-04 13:27 ` [PATCH] drm/i915: Make shared dpll functions take crtc_state, v2 Maarten Lankhorst
1 sibling, 1 reply; 30+ messages in thread
From: Maarten Lankhorst @ 2018-10-04 13:25 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
Op 04-10-18 om 14:57 schreef Ville Syrjälä:
> On Thu, Oct 04, 2018 at 11:45:59AM +0200, Maarten Lankhorst wrote:
>> Do not rely on crtc->config any more. Remove the assertion from
>> ibx_pch_dpll_disable, because we the dpll state tracking should
>> already handle this case correctly.
>>
>> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
>> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> ---
>> drivers/gpu/drm/i915/intel_display.c | 14 ++++++------
>> drivers/gpu/drm/i915/intel_dpll_mgr.c | 31 +++++++++++----------------
>> drivers/gpu/drm/i915/intel_dpll_mgr.h | 6 +++---
>> 3 files changed, 22 insertions(+), 29 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
>> index fe8ccbdd4ea1..4df4293a7917 100644
>> --- a/drivers/gpu/drm/i915/intel_display.c
>> +++ b/drivers/gpu/drm/i915/intel_display.c
>> @@ -4749,7 +4749,7 @@ static void ironlake_pch_enable(const struct intel_atomic_state *state,
>> * Note that enable_shared_dpll tries to do the right thing, but
>> * get_shared_dpll unconditionally resets the pll - we need that to have
>> * the right LVDS enable sequence. */
>> - intel_enable_shared_dpll(crtc);
>> + intel_enable_shared_dpll(crtc_state);
>>
>> /* set transcoder timing, panel must allow it */
>> assert_panel_unlocked(dev_priv, pipe);
>> @@ -5591,8 +5591,8 @@ static void ironlake_crtc_enable(struct intel_crtc_state *pipe_config,
>> intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false);
>> intel_set_pch_fifo_underrun_reporting(dev_priv, pipe, false);
>>
>> - if (intel_crtc->config->has_pch_encoder)
>> - intel_prepare_shared_dpll(intel_crtc);
>> + if (pipe_config->has_pch_encoder)
>> + intel_prepare_shared_dpll(pipe_config);
>>
>> if (intel_crtc_has_dp_encoder(intel_crtc->config))
>> intel_dp_set_m_n(intel_crtc, M1_N1);
>> @@ -5710,8 +5710,8 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
>>
>> intel_encoders_pre_pll_enable(crtc, pipe_config, old_state);
>>
>> - if (intel_crtc->config->shared_dpll)
>> - intel_enable_shared_dpll(intel_crtc);
>> + if (pipe_config->shared_dpll)
>> + intel_enable_shared_dpll(pipe_config);
>>
>> if (INTEL_GEN(dev_priv) >= 11)
>> icl_map_plls_to_ports(crtc, pipe_config, old_state);
>> @@ -6286,7 +6286,7 @@ static void intel_crtc_disable_noatomic(struct drm_crtc *crtc,
>>
>> intel_fbc_disable(intel_crtc);
>> intel_update_watermarks(intel_crtc);
>> - intel_disable_shared_dpll(intel_crtc);
>> + intel_disable_shared_dpll(crtc_state);
> I guess this is the explosion on i915g/i965g. We've already freed this
> crtc state at this point. So I guess s/crtc_state/crtc->state/ and it
> should be fine?
>
No, the explosion is at
- if (WARN_ON(pll == NULL))
+ if (!WARN_ON(!pll))
return;
Oops! Should be fixed in v2 I'm sending now.
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^ permalink raw reply [flat|nested] 30+ messages in thread
* [PATCH] drm/i915: Make shared dpll functions take crtc_state, v2.
2018-10-04 12:57 ` Ville Syrjälä
2018-10-04 13:25 ` Maarten Lankhorst
@ 2018-10-04 13:27 ` Maarten Lankhorst
2018-10-05 9:41 ` [PATCH] drm/i915: Make shared dpll functions take crtc_state, v3 Maarten Lankhorst
1 sibling, 1 reply; 30+ messages in thread
From: Maarten Lankhorst @ 2018-10-04 13:27 UTC (permalink / raw)
To: intel-gfx
Do not rely on crtc->config any more. Remove the assertion from
ibx_pch_dpll_disable, because we the dpll state tracking should
already handle this case correctly.
Changes since v1:
- Fixup accidental early return in intel_prepare_shared_dpll, oops!
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 14 ++++++-------
drivers/gpu/drm/i915/intel_dpll_mgr.c | 29 ++++++++++-----------------
drivers/gpu/drm/i915/intel_dpll_mgr.h | 6 +++---
3 files changed, 21 insertions(+), 28 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index fe8ccbdd4ea1..4df4293a7917 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4749,7 +4749,7 @@ static void ironlake_pch_enable(const struct intel_atomic_state *state,
* Note that enable_shared_dpll tries to do the right thing, but
* get_shared_dpll unconditionally resets the pll - we need that to have
* the right LVDS enable sequence. */
- intel_enable_shared_dpll(crtc);
+ intel_enable_shared_dpll(crtc_state);
/* set transcoder timing, panel must allow it */
assert_panel_unlocked(dev_priv, pipe);
@@ -5591,8 +5591,8 @@ static void ironlake_crtc_enable(struct intel_crtc_state *pipe_config,
intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false);
intel_set_pch_fifo_underrun_reporting(dev_priv, pipe, false);
- if (intel_crtc->config->has_pch_encoder)
- intel_prepare_shared_dpll(intel_crtc);
+ if (pipe_config->has_pch_encoder)
+ intel_prepare_shared_dpll(pipe_config);
if (intel_crtc_has_dp_encoder(intel_crtc->config))
intel_dp_set_m_n(intel_crtc, M1_N1);
@@ -5710,8 +5710,8 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
intel_encoders_pre_pll_enable(crtc, pipe_config, old_state);
- if (intel_crtc->config->shared_dpll)
- intel_enable_shared_dpll(intel_crtc);
+ if (pipe_config->shared_dpll)
+ intel_enable_shared_dpll(pipe_config);
if (INTEL_GEN(dev_priv) >= 11)
icl_map_plls_to_ports(crtc, pipe_config, old_state);
@@ -6286,7 +6286,7 @@ static void intel_crtc_disable_noatomic(struct drm_crtc *crtc,
intel_fbc_disable(intel_crtc);
intel_update_watermarks(intel_crtc);
- intel_disable_shared_dpll(intel_crtc);
+ intel_disable_shared_dpll(crtc_state);
domains = intel_crtc->enabled_power_domains;
for_each_power_domain(domain, domains)
@@ -12735,7 +12735,7 @@ static void intel_atomic_commit_tail(struct drm_atomic_state *state)
dev_priv->display.crtc_disable(old_intel_crtc_state, state);
intel_crtc->active = false;
intel_fbc_disable(intel_crtc);
- intel_disable_shared_dpll(intel_crtc);
+ intel_disable_shared_dpll(old_intel_crtc_state);
/*
* Underruns don't always raise
diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c b/drivers/gpu/drm/i915/intel_dpll_mgr.c
index e6cac9225536..10e820804eee 100644
--- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
@@ -131,11 +131,11 @@ void assert_shared_dpll(struct drm_i915_private *dev_priv,
* This calls the PLL's prepare hook if it has one and if the PLL is not
* already enabled. The prepare hook is platform specific.
*/
-void intel_prepare_shared_dpll(struct intel_crtc *crtc)
+void intel_prepare_shared_dpll(const struct intel_crtc_state *crtc_state)
{
- struct drm_device *dev = crtc->base.dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
- struct intel_shared_dpll *pll = crtc->config->shared_dpll;
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
+ struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ struct intel_shared_dpll *pll = crtc_state->shared_dpll;
if (WARN_ON(pll == NULL))
return;
@@ -158,11 +158,11 @@ void intel_prepare_shared_dpll(struct intel_crtc *crtc)
*
* Enable the shared DPLL used by @crtc.
*/
-void intel_enable_shared_dpll(struct intel_crtc *crtc)
+void intel_enable_shared_dpll(const struct intel_crtc_state *crtc_state)
{
- struct drm_device *dev = crtc->base.dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
- struct intel_shared_dpll *pll = crtc->config->shared_dpll;
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
+ struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ struct intel_shared_dpll *pll = crtc_state->shared_dpll;
unsigned int crtc_mask = drm_crtc_mask(&crtc->base);
unsigned int old_mask;
@@ -203,10 +203,11 @@ void intel_enable_shared_dpll(struct intel_crtc *crtc)
*
* Disable the shared DPLL used by @crtc.
*/
-void intel_disable_shared_dpll(struct intel_crtc *crtc)
+void intel_disable_shared_dpll(const struct intel_crtc_state *crtc_state)
{
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
- struct intel_shared_dpll *pll = crtc->config->shared_dpll;
+ struct intel_shared_dpll *pll = crtc_state->shared_dpll;
unsigned int crtc_mask = drm_crtc_mask(&crtc->base);
/* PCH only available on ILK+ */
@@ -409,14 +410,6 @@ static void ibx_pch_dpll_disable(struct drm_i915_private *dev_priv,
struct intel_shared_dpll *pll)
{
const enum intel_dpll_id id = pll->info->id;
- struct drm_device *dev = &dev_priv->drm;
- struct intel_crtc *crtc;
-
- /* Make sure no transcoder isn't still depending on us. */
- for_each_intel_crtc(dev, crtc) {
- if (crtc->config->shared_dpll == pll)
- assert_pch_transcoder_disabled(dev_priv, crtc->pipe);
- }
I915_WRITE(PCH_DPLL(id), 0);
POSTING_READ(PCH_DPLL(id));
diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.h b/drivers/gpu/drm/i915/intel_dpll_mgr.h
index bf0de8a4dc63..9c033236f2ba 100644
--- a/drivers/gpu/drm/i915/intel_dpll_mgr.h
+++ b/drivers/gpu/drm/i915/intel_dpll_mgr.h
@@ -334,9 +334,9 @@ struct intel_shared_dpll *intel_get_shared_dpll(struct intel_crtc *crtc,
void intel_release_shared_dpll(struct intel_shared_dpll *dpll,
struct intel_crtc *crtc,
struct drm_atomic_state *state);
-void intel_prepare_shared_dpll(struct intel_crtc *crtc);
-void intel_enable_shared_dpll(struct intel_crtc *crtc);
-void intel_disable_shared_dpll(struct intel_crtc *crtc);
+void intel_prepare_shared_dpll(const struct intel_crtc_state *crtc_state);
+void intel_enable_shared_dpll(const struct intel_crtc_state *crtc_state);
+void intel_disable_shared_dpll(const struct intel_crtc_state *crtc_state);
void intel_shared_dpll_swap_state(struct drm_atomic_state *state);
void intel_shared_dpll_init(struct drm_device *dev);
--
2.19.0
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 30+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for drm/i915: First cleanup pass to get rid of more crtc->config users. (rev3)
2018-10-04 9:45 [PATCH v2 00/13] drm/i915: First cleanup pass to get rid of more crtc->config users Maarten Lankhorst
` (14 preceding siblings ...)
2018-10-04 11:07 ` ✗ Fi.CI.BAT: failure " Patchwork
@ 2018-10-04 14:03 ` Patchwork
2018-10-04 14:28 ` ✗ Fi.CI.BAT: failure " Patchwork
` (4 subsequent siblings)
20 siblings, 0 replies; 30+ messages in thread
From: Patchwork @ 2018-10-04 14:03 UTC (permalink / raw)
To: Maarten Lankhorst; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: First cleanup pass to get rid of more crtc->config users. (rev3)
URL : https://patchwork.freedesktop.org/series/50506/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
743f67a7f663 drm/i915: Remove dereferences of crtc->config in set_pipeconf/misc functions, v2.
2777f6e22708 drm/i915: Make panel fitter functions take state
6ef13c9d6e51 drm/i915: Make intel_set_pipe_timings/src_size take a pointer to crtc_state
5131d39f28c8 drm/i915: Use crtc_state in ironlake_enable_pch_transcoder
7e19a0f17cc5 drm/i915: Make skl_detach_scalers take crtc_state
954a652b810f drm/i915: Make pll functions take crtc_state, v2.
c7a659cc0fdb drm/i915: Make ironlake_pch_transcoder_set_timings take crtc_state
839ab93a8881 drm/i915: Make shared dpll functions take crtc_state, v2.
06539f0cc392 drm/i915: Get rid of crtc->config from icl_pll_to_ddi_pll_sel
f74f08ce235d drm/i915: Use crtc->state in intel_fbdev_init_bios
f00497170c8a drm/i915: Get rid of crtc->config dereference in intel_dp_retrain_link
-:10: WARNING:TYPO_SPELLING: 'occuring' may be misspelled - perhaps 'occurring'?
#10:
We're already using crtc_state here and made sure no modeset is occuring
total: 0 errors, 1 warnings, 0 checks, 16 lines checked
2f4167736bfc drm/i915: Get rid of crtc->config in chv_data_lane_soft_reset
20ede0c38c9d drm/i915: Get rid of intel_crtc->config in crtc_enable/disable functions, v2.
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 30+ messages in thread
* ✗ Fi.CI.BAT: failure for drm/i915: First cleanup pass to get rid of more crtc->config users. (rev3)
2018-10-04 9:45 [PATCH v2 00/13] drm/i915: First cleanup pass to get rid of more crtc->config users Maarten Lankhorst
` (15 preceding siblings ...)
2018-10-04 14:03 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: First cleanup pass to get rid of more crtc->config users. (rev3) Patchwork
@ 2018-10-04 14:28 ` Patchwork
2018-10-05 9:48 ` ✗ Fi.CI.BAT: failure for drm/i915: First cleanup pass to get rid of more crtc->config users. (rev4) Patchwork
` (3 subsequent siblings)
20 siblings, 0 replies; 30+ messages in thread
From: Patchwork @ 2018-10-04 14:28 UTC (permalink / raw)
To: Maarten Lankhorst; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: First cleanup pass to get rid of more crtc->config users. (rev3)
URL : https://patchwork.freedesktop.org/series/50506/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4931 -> Patchwork_10361 =
== Summary - FAILURE ==
Serious unknown changes coming with Patchwork_10361 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_10361, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://patchwork.freedesktop.org/api/1.0/series/50506/revisions/3/mbox/
== Possible new issues ==
Here are the unknown changes that may have been introduced in Patchwork_10361:
=== IGT changes ===
==== Possible regressions ====
igt@drv_getparams_basic@basic-subslice-total:
fi-bwr-2160: PASS -> TIMEOUT +11
igt@drv_module_reload@basic-no-display:
fi-blb-e6850: NOTRUN -> DMESG-WARN
igt@gem_busy@basic-busy-default:
fi-bwr-2160: SKIP -> TIMEOUT
igt@gem_ctx_create@basic:
fi-bwr-2160: SKIP -> INCOMPLETE
== Known issues ==
Here are the changes found in Patchwork_10361 that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt@kms_pipe_crc_basic@nonblocking-crc-pipe-b:
fi-byt-clapper: PASS -> FAIL (fdo#107362)
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
fi-bdw-samus: NOTRUN -> INCOMPLETE (fdo#107773)
==== Possible fixes ====
igt@drv_module_reload@basic-reload:
fi-blb-e6850: INCOMPLETE (fdo#107718) -> PASS
igt@kms_frontbuffer_tracking@basic:
fi-byt-clapper: FAIL (fdo#103167) -> PASS
igt@kms_pipe_crc_basic@hang-read-crc-pipe-a:
fi-byt-clapper: FAIL (fdo#107362, fdo#103191) -> PASS
igt@kms_pipe_crc_basic@read-crc-pipe-a:
fi-byt-clapper: FAIL (fdo#107362) -> PASS
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
fi-cfl-8109u: INCOMPLETE (fdo#108126, fdo#106070) -> PASS
fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191
fdo#106070 https://bugs.freedesktop.org/show_bug.cgi?id=106070
fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362
fdo#107718 https://bugs.freedesktop.org/show_bug.cgi?id=107718
fdo#107773 https://bugs.freedesktop.org/show_bug.cgi?id=107773
fdo#108126 https://bugs.freedesktop.org/show_bug.cgi?id=108126
== Participating hosts (48 -> 41) ==
Additional (2): fi-icl-u fi-bdw-samus
Missing (9): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-icl-u2 fi-bsw-cyan fi-ctg-p8600 fi-gdg-551 fi-pnv-d510 fi-skl-6600u
== Build changes ==
* Linux: CI_DRM_4931 -> Patchwork_10361
CI_DRM_4931: 826702bf60ae2b37841c051ed769b44af194fbb1 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4667: 596f48dcd59fd2f8c16671514f3e69d4a2891374 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_10361: 20ede0c38c9ddcf2f37c6f345b1e2f660693d74d @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
20ede0c38c9d drm/i915: Get rid of intel_crtc->config in crtc_enable/disable functions, v2.
2f4167736bfc drm/i915: Get rid of crtc->config in chv_data_lane_soft_reset
f00497170c8a drm/i915: Get rid of crtc->config dereference in intel_dp_retrain_link
f74f08ce235d drm/i915: Use crtc->state in intel_fbdev_init_bios
06539f0cc392 drm/i915: Get rid of crtc->config from icl_pll_to_ddi_pll_sel
839ab93a8881 drm/i915: Make shared dpll functions take crtc_state, v2.
c7a659cc0fdb drm/i915: Make ironlake_pch_transcoder_set_timings take crtc_state
954a652b810f drm/i915: Make pll functions take crtc_state, v2.
7e19a0f17cc5 drm/i915: Make skl_detach_scalers take crtc_state
5131d39f28c8 drm/i915: Use crtc_state in ironlake_enable_pch_transcoder
6ef13c9d6e51 drm/i915: Make intel_set_pipe_timings/src_size take a pointer to crtc_state
2777f6e22708 drm/i915: Make panel fitter functions take state
743f67a7f663 drm/i915: Remove dereferences of crtc->config in set_pipeconf/misc functions, v2.
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10361/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v2 08/13] drm/i915: Make shared dpll functions take crtc_state
2018-10-04 13:25 ` Maarten Lankhorst
@ 2018-10-04 15:24 ` Ville Syrjälä
2018-10-05 9:30 ` Maarten Lankhorst
2018-10-05 18:29 ` Maarten Lankhorst
0 siblings, 2 replies; 30+ messages in thread
From: Ville Syrjälä @ 2018-10-04 15:24 UTC (permalink / raw)
To: Maarten Lankhorst; +Cc: intel-gfx
On Thu, Oct 04, 2018 at 03:25:42PM +0200, Maarten Lankhorst wrote:
> Op 04-10-18 om 14:57 schreef Ville Syrjälä:
> > On Thu, Oct 04, 2018 at 11:45:59AM +0200, Maarten Lankhorst wrote:
> >> Do not rely on crtc->config any more. Remove the assertion from
> >> ibx_pch_dpll_disable, because we the dpll state tracking should
> >> already handle this case correctly.
> >>
> >> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> >> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >> ---
> >> drivers/gpu/drm/i915/intel_display.c | 14 ++++++------
> >> drivers/gpu/drm/i915/intel_dpll_mgr.c | 31 +++++++++++----------------
> >> drivers/gpu/drm/i915/intel_dpll_mgr.h | 6 +++---
> >> 3 files changed, 22 insertions(+), 29 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> >> index fe8ccbdd4ea1..4df4293a7917 100644
> >> --- a/drivers/gpu/drm/i915/intel_display.c
> >> +++ b/drivers/gpu/drm/i915/intel_display.c
> >> @@ -4749,7 +4749,7 @@ static void ironlake_pch_enable(const struct intel_atomic_state *state,
> >> * Note that enable_shared_dpll tries to do the right thing, but
> >> * get_shared_dpll unconditionally resets the pll - we need that to have
> >> * the right LVDS enable sequence. */
> >> - intel_enable_shared_dpll(crtc);
> >> + intel_enable_shared_dpll(crtc_state);
> >>
> >> /* set transcoder timing, panel must allow it */
> >> assert_panel_unlocked(dev_priv, pipe);
> >> @@ -5591,8 +5591,8 @@ static void ironlake_crtc_enable(struct intel_crtc_state *pipe_config,
> >> intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false);
> >> intel_set_pch_fifo_underrun_reporting(dev_priv, pipe, false);
> >>
> >> - if (intel_crtc->config->has_pch_encoder)
> >> - intel_prepare_shared_dpll(intel_crtc);
> >> + if (pipe_config->has_pch_encoder)
> >> + intel_prepare_shared_dpll(pipe_config);
> >>
> >> if (intel_crtc_has_dp_encoder(intel_crtc->config))
> >> intel_dp_set_m_n(intel_crtc, M1_N1);
> >> @@ -5710,8 +5710,8 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
> >>
> >> intel_encoders_pre_pll_enable(crtc, pipe_config, old_state);
> >>
> >> - if (intel_crtc->config->shared_dpll)
> >> - intel_enable_shared_dpll(intel_crtc);
> >> + if (pipe_config->shared_dpll)
> >> + intel_enable_shared_dpll(pipe_config);
> >>
> >> if (INTEL_GEN(dev_priv) >= 11)
> >> icl_map_plls_to_ports(crtc, pipe_config, old_state);
> >> @@ -6286,7 +6286,7 @@ static void intel_crtc_disable_noatomic(struct drm_crtc *crtc,
> >>
> >> intel_fbc_disable(intel_crtc);
> >> intel_update_watermarks(intel_crtc);
> >> - intel_disable_shared_dpll(intel_crtc);
> >> + intel_disable_shared_dpll(crtc_state);
> > I guess this is the explosion on i915g/i965g. We've already freed this
> > crtc state at this point. So I guess s/crtc_state/crtc->state/ and it
> > should be fine?
> >
> No, the explosion is at
>
> - if (WARN_ON(pll == NULL))
> + if (!WARN_ON(!pll))
> return;
>
> Oops! Should be fixed in v2 I'm sending now.
<4>[ 11.181254] R10: 0000000000000000 R11: 0000000000000000 R12: 6b6b6b6b6b6b6b6b
<4>[ 11.181141] RIP: 0010:intel_disable_shared_dpll+0x12/0x130 [i915]
<4>[ 11.181157] Code: c7 e9 67 25 a0 e8 9e da ec e0 0f 0b e9 18 ff ff ff 0f 1f 80 00 00 00 00 41 56 41 55 41 54 55 53 4c 8b 27 48 8b 9f 98 02 00 00 <4d> 8b 34 24 41 80 be 5c 0d 00 00 04 76 05 48 85 db 75 09 5b 5d 41
72a: 4d 8b 34 24 mov (%r12),%r14
Looks like it's still trying to drink poison.
--
Ville Syrjälä
Intel
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v2 08/13] drm/i915: Make shared dpll functions take crtc_state
2018-10-04 15:24 ` Ville Syrjälä
@ 2018-10-05 9:30 ` Maarten Lankhorst
2018-10-05 18:29 ` Maarten Lankhorst
1 sibling, 0 replies; 30+ messages in thread
From: Maarten Lankhorst @ 2018-10-05 9:30 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
Op 04-10-18 om 17:24 schreef Ville Syrjälä:
> On Thu, Oct 04, 2018 at 03:25:42PM +0200, Maarten Lankhorst wrote:
>> Op 04-10-18 om 14:57 schreef Ville Syrjälä:
>>> On Thu, Oct 04, 2018 at 11:45:59AM +0200, Maarten Lankhorst wrote:
>>>> Do not rely on crtc->config any more. Remove the assertion from
>>>> ibx_pch_dpll_disable, because we the dpll state tracking should
>>>> already handle this case correctly.
>>>>
>>>> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
>>>> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>>>> ---
>>>> drivers/gpu/drm/i915/intel_display.c | 14 ++++++------
>>>> drivers/gpu/drm/i915/intel_dpll_mgr.c | 31 +++++++++++----------------
>>>> drivers/gpu/drm/i915/intel_dpll_mgr.h | 6 +++---
>>>> 3 files changed, 22 insertions(+), 29 deletions(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
>>>> index fe8ccbdd4ea1..4df4293a7917 100644
>>>> --- a/drivers/gpu/drm/i915/intel_display.c
>>>> +++ b/drivers/gpu/drm/i915/intel_display.c
>>>> @@ -4749,7 +4749,7 @@ static void ironlake_pch_enable(const struct intel_atomic_state *state,
>>>> * Note that enable_shared_dpll tries to do the right thing, but
>>>> * get_shared_dpll unconditionally resets the pll - we need that to have
>>>> * the right LVDS enable sequence. */
>>>> - intel_enable_shared_dpll(crtc);
>>>> + intel_enable_shared_dpll(crtc_state);
>>>>
>>>> /* set transcoder timing, panel must allow it */
>>>> assert_panel_unlocked(dev_priv, pipe);
>>>> @@ -5591,8 +5591,8 @@ static void ironlake_crtc_enable(struct intel_crtc_state *pipe_config,
>>>> intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false);
>>>> intel_set_pch_fifo_underrun_reporting(dev_priv, pipe, false);
>>>>
>>>> - if (intel_crtc->config->has_pch_encoder)
>>>> - intel_prepare_shared_dpll(intel_crtc);
>>>> + if (pipe_config->has_pch_encoder)
>>>> + intel_prepare_shared_dpll(pipe_config);
>>>>
>>>> if (intel_crtc_has_dp_encoder(intel_crtc->config))
>>>> intel_dp_set_m_n(intel_crtc, M1_N1);
>>>> @@ -5710,8 +5710,8 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
>>>>
>>>> intel_encoders_pre_pll_enable(crtc, pipe_config, old_state);
>>>>
>>>> - if (intel_crtc->config->shared_dpll)
>>>> - intel_enable_shared_dpll(intel_crtc);
>>>> + if (pipe_config->shared_dpll)
>>>> + intel_enable_shared_dpll(pipe_config);
>>>>
>>>> if (INTEL_GEN(dev_priv) >= 11)
>>>> icl_map_plls_to_ports(crtc, pipe_config, old_state);
>>>> @@ -6286,7 +6286,7 @@ static void intel_crtc_disable_noatomic(struct drm_crtc *crtc,
>>>>
>>>> intel_fbc_disable(intel_crtc);
>>>> intel_update_watermarks(intel_crtc);
>>>> - intel_disable_shared_dpll(intel_crtc);
>>>> + intel_disable_shared_dpll(crtc_state);
>>> I guess this is the explosion on i915g/i965g. We've already freed this
>>> crtc state at this point. So I guess s/crtc_state/crtc->state/ and it
>>> should be fine?
>>>
>> No, the explosion is at
>>
>> - if (WARN_ON(pll == NULL))
>> + if (!WARN_ON(!pll))
>> return;
>>
>> Oops! Should be fixed in v2 I'm sending now.
> <4>[ 11.181254] R10: 0000000000000000 R11: 0000000000000000 R12: 6b6b6b6b6b6b6b6b
> <4>[ 11.181141] RIP: 0010:intel_disable_shared_dpll+0x12/0x130 [i915]
> <4>[ 11.181157] Code: c7 e9 67 25 a0 e8 9e da ec e0 0f 0b e9 18 ff ff ff 0f 1f 80 00 00 00 00 41 56 41 55 41 54 55 53 4c 8b 27 48 8b 9f 98 02 00 00 <4d> 8b 34 24 41 80 be 5c 0d 00 00 04 76 05 48 85 db 75 09 5b 5d 41
>
> 72a: 4d 8b 34 24 mov (%r12),%r14
>
> Looks like it's still trying to drink poison.
>
Yeah, probably intel_crtc_disable_noatomic
Seems I need to change crtc_state (which is freed) to to_intel_crtc_state(crtc->state)
_______________________________________________
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^ permalink raw reply [flat|nested] 30+ messages in thread
* [PATCH] drm/i915: Make shared dpll functions take crtc_state, v3.
2018-10-04 13:27 ` [PATCH] drm/i915: Make shared dpll functions take crtc_state, v2 Maarten Lankhorst
@ 2018-10-05 9:41 ` Maarten Lankhorst
2018-10-05 9:52 ` Maarten Lankhorst
0 siblings, 1 reply; 30+ messages in thread
From: Maarten Lankhorst @ 2018-10-05 9:41 UTC (permalink / raw)
To: intel-gfx
Do not rely on crtc->config any more. Remove the assertion from
ibx_pch_dpll_disable, because we the dpll state tracking should
already handle this case correctly.
Changes since v1:
- Fixup accidental early return in intel_prepare_shared_dpll, oops!
Changes since v2:
- Don't use the freed crtc_state in intel_crtc_disable_noatomic()
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 14 ++++++-------
drivers/gpu/drm/i915/intel_dpll_mgr.c | 29 ++++++++++-----------------
drivers/gpu/drm/i915/intel_dpll_mgr.h | 6 +++---
3 files changed, 21 insertions(+), 28 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index d47deafec606..0ceefdaee5a3 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4758,7 +4758,7 @@ static void ironlake_pch_enable(const struct intel_atomic_state *state,
* Note that enable_shared_dpll tries to do the right thing, but
* get_shared_dpll unconditionally resets the pll - we need that to have
* the right LVDS enable sequence. */
- intel_enable_shared_dpll(crtc);
+ intel_enable_shared_dpll(crtc_state);
/* set transcoder timing, panel must allow it */
assert_panel_unlocked(dev_priv, pipe);
@@ -5600,8 +5600,8 @@ static void ironlake_crtc_enable(struct intel_crtc_state *pipe_config,
intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false);
intel_set_pch_fifo_underrun_reporting(dev_priv, pipe, false);
- if (intel_crtc->config->has_pch_encoder)
- intel_prepare_shared_dpll(intel_crtc);
+ if (pipe_config->has_pch_encoder)
+ intel_prepare_shared_dpll(pipe_config);
if (intel_crtc_has_dp_encoder(intel_crtc->config))
intel_dp_set_m_n(intel_crtc, M1_N1);
@@ -5719,8 +5719,8 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
intel_encoders_pre_pll_enable(crtc, pipe_config, old_state);
- if (intel_crtc->config->shared_dpll)
- intel_enable_shared_dpll(intel_crtc);
+ if (pipe_config->shared_dpll)
+ intel_enable_shared_dpll(pipe_config);
if (INTEL_GEN(dev_priv) >= 11)
icl_map_plls_to_ports(crtc, pipe_config, old_state);
@@ -6295,7 +6295,7 @@ static void intel_crtc_disable_noatomic(struct drm_crtc *crtc,
intel_fbc_disable(intel_crtc);
intel_update_watermarks(intel_crtc);
- intel_disable_shared_dpll(intel_crtc);
+ intel_disable_shared_dpll(to_intel_crtc(crtc->state));
domains = intel_crtc->enabled_power_domains;
for_each_power_domain(domain, domains)
@@ -12744,7 +12744,7 @@ static void intel_atomic_commit_tail(struct drm_atomic_state *state)
dev_priv->display.crtc_disable(old_intel_crtc_state, state);
intel_crtc->active = false;
intel_fbc_disable(intel_crtc);
- intel_disable_shared_dpll(intel_crtc);
+ intel_disable_shared_dpll(old_intel_crtc_state);
/*
* Underruns don't always raise
diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c b/drivers/gpu/drm/i915/intel_dpll_mgr.c
index e6cac9225536..10e820804eee 100644
--- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
@@ -131,11 +131,11 @@ void assert_shared_dpll(struct drm_i915_private *dev_priv,
* This calls the PLL's prepare hook if it has one and if the PLL is not
* already enabled. The prepare hook is platform specific.
*/
-void intel_prepare_shared_dpll(struct intel_crtc *crtc)
+void intel_prepare_shared_dpll(const struct intel_crtc_state *crtc_state)
{
- struct drm_device *dev = crtc->base.dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
- struct intel_shared_dpll *pll = crtc->config->shared_dpll;
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
+ struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ struct intel_shared_dpll *pll = crtc_state->shared_dpll;
if (WARN_ON(pll == NULL))
return;
@@ -158,11 +158,11 @@ void intel_prepare_shared_dpll(struct intel_crtc *crtc)
*
* Enable the shared DPLL used by @crtc.
*/
-void intel_enable_shared_dpll(struct intel_crtc *crtc)
+void intel_enable_shared_dpll(const struct intel_crtc_state *crtc_state)
{
- struct drm_device *dev = crtc->base.dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
- struct intel_shared_dpll *pll = crtc->config->shared_dpll;
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
+ struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ struct intel_shared_dpll *pll = crtc_state->shared_dpll;
unsigned int crtc_mask = drm_crtc_mask(&crtc->base);
unsigned int old_mask;
@@ -203,10 +203,11 @@ void intel_enable_shared_dpll(struct intel_crtc *crtc)
*
* Disable the shared DPLL used by @crtc.
*/
-void intel_disable_shared_dpll(struct intel_crtc *crtc)
+void intel_disable_shared_dpll(const struct intel_crtc_state *crtc_state)
{
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
- struct intel_shared_dpll *pll = crtc->config->shared_dpll;
+ struct intel_shared_dpll *pll = crtc_state->shared_dpll;
unsigned int crtc_mask = drm_crtc_mask(&crtc->base);
/* PCH only available on ILK+ */
@@ -409,14 +410,6 @@ static void ibx_pch_dpll_disable(struct drm_i915_private *dev_priv,
struct intel_shared_dpll *pll)
{
const enum intel_dpll_id id = pll->info->id;
- struct drm_device *dev = &dev_priv->drm;
- struct intel_crtc *crtc;
-
- /* Make sure no transcoder isn't still depending on us. */
- for_each_intel_crtc(dev, crtc) {
- if (crtc->config->shared_dpll == pll)
- assert_pch_transcoder_disabled(dev_priv, crtc->pipe);
- }
I915_WRITE(PCH_DPLL(id), 0);
POSTING_READ(PCH_DPLL(id));
diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.h b/drivers/gpu/drm/i915/intel_dpll_mgr.h
index bf0de8a4dc63..9c033236f2ba 100644
--- a/drivers/gpu/drm/i915/intel_dpll_mgr.h
+++ b/drivers/gpu/drm/i915/intel_dpll_mgr.h
@@ -334,9 +334,9 @@ struct intel_shared_dpll *intel_get_shared_dpll(struct intel_crtc *crtc,
void intel_release_shared_dpll(struct intel_shared_dpll *dpll,
struct intel_crtc *crtc,
struct drm_atomic_state *state);
-void intel_prepare_shared_dpll(struct intel_crtc *crtc);
-void intel_enable_shared_dpll(struct intel_crtc *crtc);
-void intel_disable_shared_dpll(struct intel_crtc *crtc);
+void intel_prepare_shared_dpll(const struct intel_crtc_state *crtc_state);
+void intel_enable_shared_dpll(const struct intel_crtc_state *crtc_state);
+void intel_disable_shared_dpll(const struct intel_crtc_state *crtc_state);
void intel_shared_dpll_swap_state(struct drm_atomic_state *state);
void intel_shared_dpll_init(struct drm_device *dev);
--
2.19.0
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 30+ messages in thread
* ✗ Fi.CI.BAT: failure for drm/i915: First cleanup pass to get rid of more crtc->config users. (rev4)
2018-10-04 9:45 [PATCH v2 00/13] drm/i915: First cleanup pass to get rid of more crtc->config users Maarten Lankhorst
` (16 preceding siblings ...)
2018-10-04 14:28 ` ✗ Fi.CI.BAT: failure " Patchwork
@ 2018-10-05 9:48 ` Patchwork
2018-10-05 10:12 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: First cleanup pass to get rid of more crtc->config users. (rev5) Patchwork
` (2 subsequent siblings)
20 siblings, 0 replies; 30+ messages in thread
From: Patchwork @ 2018-10-05 9:48 UTC (permalink / raw)
To: Maarten Lankhorst; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: First cleanup pass to get rid of more crtc->config users. (rev4)
URL : https://patchwork.freedesktop.org/series/50506/
State : failure
== Summary ==
CALL scripts/checksyscalls.sh
DESCEND objtool
CHK include/generated/compile.h
CC [M] drivers/gpu/drm/i915/intel_display.o
In file included from ./include/linux/list.h:9:0,
from ./include/linux/dmi.h:5,
from drivers/gpu/drm/i915/intel_display.c:27:
drivers/gpu/drm/i915/intel_display.c: In function ‘intel_crtc_disable_noatomic’:
./include/linux/kernel.h:995:41: error: passing argument 1 of ‘intel_disable_shared_dpll’ from incompatible pointer type [-Werror=incompatible-pointer-types]
#define container_of(ptr, type, member) ({ \
^
drivers/gpu/drm/i915/intel_drv.h:1003:26: note: in expansion of macro ‘container_of’
#define to_intel_crtc(x) container_of(x, struct intel_crtc, base)
^~~~~~~~~~~~
drivers/gpu/drm/i915/intel_display.c:6298:28: note: in expansion of macro ‘to_intel_crtc’
intel_disable_shared_dpll(to_intel_crtc(crtc->state));
^~~~~~~~~~~~~
In file included from drivers/gpu/drm/i915/i915_drv.h:64:0,
from drivers/gpu/drm/i915/intel_drv.h:33,
from drivers/gpu/drm/i915/intel_display.c:36:
drivers/gpu/drm/i915/intel_dpll_mgr.h:339:6: note: expected ‘const struct intel_crtc_state *’ but argument is of type ‘struct intel_crtc *’
void intel_disable_shared_dpll(const struct intel_crtc_state *crtc_state);
^~~~~~~~~~~~~~~~~~~~~~~~~
In file included from ./include/linux/export.h:45:0,
from ./include/linux/linkage.h:7,
from ./include/linux/kernel.h:7,
from ./include/linux/list.h:9,
from ./include/linux/dmi.h:5,
from drivers/gpu/drm/i915/intel_display.c:27:
In function ‘intel_crtc_disable_noatomic’,
inlined from ‘intel_sanitize_crtc’ at drivers/gpu/drm/i915/intel_display.c:15594:3,
inlined from ‘intel_modeset_setup_hw_state’ at drivers/gpu/drm/i915/intel_display.c:15963:3:
./include/linux/compiler.h:358:38: error: call to ‘__compiletime_assert_6298’ declared with attribute error: pointer type mismatch in container_of()
_compiletime_assert(condition, msg, __compiletime_assert_, __LINE__)
^
./include/linux/compiler.h:338:4: note: in definition of macro ‘__compiletime_assert’
prefix ## suffix(); \
^~~~~~
./include/linux/compiler.h:358:2: note: in expansion of macro ‘_compiletime_assert’
_compiletime_assert(condition, msg, __compiletime_assert_, __LINE__)
^~~~~~~~~~~~~~~~~~~
./include/linux/build_bug.h:45:37: note: in expansion of macro ‘compiletime_assert’
#define BUILD_BUG_ON_MSG(cond, msg) compiletime_assert(!(cond), msg)
^~~~~~~~~~~~~~~~~~
./include/linux/kernel.h:997:2: note: in expansion of macro ‘BUILD_BUG_ON_MSG’
BUILD_BUG_ON_MSG(!__same_type(*(ptr), ((type *)0)->member) && \
^~~~~~~~~~~~~~~~
drivers/gpu/drm/i915/intel_drv.h:1003:26: note: in expansion of macro ‘container_of’
#define to_intel_crtc(x) container_of(x, struct intel_crtc, base)
^~~~~~~~~~~~
drivers/gpu/drm/i915/intel_display.c:6298:28: note: in expansion of macro ‘to_intel_crtc’
intel_disable_shared_dpll(to_intel_crtc(crtc->state));
^~~~~~~~~~~~~
cc1: all warnings being treated as errors
scripts/Makefile.build:305: recipe for target 'drivers/gpu/drm/i915/intel_display.o' failed
make[4]: *** [drivers/gpu/drm/i915/intel_display.o] Error 1
scripts/Makefile.build:546: recipe for target 'drivers/gpu/drm/i915' failed
make[3]: *** [drivers/gpu/drm/i915] Error 2
scripts/Makefile.build:546: recipe for target 'drivers/gpu/drm' failed
make[2]: *** [drivers/gpu/drm] Error 2
scripts/Makefile.build:546: recipe for target 'drivers/gpu' failed
make[1]: *** [drivers/gpu] Error 2
Makefile:1050: recipe for target 'drivers' failed
make: *** [drivers] Error 2
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 30+ messages in thread
* [PATCH] drm/i915: Make shared dpll functions take crtc_state, v3.
2018-10-05 9:41 ` [PATCH] drm/i915: Make shared dpll functions take crtc_state, v3 Maarten Lankhorst
@ 2018-10-05 9:52 ` Maarten Lankhorst
0 siblings, 0 replies; 30+ messages in thread
From: Maarten Lankhorst @ 2018-10-05 9:52 UTC (permalink / raw)
To: intel-gfx
Do not rely on crtc->config any more. Remove the assertion from
ibx_pch_dpll_disable, because we the dpll state tracking should
already handle this case correctly.
Changes since v1:
- Fixup accidental early return in intel_prepare_shared_dpll, oops!
Changes since v2:
- Don't use the freed crtc_state in intel_crtc_disable_noatomic()
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
Compile error fixed..
drivers/gpu/drm/i915/intel_display.c | 14 ++++++-------
drivers/gpu/drm/i915/intel_dpll_mgr.c | 29 ++++++++++-----------------
drivers/gpu/drm/i915/intel_dpll_mgr.h | 6 +++---
3 files changed, 21 insertions(+), 28 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index d47deafec606..1cc1f78de1d3 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4758,7 +4758,7 @@ static void ironlake_pch_enable(const struct intel_atomic_state *state,
* Note that enable_shared_dpll tries to do the right thing, but
* get_shared_dpll unconditionally resets the pll - we need that to have
* the right LVDS enable sequence. */
- intel_enable_shared_dpll(crtc);
+ intel_enable_shared_dpll(crtc_state);
/* set transcoder timing, panel must allow it */
assert_panel_unlocked(dev_priv, pipe);
@@ -5600,8 +5600,8 @@ static void ironlake_crtc_enable(struct intel_crtc_state *pipe_config,
intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false);
intel_set_pch_fifo_underrun_reporting(dev_priv, pipe, false);
- if (intel_crtc->config->has_pch_encoder)
- intel_prepare_shared_dpll(intel_crtc);
+ if (pipe_config->has_pch_encoder)
+ intel_prepare_shared_dpll(pipe_config);
if (intel_crtc_has_dp_encoder(intel_crtc->config))
intel_dp_set_m_n(intel_crtc, M1_N1);
@@ -5719,8 +5719,8 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
intel_encoders_pre_pll_enable(crtc, pipe_config, old_state);
- if (intel_crtc->config->shared_dpll)
- intel_enable_shared_dpll(intel_crtc);
+ if (pipe_config->shared_dpll)
+ intel_enable_shared_dpll(pipe_config);
if (INTEL_GEN(dev_priv) >= 11)
icl_map_plls_to_ports(crtc, pipe_config, old_state);
@@ -6295,7 +6295,7 @@ static void intel_crtc_disable_noatomic(struct drm_crtc *crtc,
intel_fbc_disable(intel_crtc);
intel_update_watermarks(intel_crtc);
- intel_disable_shared_dpll(intel_crtc);
+ intel_disable_shared_dpll(to_intel_crtc_state(crtc->state));
domains = intel_crtc->enabled_power_domains;
for_each_power_domain(domain, domains)
@@ -12744,7 +12744,7 @@ static void intel_atomic_commit_tail(struct drm_atomic_state *state)
dev_priv->display.crtc_disable(old_intel_crtc_state, state);
intel_crtc->active = false;
intel_fbc_disable(intel_crtc);
- intel_disable_shared_dpll(intel_crtc);
+ intel_disable_shared_dpll(old_intel_crtc_state);
/*
* Underruns don't always raise
diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c b/drivers/gpu/drm/i915/intel_dpll_mgr.c
index e6cac9225536..10e820804eee 100644
--- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
@@ -131,11 +131,11 @@ void assert_shared_dpll(struct drm_i915_private *dev_priv,
* This calls the PLL's prepare hook if it has one and if the PLL is not
* already enabled. The prepare hook is platform specific.
*/
-void intel_prepare_shared_dpll(struct intel_crtc *crtc)
+void intel_prepare_shared_dpll(const struct intel_crtc_state *crtc_state)
{
- struct drm_device *dev = crtc->base.dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
- struct intel_shared_dpll *pll = crtc->config->shared_dpll;
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
+ struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ struct intel_shared_dpll *pll = crtc_state->shared_dpll;
if (WARN_ON(pll == NULL))
return;
@@ -158,11 +158,11 @@ void intel_prepare_shared_dpll(struct intel_crtc *crtc)
*
* Enable the shared DPLL used by @crtc.
*/
-void intel_enable_shared_dpll(struct intel_crtc *crtc)
+void intel_enable_shared_dpll(const struct intel_crtc_state *crtc_state)
{
- struct drm_device *dev = crtc->base.dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
- struct intel_shared_dpll *pll = crtc->config->shared_dpll;
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
+ struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ struct intel_shared_dpll *pll = crtc_state->shared_dpll;
unsigned int crtc_mask = drm_crtc_mask(&crtc->base);
unsigned int old_mask;
@@ -203,10 +203,11 @@ void intel_enable_shared_dpll(struct intel_crtc *crtc)
*
* Disable the shared DPLL used by @crtc.
*/
-void intel_disable_shared_dpll(struct intel_crtc *crtc)
+void intel_disable_shared_dpll(const struct intel_crtc_state *crtc_state)
{
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
- struct intel_shared_dpll *pll = crtc->config->shared_dpll;
+ struct intel_shared_dpll *pll = crtc_state->shared_dpll;
unsigned int crtc_mask = drm_crtc_mask(&crtc->base);
/* PCH only available on ILK+ */
@@ -409,14 +410,6 @@ static void ibx_pch_dpll_disable(struct drm_i915_private *dev_priv,
struct intel_shared_dpll *pll)
{
const enum intel_dpll_id id = pll->info->id;
- struct drm_device *dev = &dev_priv->drm;
- struct intel_crtc *crtc;
-
- /* Make sure no transcoder isn't still depending on us. */
- for_each_intel_crtc(dev, crtc) {
- if (crtc->config->shared_dpll == pll)
- assert_pch_transcoder_disabled(dev_priv, crtc->pipe);
- }
I915_WRITE(PCH_DPLL(id), 0);
POSTING_READ(PCH_DPLL(id));
diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.h b/drivers/gpu/drm/i915/intel_dpll_mgr.h
index bf0de8a4dc63..9c033236f2ba 100644
--- a/drivers/gpu/drm/i915/intel_dpll_mgr.h
+++ b/drivers/gpu/drm/i915/intel_dpll_mgr.h
@@ -334,9 +334,9 @@ struct intel_shared_dpll *intel_get_shared_dpll(struct intel_crtc *crtc,
void intel_release_shared_dpll(struct intel_shared_dpll *dpll,
struct intel_crtc *crtc,
struct drm_atomic_state *state);
-void intel_prepare_shared_dpll(struct intel_crtc *crtc);
-void intel_enable_shared_dpll(struct intel_crtc *crtc);
-void intel_disable_shared_dpll(struct intel_crtc *crtc);
+void intel_prepare_shared_dpll(const struct intel_crtc_state *crtc_state);
+void intel_enable_shared_dpll(const struct intel_crtc_state *crtc_state);
+void intel_disable_shared_dpll(const struct intel_crtc_state *crtc_state);
void intel_shared_dpll_swap_state(struct drm_atomic_state *state);
void intel_shared_dpll_init(struct drm_device *dev);
--
2.19.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 30+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for drm/i915: First cleanup pass to get rid of more crtc->config users. (rev5)
2018-10-04 9:45 [PATCH v2 00/13] drm/i915: First cleanup pass to get rid of more crtc->config users Maarten Lankhorst
` (17 preceding siblings ...)
2018-10-05 9:48 ` ✗ Fi.CI.BAT: failure for drm/i915: First cleanup pass to get rid of more crtc->config users. (rev4) Patchwork
@ 2018-10-05 10:12 ` Patchwork
2018-10-05 10:37 ` ✓ Fi.CI.BAT: success " Patchwork
2018-10-05 14:42 ` ✓ Fi.CI.IGT: " Patchwork
20 siblings, 0 replies; 30+ messages in thread
From: Patchwork @ 2018-10-05 10:12 UTC (permalink / raw)
To: Maarten Lankhorst; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: First cleanup pass to get rid of more crtc->config users. (rev5)
URL : https://patchwork.freedesktop.org/series/50506/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
66df1bb1f2eb drm/i915: Remove dereferences of crtc->config in set_pipeconf/misc functions, v2.
0ebb99e2fea2 drm/i915: Make panel fitter functions take state
ee7960bc3732 drm/i915: Make intel_set_pipe_timings/src_size take a pointer to crtc_state
1aef39b28ccb drm/i915: Use crtc_state in ironlake_enable_pch_transcoder
ac716595d486 drm/i915: Make skl_detach_scalers take crtc_state
3d9d161fed06 drm/i915: Make pll functions take crtc_state, v2.
b9845c8304c7 drm/i915: Make ironlake_pch_transcoder_set_timings take crtc_state
d9ee4c23e03b drm/i915: Make shared dpll functions take crtc_state, v3.
7901bdd874f5 drm/i915: Get rid of crtc->config from icl_pll_to_ddi_pll_sel
f14588299a11 drm/i915: Use crtc->state in intel_fbdev_init_bios
674bb2b603cb drm/i915: Get rid of crtc->config dereference in intel_dp_retrain_link
-:10: WARNING:TYPO_SPELLING: 'occuring' may be misspelled - perhaps 'occurring'?
#10:
We're already using crtc_state here and made sure no modeset is occuring
total: 0 errors, 1 warnings, 0 checks, 16 lines checked
461028d6c924 drm/i915: Get rid of crtc->config in chv_data_lane_soft_reset
ebca883df354 drm/i915: Get rid of intel_crtc->config in crtc_enable/disable functions, v2.
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 30+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915: First cleanup pass to get rid of more crtc->config users. (rev5)
2018-10-04 9:45 [PATCH v2 00/13] drm/i915: First cleanup pass to get rid of more crtc->config users Maarten Lankhorst
` (18 preceding siblings ...)
2018-10-05 10:12 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: First cleanup pass to get rid of more crtc->config users. (rev5) Patchwork
@ 2018-10-05 10:37 ` Patchwork
2018-10-05 14:42 ` ✓ Fi.CI.IGT: " Patchwork
20 siblings, 0 replies; 30+ messages in thread
From: Patchwork @ 2018-10-05 10:37 UTC (permalink / raw)
To: Maarten Lankhorst; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: First cleanup pass to get rid of more crtc->config users. (rev5)
URL : https://patchwork.freedesktop.org/series/50506/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4933 -> Patchwork_10377 =
== Summary - SUCCESS ==
No regressions found.
External URL: https://patchwork.freedesktop.org/api/1.0/series/50506/revisions/5/mbox/
== Known issues ==
Here are the changes found in Patchwork_10377 that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt@gem_exec_suspend@basic-s3:
fi-bdw-samus: NOTRUN -> INCOMPLETE (fdo#107773)
fdo#107773 https://bugs.freedesktop.org/show_bug.cgi?id=107773
== Participating hosts (44 -> 39) ==
Additional (2): fi-glk-j4005 fi-bdw-samus
Missing (7): fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-icl-u2 fi-ctg-p8600 fi-byt-clapper fi-kbl-r
== Build changes ==
* Linux: CI_DRM_4933 -> Patchwork_10377
CI_DRM_4933: 6b7a44d1597791524f46d7ea17620db54dffdc8c @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4669: 5f40e617cd9c1e089f4a2d79c53a417d891e3e3c @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_10377: ebca883df354df4bffaf7643db2bbbcb58390fe8 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
ebca883df354 drm/i915: Get rid of intel_crtc->config in crtc_enable/disable functions, v2.
461028d6c924 drm/i915: Get rid of crtc->config in chv_data_lane_soft_reset
674bb2b603cb drm/i915: Get rid of crtc->config dereference in intel_dp_retrain_link
f14588299a11 drm/i915: Use crtc->state in intel_fbdev_init_bios
7901bdd874f5 drm/i915: Get rid of crtc->config from icl_pll_to_ddi_pll_sel
d9ee4c23e03b drm/i915: Make shared dpll functions take crtc_state, v3.
b9845c8304c7 drm/i915: Make ironlake_pch_transcoder_set_timings take crtc_state
3d9d161fed06 drm/i915: Make pll functions take crtc_state, v2.
ac716595d486 drm/i915: Make skl_detach_scalers take crtc_state
1aef39b28ccb drm/i915: Use crtc_state in ironlake_enable_pch_transcoder
ee7960bc3732 drm/i915: Make intel_set_pipe_timings/src_size take a pointer to crtc_state
0ebb99e2fea2 drm/i915: Make panel fitter functions take state
66df1bb1f2eb drm/i915: Remove dereferences of crtc->config in set_pipeconf/misc functions, v2.
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10377/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 30+ messages in thread
* ✓ Fi.CI.IGT: success for drm/i915: First cleanup pass to get rid of more crtc->config users. (rev5)
2018-10-04 9:45 [PATCH v2 00/13] drm/i915: First cleanup pass to get rid of more crtc->config users Maarten Lankhorst
` (19 preceding siblings ...)
2018-10-05 10:37 ` ✓ Fi.CI.BAT: success " Patchwork
@ 2018-10-05 14:42 ` Patchwork
20 siblings, 0 replies; 30+ messages in thread
From: Patchwork @ 2018-10-05 14:42 UTC (permalink / raw)
To: Maarten Lankhorst; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: First cleanup pass to get rid of more crtc->config users. (rev5)
URL : https://patchwork.freedesktop.org/series/50506/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4933_full -> Patchwork_10377_full =
== Summary - WARNING ==
Minor unknown changes coming with Patchwork_10377_full need to be verified
manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_10377_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
== Possible new issues ==
Here are the unknown changes that may have been introduced in Patchwork_10377_full:
=== IGT changes ===
==== Warnings ====
igt@pm_rc6_residency@rc6-accuracy:
shard-snb: PASS -> SKIP
== Known issues ==
Here are the changes found in Patchwork_10377_full that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt@gem_userptr_blits@readonly-unsync:
shard-skl: PASS -> INCOMPLETE (fdo#108074)
igt@kms_busy@extended-pageflip-hang-newfb-render-a:
shard-apl: PASS -> DMESG-WARN (fdo#107956)
igt@kms_ccs@pipe-b-crc-sprite-planes-basic:
shard-glk: PASS -> FAIL (fdo#108145)
igt@kms_color@pipe-a-ctm-max:
shard-apl: PASS -> FAIL (fdo#108147)
igt@kms_cursor_crc@cursor-256x85-sliding:
shard-apl: PASS -> FAIL (fdo#103232) +1
igt@kms_flip@plain-flip-ts-check-interruptible:
shard-skl: NOTRUN -> FAIL (fdo#100368)
igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-gtt:
shard-apl: PASS -> FAIL (fdo#103167) +1
igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-fullscreen:
shard-glk: PASS -> FAIL (fdo#103167) +1
{igt@kms_plane_alpha_blend@pipe-c-alpha-transparant-fb}:
shard-skl: NOTRUN -> FAIL (fdo#108145) +3
igt@kms_plane_multiple@atomic-pipe-b-tiling-y:
shard-glk: PASS -> FAIL (fdo#103166) +1
shard-apl: PASS -> FAIL (fdo#103166) +2
igt@kms_rotation_crc@exhaust-fences:
shard-skl: NOTRUN -> DMESG-WARN (fdo#105748)
igt@kms_sysfs_edid_timing:
shard-skl: NOTRUN -> FAIL (fdo#100047)
igt@pm_rpm@legacy-planes-dpms:
shard-skl: PASS -> INCOMPLETE (fdo#107807, fdo#105959)
==== Possible fixes ====
igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-c:
shard-glk: DMESG-WARN (fdo#107956) -> PASS
igt@kms_cursor_crc@cursor-128x128-suspend:
shard-glk: FAIL (fdo#103232) -> PASS +2
shard-apl: FAIL (fdo#103191, fdo#103232) -> PASS
igt@kms_cursor_crc@cursor-256x256-sliding:
shard-apl: FAIL (fdo#103232) -> PASS
igt@kms_cursor_legacy@cursora-vs-flipa-toggle:
shard-glk: DMESG-WARN (fdo#105763, fdo#106538) -> PASS
igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-wc:
shard-glk: FAIL (fdo#103167) -> PASS
igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-fullscreen:
shard-apl: FAIL (fdo#103167) -> PASS +1
{igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb}:
shard-glk: FAIL (fdo#108145) -> PASS
igt@kms_plane_multiple@atomic-pipe-b-tiling-yf:
shard-glk: FAIL (fdo#103166) -> PASS
igt@kms_setmode@basic:
shard-apl: FAIL (fdo#99912) -> PASS
igt@pm_rpm@drm-resources-equal:
shard-skl: INCOMPLETE (fdo#107807) -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
fdo#100047 https://bugs.freedesktop.org/show_bug.cgi?id=100047
fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166
fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191
fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232
fdo#105748 https://bugs.freedesktop.org/show_bug.cgi?id=105748
fdo#105763 https://bugs.freedesktop.org/show_bug.cgi?id=105763
fdo#105959 https://bugs.freedesktop.org/show_bug.cgi?id=105959
fdo#106538 https://bugs.freedesktop.org/show_bug.cgi?id=106538
fdo#107807 https://bugs.freedesktop.org/show_bug.cgi?id=107807
fdo#107956 https://bugs.freedesktop.org/show_bug.cgi?id=107956
fdo#108074 https://bugs.freedesktop.org/show_bug.cgi?id=108074
fdo#108145 https://bugs.freedesktop.org/show_bug.cgi?id=108145
fdo#108147 https://bugs.freedesktop.org/show_bug.cgi?id=108147
fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912
== Participating hosts (6 -> 6) ==
No changes in participating hosts
== Build changes ==
* Linux: CI_DRM_4933 -> Patchwork_10377
CI_DRM_4933: 6b7a44d1597791524f46d7ea17620db54dffdc8c @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4669: 5f40e617cd9c1e089f4a2d79c53a417d891e3e3c @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_10377: ebca883df354df4bffaf7643db2bbbcb58390fe8 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10377/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v2 08/13] drm/i915: Make shared dpll functions take crtc_state
2018-10-04 15:24 ` Ville Syrjälä
2018-10-05 9:30 ` Maarten Lankhorst
@ 2018-10-05 18:29 ` Maarten Lankhorst
1 sibling, 0 replies; 30+ messages in thread
From: Maarten Lankhorst @ 2018-10-05 18:29 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
Op 04-10-18 om 17:24 schreef Ville Syrjälä:
> On Thu, Oct 04, 2018 at 03:25:42PM +0200, Maarten Lankhorst wrote:
>> Op 04-10-18 om 14:57 schreef Ville Syrjälä:
>>> On Thu, Oct 04, 2018 at 11:45:59AM +0200, Maarten Lankhorst wrote:
>>>> Do not rely on crtc->config any more. Remove the assertion from
>>>> ibx_pch_dpll_disable, because we the dpll state tracking should
>>>> already handle this case correctly.
>>>>
>>>> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
>>>> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>>>> ---
>>>> drivers/gpu/drm/i915/intel_display.c | 14 ++++++------
>>>> drivers/gpu/drm/i915/intel_dpll_mgr.c | 31 +++++++++++----------------
>>>> drivers/gpu/drm/i915/intel_dpll_mgr.h | 6 +++---
>>>> 3 files changed, 22 insertions(+), 29 deletions(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
>>>> index fe8ccbdd4ea1..4df4293a7917 100644
>>>> --- a/drivers/gpu/drm/i915/intel_display.c
>>>> +++ b/drivers/gpu/drm/i915/intel_display.c
>>>> @@ -4749,7 +4749,7 @@ static void ironlake_pch_enable(const struct intel_atomic_state *state,
>>>> * Note that enable_shared_dpll tries to do the right thing, but
>>>> * get_shared_dpll unconditionally resets the pll - we need that to have
>>>> * the right LVDS enable sequence. */
>>>> - intel_enable_shared_dpll(crtc);
>>>> + intel_enable_shared_dpll(crtc_state);
>>>>
>>>> /* set transcoder timing, panel must allow it */
>>>> assert_panel_unlocked(dev_priv, pipe);
>>>> @@ -5591,8 +5591,8 @@ static void ironlake_crtc_enable(struct intel_crtc_state *pipe_config,
>>>> intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false);
>>>> intel_set_pch_fifo_underrun_reporting(dev_priv, pipe, false);
>>>>
>>>> - if (intel_crtc->config->has_pch_encoder)
>>>> - intel_prepare_shared_dpll(intel_crtc);
>>>> + if (pipe_config->has_pch_encoder)
>>>> + intel_prepare_shared_dpll(pipe_config);
>>>>
>>>> if (intel_crtc_has_dp_encoder(intel_crtc->config))
>>>> intel_dp_set_m_n(intel_crtc, M1_N1);
>>>> @@ -5710,8 +5710,8 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
>>>>
>>>> intel_encoders_pre_pll_enable(crtc, pipe_config, old_state);
>>>>
>>>> - if (intel_crtc->config->shared_dpll)
>>>> - intel_enable_shared_dpll(intel_crtc);
>>>> + if (pipe_config->shared_dpll)
>>>> + intel_enable_shared_dpll(pipe_config);
>>>>
>>>> if (INTEL_GEN(dev_priv) >= 11)
>>>> icl_map_plls_to_ports(crtc, pipe_config, old_state);
>>>> @@ -6286,7 +6286,7 @@ static void intel_crtc_disable_noatomic(struct drm_crtc *crtc,
>>>>
>>>> intel_fbc_disable(intel_crtc);
>>>> intel_update_watermarks(intel_crtc);
>>>> - intel_disable_shared_dpll(intel_crtc);
>>>> + intel_disable_shared_dpll(crtc_state);
>>> I guess this is the explosion on i915g/i965g. We've already freed this
>>> crtc state at this point. So I guess s/crtc_state/crtc->state/ and it
>>> should be fine?
>>>
>> No, the explosion is at
>>
>> - if (WARN_ON(pll == NULL))
>> + if (!WARN_ON(!pll))
>> return;
>>
>> Oops! Should be fixed in v2 I'm sending now.
> <4>[ 11.181254] R10: 0000000000000000 R11: 0000000000000000 R12: 6b6b6b6b6b6b6b6b
> <4>[ 11.181141] RIP: 0010:intel_disable_shared_dpll+0x12/0x130 [i915]
> <4>[ 11.181157] Code: c7 e9 67 25 a0 e8 9e da ec e0 0f 0b e9 18 ff ff ff 0f 1f 80 00 00 00 00 41 56 41 55 41 54 55 53 4c 8b 27 48 8b 9f 98 02 00 00 <4d> 8b 34 24 41 80 be 5c 0d 00 00 04 76 05 48 85 db 75 09 5b 5d 41
>
> 72a: 4d 8b 34 24 mov (%r12),%r14
>
> Looks like it's still trying to drink poison.
>
And pushed, thanks for reviewing. :)
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 30+ messages in thread
end of thread, other threads:[~2018-10-05 18:32 UTC | newest]
Thread overview: 30+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-10-04 9:45 [PATCH v2 00/13] drm/i915: First cleanup pass to get rid of more crtc->config users Maarten Lankhorst
2018-10-04 9:45 ` [PATCH v2 01/13] drm/i915: Remove dereferences of crtc->config in set_pipeconf/misc functions, v2 Maarten Lankhorst
2018-10-04 9:45 ` [PATCH v2 02/13] drm/i915: Make panel fitter functions take state Maarten Lankhorst
2018-10-04 9:45 ` [PATCH v2 03/13] drm/i915: Make intel_set_pipe_timings/src_size take a pointer to crtc_state Maarten Lankhorst
2018-10-04 9:45 ` [PATCH v2 04/13] drm/i915: Use crtc_state in ironlake_enable_pch_transcoder Maarten Lankhorst
2018-10-04 9:45 ` [PATCH v2 05/13] drm/i915: Make skl_detach_scalers take crtc_state Maarten Lankhorst
2018-10-04 9:45 ` [PATCH v2 06/13] drm/i915: Make pll functions take crtc_state, v2 Maarten Lankhorst
2018-10-04 9:45 ` [PATCH v2 07/13] drm/i915: Make ironlake_pch_transcoder_set_timings take crtc_state Maarten Lankhorst
2018-10-04 9:45 ` [PATCH v2 08/13] drm/i915: Make shared dpll functions " Maarten Lankhorst
2018-10-04 12:57 ` Ville Syrjälä
2018-10-04 13:25 ` Maarten Lankhorst
2018-10-04 15:24 ` Ville Syrjälä
2018-10-05 9:30 ` Maarten Lankhorst
2018-10-05 18:29 ` Maarten Lankhorst
2018-10-04 13:27 ` [PATCH] drm/i915: Make shared dpll functions take crtc_state, v2 Maarten Lankhorst
2018-10-05 9:41 ` [PATCH] drm/i915: Make shared dpll functions take crtc_state, v3 Maarten Lankhorst
2018-10-05 9:52 ` Maarten Lankhorst
2018-10-04 9:46 ` [PATCH v2 09/13] drm/i915: Get rid of crtc->config from icl_pll_to_ddi_pll_sel Maarten Lankhorst
2018-10-04 9:46 ` [PATCH v2 10/13] drm/i915: Use crtc->state in intel_fbdev_init_bios Maarten Lankhorst
2018-10-04 9:46 ` [PATCH v2 11/13] drm/i915: Get rid of crtc->config dereference in intel_dp_retrain_link Maarten Lankhorst
2018-10-04 9:46 ` [PATCH v2 12/13] drm/i915: Get rid of crtc->config in chv_data_lane_soft_reset Maarten Lankhorst
2018-10-04 9:46 ` [PATCH v2 13/13] drm/i915: Get rid of intel_crtc->config in crtc_enable/disable functions, v2 Maarten Lankhorst
2018-10-04 10:42 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: First cleanup pass to get rid of more crtc->config users. (rev2) Patchwork
2018-10-04 11:07 ` ✗ Fi.CI.BAT: failure " Patchwork
2018-10-04 14:03 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: First cleanup pass to get rid of more crtc->config users. (rev3) Patchwork
2018-10-04 14:28 ` ✗ Fi.CI.BAT: failure " Patchwork
2018-10-05 9:48 ` ✗ Fi.CI.BAT: failure for drm/i915: First cleanup pass to get rid of more crtc->config users. (rev4) Patchwork
2018-10-05 10:12 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: First cleanup pass to get rid of more crtc->config users. (rev5) Patchwork
2018-10-05 10:37 ` ✓ Fi.CI.BAT: success " Patchwork
2018-10-05 14:42 ` ✓ Fi.CI.IGT: " Patchwork
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