From mboxrd@z Thu Jan 1 00:00:00 1970 From: Viresh Kumar Subject: Re: [PATCH 5/9] arm64: dts: sdm845: Add gpu and gmu device nodes Date: Thu, 11 Oct 2018 10:32:16 +0530 Message-ID: <20181011050216.4ba5i3ghh5rbvjbl@vireshk-i7> References: <20180827151112.25211-1-jcrouse@codeaurora.org> <20180827151112.25211-6-jcrouse@codeaurora.org> <20181010094628.wejfgmvcv6stzoco@vireshk-i7> <20181010142905.GB9977@jcrouse-lnx.qualcomm.com> <20181010143149.4e3ct3efkuwxa2hw@vireshk-i7> <20181010144856.GC9977@jcrouse-lnx.qualcomm.com> <20181010145139.nvalsr2ij2lj53dh@vireshk-i7> <20181010151006.GD9977@jcrouse-lnx.qualcomm.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Content-Disposition: inline In-Reply-To: <20181010151006.GD9977-9PYrDHPZ2Orvke4nUoYGnHL1okKdlPRT@public.gmane.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: freedreno-bounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org Sender: "Freedreno" To: freedreno-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org, georgi.djakov-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org, linux-arm-msm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-pm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, bjorn.andersson-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org, vireshk-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, nm-l0cyMroinI0@public.gmane.org, sboyd-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, niklas.cassel-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org, rnayak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org List-Id: linux-arm-msm@vger.kernel.org T24gMTAtMTAtMTgsIDA5OjEwLCBKb3JkYW4gQ3JvdXNlIHdyb3RlOgo+IE9uIFdlZCwgT2N0IDEw LCAyMDE4IGF0IDA4OjIxOjM5UE0gKzA1MzAsIFZpcmVzaCBLdW1hciB3cm90ZToKPiA+IE9uIDEw LTEwLTE4LCAwODo0OCwgSm9yZGFuIENyb3VzZSB3cm90ZToKPiA+ID4gcWNvbSxsZXZlbCBjb21l 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sdm845: Add gpu and gmu device nodes In-Reply-To: <20181010151006.GD9977@jcrouse-lnx.qualcomm.com> References: <20180827151112.25211-1-jcrouse@codeaurora.org> <20180827151112.25211-6-jcrouse@codeaurora.org> <20181010094628.wejfgmvcv6stzoco@vireshk-i7> <20181010142905.GB9977@jcrouse-lnx.qualcomm.com> <20181010143149.4e3ct3efkuwxa2hw@vireshk-i7> <20181010144856.GC9977@jcrouse-lnx.qualcomm.com> <20181010145139.nvalsr2ij2lj53dh@vireshk-i7> <20181010151006.GD9977@jcrouse-lnx.qualcomm.com> Message-ID: <20181011050216.4ba5i3ghh5rbvjbl@vireshk-i7> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 10-10-18, 09:10, Jordan Crouse wrote: > On Wed, Oct 10, 2018 at 08:21:39PM +0530, Viresh Kumar wrote: > > On 10-10-18, 08:48, Jordan Crouse wrote: > > > qcom,level comes straight from: > > > > > > https://lore.kernel.org/lkml/20180627045234.27403-2-rnayak at codeaurora.org/ > > > > > > But in this case instead of using the CPU to program the RPMh we are passing > > > the value to a microprocessor (the GMU) and that will do the vote on our behalf > > > (Technically we use the value to look up the vote in the cmd-db database and > > > pass that to the GMU) > > > > > > This is why the qcom,level was added in the first place so we could at least > > > share the nomenclature with the rpmhd if not the implementation. > > > > How you actually pass the vote to the underlying hardware, RPMh or > > GMU, is irrelevant to the whole thing. What is important is how we > > describe that in DT and how we represent the whole thing. > > > > We have chosen genpd + OPP to do this and same should be used by you > > as well. Another benefit is that the genpd core will do vote > > aggregation for you here. > > I'm not sure what you are suggesting? The vote is represented in DT exactly as > described in the bindings. Look at how Rajendra has done it to see the difference. https://lore.kernel.org/lkml/20180627045234.27403-3-rnayak at codeaurora.org/ -- viresh