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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org
Subject: [Qemu-devel] [PATCH 09/20] target/arm: Use gvec for NEON_3R_VADD_VSUB insns
Date: Thu, 11 Oct 2018 13:51:55 -0700	[thread overview]
Message-ID: <20181011205206.3552-10-richard.henderson@linaro.org> (raw)
In-Reply-To: <20181011205206.3552-1-richard.henderson@linaro.org>

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/arm/translate.c | 29 ++++++++++-------------------
 1 file changed, 10 insertions(+), 19 deletions(-)

diff --git a/target/arm/translate.c b/target/arm/translate.c
index 4ab9f69b01..4dcd7123e9 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -5949,6 +5949,16 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn)
                 break;
             }
             return 0;
+
+        case NEON_3R_VADD_VSUB:
+            if (u) {
+                tcg_gen_gvec_sub(size, rd_ofs, rn_ofs, rm_ofs,
+                                 vec_size, vec_size);
+            } else {
+                tcg_gen_gvec_add(size, rd_ofs, rn_ofs, rm_ofs,
+                                 vec_size, vec_size);
+            }
+            return 0;
         }
         if (size == 3) {
             /* 64-bit element instructions. */
@@ -6006,13 +6016,6 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn)
                                                   cpu_V1, cpu_V0);
                     }
                     break;
-                case NEON_3R_VADD_VSUB:
-                    if (u) {
-                        tcg_gen_sub_i64(CPU_V001);
-                    } else {
-                        tcg_gen_add_i64(CPU_V001);
-                    }
-                    break;
                 default:
                     abort();
                 }
@@ -6147,18 +6150,6 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn)
             tmp2 = neon_load_reg(rd, pass);
             gen_neon_add(size, tmp, tmp2);
             break;
-        case NEON_3R_VADD_VSUB:
-            if (!u) { /* VADD */
-                gen_neon_add(size, tmp, tmp2);
-            } else { /* VSUB */
-                switch (size) {
-                case 0: gen_helper_neon_sub_u8(tmp, tmp, tmp2); break;
-                case 1: gen_helper_neon_sub_u16(tmp, tmp, tmp2); break;
-                case 2: tcg_gen_sub_i32(tmp, tmp, tmp2); break;
-                default: abort();
-                }
-            }
-            break;
         case NEON_3R_VTST_VCEQ:
             if (!u) { /* VTST */
                 switch (size) {
-- 
2.17.1

  parent reply	other threads:[~2018-10-11 20:52 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-10-11 20:51 [Qemu-devel] [PATCH 00/20] target/arm: Convert some neon insns to gvec Richard Henderson
2018-10-11 20:51 ` [Qemu-devel] [PATCH 01/20] target/arm: Hoist address increment for vector memory ops Richard Henderson
2018-10-11 20:51 ` [Qemu-devel] [PATCH 02/20] target/arm: Don't call tcg_clear_temp_count Richard Henderson
2018-10-11 23:35   ` Philippe Mathieu-Daudé
2018-10-11 20:51 ` [Qemu-devel] [PATCH 03/20] target/arm: Use tcg_gen_gvec_dup_i64 for LD[1-4]R Richard Henderson
2018-10-11 20:51 ` [Qemu-devel] [PATCH 04/20] target/arm: Promote consecutive memory ops for aa64 Richard Henderson
2018-10-11 20:51 ` [Qemu-devel] [PATCH 05/20] target/arm: Mark some arrays const Richard Henderson
2018-10-11 23:34   ` Philippe Mathieu-Daudé
2018-10-19 13:05   ` Peter Maydell
2018-10-11 20:51 ` [Qemu-devel] [PATCH 06/20] target/arm: Use gvec for NEON VDUP Richard Henderson
2018-10-11 20:51 ` [Qemu-devel] [PATCH 07/20] target/arm: Use gvec for NEON VMOV, VMVN, VBIC & VORR (immediate) Richard Henderson
2018-10-11 20:51 ` [Qemu-devel] [PATCH 08/20] target/arm: Use gvec for NEON_3R_LOGIC insns Richard Henderson
2018-10-11 20:51 ` Richard Henderson [this message]
2018-10-11 20:51 ` [Qemu-devel] [PATCH 10/20] target/arm: Use gvec for NEON_2RM_VMN, NEON_2RM_VNEG Richard Henderson
2018-10-11 20:51 ` [Qemu-devel] [PATCH 11/20] target/arm: Use gvec for NEON_3R_VMUL Richard Henderson
2018-10-11 20:51 ` [Qemu-devel] [PATCH 12/20] target/arm: Use gvec for VSHR, VSHL Richard Henderson
2018-10-11 20:51 ` [Qemu-devel] [PATCH 13/20] target/arm: Use gvec for VSRA Richard Henderson
2018-10-11 20:52 ` [Qemu-devel] [PATCH 14/20] target/arm: Use gvec for VSRI, VSLI Richard Henderson
2018-10-11 20:52 ` [Qemu-devel] [PATCH 15/20] target/arm: Use gvec for NEON_3R_VML Richard Henderson
2018-10-11 20:52 ` [Qemu-devel] [PATCH 16/20] target/arm: Use gvec for NEON_3R_VTST_VCEQ, NEON_3R_VCGT, NEON_3R_VCGE Richard Henderson
2018-10-11 20:52 ` [Qemu-devel] [PATCH 17/20] target/arm: Use gvec for NEON VLD all lanes Richard Henderson
2018-10-19 13:05   ` Peter Maydell
2018-10-11 20:52 ` [Qemu-devel] [PATCH 18/20] target/arm: Reorg NEON VLD/VST all elements Richard Henderson
2018-10-19 13:50   ` Peter Maydell
2018-10-19 15:15     ` Richard Henderson
2018-10-11 20:52 ` [Qemu-devel] [PATCH 19/20] target/arm: Promote consecutive memory ops for aa32 Richard Henderson
2018-10-19  5:17   ` Philippe Mathieu-Daudé
2018-10-11 20:52 ` [Qemu-devel] [PATCH 20/20] target/arm: Reorg NEON VLD/VST single element to one lane Richard Henderson
2018-10-19 13:51 ` [Qemu-devel] [PATCH 00/20] target/arm: Convert some neon insns to gvec Peter Maydell

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