From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.2 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_PASS,URIBL_BLOCKED,USER_AGENT_MUTT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EDED8C6787C for ; Sat, 13 Oct 2018 02:14:06 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id AF8C520895 for ; Sat, 13 Oct 2018 02:14:06 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org AF8C520895 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726320AbeJMJtU (ORCPT ); Sat, 13 Oct 2018 05:49:20 -0400 Received: from mx1.redhat.com ([209.132.183.28]:57230 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725978AbeJMJtU (ORCPT ); Sat, 13 Oct 2018 05:49:20 -0400 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 2AA723078AA9; Sat, 13 Oct 2018 02:14:04 +0000 (UTC) Received: from asgard.redhat.com (ovpn-200-28.brq.redhat.com [10.40.200.28]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 6AFB1601AC; Sat, 13 Oct 2018 02:13:55 +0000 (UTC) Date: Sat, 13 Oct 2018 04:14:16 +0200 From: Eugene Syromiatnikov To: Catalin Marinas Cc: Yury Norov , Arnd Bergmann , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, linux-arch@vger.kernel.org, linux-api@vger.kernel.org, Adam Borowski , Alexander Graf , Alexey Klimov , Andreas Schwab , Andrew Pinski , Bamvor Zhangjian , Chris Metcalf , Christoph Muellner , Dave Martin , "David S . Miller" , Florian Weimer , Geert Uytterhoeven , Heiko Carstens , James Hogan , James Morse , Joseph Myers , Lin Yongting , Manuel Montezelo , Mark Brown , Martin Schwidefsky , Maxim Kuvyrkov , Nathan_Lynch , Philipp Tomsich , Prasun Kapoor , Ramana Radhakrishnan , Steve Ellcey , Szabolcs Nagy , Pavel Machek , Palmer Dabbelt , Wookey Subject: Re: [PATCH v9 00/24] ILP32 for ARM64 Message-ID: <20181013021416.GE21972@asgard.redhat.com> References: <20180516081910.10067-1-ynorov@caviumnetworks.com> <20180724173957.GA22106@yury-thinkpad> <20181010141017.GA2881@asgard.redhat.com> <20181010153655.GA212880@arrakis.emea.arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20181010153655.GA212880@arrakis.emea.arm.com> User-Agent: Mutt/1.5.23 (2014-03-12) X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.48]); Sat, 13 Oct 2018 02:14:04 +0000 (UTC) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Oct 10, 2018 at 04:36:56PM +0100, Catalin Marinas wrote: > On Wed, Oct 10, 2018 at 04:10:21PM +0200, Eugene Syromiatnikov wrote: > > I have some questions regarding AArch64 ILP32 implementation for which I > > failed to find an answer myself: > > * How ptrace() tracer is supposed to distinguish between ILP32 and LP64 > > tracees? For MIPS N32 and x32 this is possible based on syscall > > number, but for AArch64 ILP32 I do not see such a sign. There's also > > ARM_ip is employed for signalling entering/exiting, I wonder whether > > it's possible to employ it also for signalling tracee's personality. > > With the current implementation, I don't think you can distinguish. From > the kernel perspective, the register set is the same. What is the > use-case for this? Err, a ptrace()-based tracer trying to trace a process, for example? > We could add a new regset to expose the ILP32 state (NT_ARM_..., I can't > think of a name now but probably not PER* as this implies PER_LINUX_... > which is independent from TIF_32BIT_*). So that would require an additional ptrace() call on each syscall stop, is that correct? > > * What's the reasoning behind capping syscall arguments to 32 bit? x32 > > and MIPS N32 do not have such a restriction (and do not need special > > wrappers for syscalls that pass 64-bit values as a result, except > > when they do, as it is the case for preadv2 on x32); moreover, that > > would lead to insurmountable difficulties for AArch64 ILP32 tracers > > that try to trace LP64 tracees, as it would be impossible to pass > > 64-bit addresses to process_vm_{read,write} or ptrace PEEK/POKE. > > We've attempted in earlier versions to allow a mix of 32 and 64-bit > register values from ILP32 but it got pretty complicated. The entry code > would need to know which registers need zeroing of the top 32-bit If kernel specifies 64-bit wide registers for syscalls, then it's the caller's (libc's) responsibility to properly sign-extend arguments when needed, and glibc, for example, already has proper type definitions that aimed to handle this. > and the generic unistd.h wrapper hacks were not very nice. They are already implemented in glibc during x32 introduction period. > Some past discussions: > > https://www.mail-archive.com/linux-kernel@vger.kernel.org/msg1211716.html > > -- > Catalin From mboxrd@z Thu Jan 1 00:00:00 1970 From: Eugene Syromiatnikov Subject: Re: [PATCH v9 00/24] ILP32 for ARM64 Date: Sat, 13 Oct 2018 04:14:16 +0200 Message-ID: <20181013021416.GE21972@asgard.redhat.com> References: <20180516081910.10067-1-ynorov@caviumnetworks.com> <20180724173957.GA22106@yury-thinkpad> <20181010141017.GA2881@asgard.redhat.com> <20181010153655.GA212880@arrakis.emea.arm.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Content-Disposition: inline In-Reply-To: <20181010153655.GA212880@arrakis.emea.arm.com> Sender: linux-kernel-owner@vger.kernel.org To: Catalin Marinas Cc: Yury Norov , Arnd Bergmann , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, linux-arch@vger.kernel.org, linux-api@vger.kernel.org, Adam Borowski , Alexander Graf , Alexey Klimov , Andreas Schwab , Andrew Pinski , Bamvor Zhangjian , Chris Metcalf , Christoph Muellner , Dave Martin , "David S . Miller" , Florian Weimer , Geert Uytterhoeven , Heiko Carstens , James Hogan List-Id: linux-api@vger.kernel.org On Wed, Oct 10, 2018 at 04:36:56PM +0100, Catalin Marinas wrote: > On Wed, Oct 10, 2018 at 04:10:21PM +0200, Eugene Syromiatnikov wrote: > > I have some questions regarding AArch64 ILP32 implementation for which I > > failed to find an answer myself: > > * How ptrace() tracer is supposed to distinguish between ILP32 and LP64 > > tracees? For MIPS N32 and x32 this is possible based on syscall > > number, but for AArch64 ILP32 I do not see such a sign. There's also > > ARM_ip is employed for signalling entering/exiting, I wonder whether > > it's possible to employ it also for signalling tracee's personality. > > With the current implementation, I don't think you can distinguish. From > the kernel perspective, the register set is the same. What is the > use-case for this? Err, a ptrace()-based tracer trying to trace a process, for example? > We could add a new regset to expose the ILP32 state (NT_ARM_..., I can't > think of a name now but probably not PER* as this implies PER_LINUX_... > which is independent from TIF_32BIT_*). So that would require an additional ptrace() call on each syscall stop, is that correct? > > * What's the reasoning behind capping syscall arguments to 32 bit? x32 > > and MIPS N32 do not have such a restriction (and do not need special > > wrappers for syscalls that pass 64-bit values as a result, except > > when they do, as it is the case for preadv2 on x32); moreover, that > > would lead to insurmountable difficulties for AArch64 ILP32 tracers > > that try to trace LP64 tracees, as it would be impossible to pass > > 64-bit addresses to process_vm_{read,write} or ptrace PEEK/POKE. > > We've attempted in earlier versions to allow a mix of 32 and 64-bit > register values from ILP32 but it got pretty complicated. The entry code > would need to know which registers need zeroing of the top 32-bit If kernel specifies 64-bit wide registers for syscalls, then it's the caller's (libc's) responsibility to properly sign-extend arguments when needed, and glibc, for example, already has proper type definitions that aimed to handle this. > and the generic unistd.h wrapper hacks were not very nice. They are already implemented in glibc during x32 introduction period. > Some past discussions: > > https://www.mail-archive.com/linux-kernel@vger.kernel.org/msg1211716.html > > -- > Catalin From mboxrd@z Thu Jan 1 00:00:00 1970 From: esyr@redhat.com (Eugene Syromiatnikov) Date: Sat, 13 Oct 2018 04:14:16 +0200 Subject: [PATCH v9 00/24] ILP32 for ARM64 In-Reply-To: <20181010153655.GA212880@arrakis.emea.arm.com> References: <20180516081910.10067-1-ynorov@caviumnetworks.com> <20180724173957.GA22106@yury-thinkpad> <20181010141017.GA2881@asgard.redhat.com> <20181010153655.GA212880@arrakis.emea.arm.com> Message-ID: <20181013021416.GE21972@asgard.redhat.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Wed, Oct 10, 2018 at 04:36:56PM +0100, Catalin Marinas wrote: > On Wed, Oct 10, 2018 at 04:10:21PM +0200, Eugene Syromiatnikov wrote: > > I have some questions regarding AArch64 ILP32 implementation for which I > > failed to find an answer myself: > > * How ptrace() tracer is supposed to distinguish between ILP32 and LP64 > > tracees? For MIPS N32 and x32 this is possible based on syscall > > number, but for AArch64 ILP32 I do not see such a sign. There's also > > ARM_ip is employed for signalling entering/exiting, I wonder whether > > it's possible to employ it also for signalling tracee's personality. > > With the current implementation, I don't think you can distinguish. From > the kernel perspective, the register set is the same. What is the > use-case for this? Err, a ptrace()-based tracer trying to trace a process, for example? > We could add a new regset to expose the ILP32 state (NT_ARM_..., I can't > think of a name now but probably not PER* as this implies PER_LINUX_... > which is independent from TIF_32BIT_*). So that would require an additional ptrace() call on each syscall stop, is that correct? > > * What's the reasoning behind capping syscall arguments to 32 bit? x32 > > and MIPS N32 do not have such a restriction (and do not need special > > wrappers for syscalls that pass 64-bit values as a result, except > > when they do, as it is the case for preadv2 on x32); moreover, that > > would lead to insurmountable difficulties for AArch64 ILP32 tracers > > that try to trace LP64 tracees, as it would be impossible to pass > > 64-bit addresses to process_vm_{read,write} or ptrace PEEK/POKE. > > We've attempted in earlier versions to allow a mix of 32 and 64-bit > register values from ILP32 but it got pretty complicated. The entry code > would need to know which registers need zeroing of the top 32-bit If kernel specifies 64-bit wide registers for syscalls, then it's the caller's (libc's) responsibility to properly sign-extend arguments when needed, and glibc, for example, already has proper type definitions that aimed to handle this. > and the generic unistd.h wrapper hacks were not very nice. They are already implemented in glibc during x32 introduction period. > Some past discussions: > > https://www.mail-archive.com/linux-kernel at vger.kernel.org/msg1211716.html > > -- > Catalin