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* [PATCH] x86: enable swiotlb for > 4GiG ram on 32-bit kernels
@ 2018-10-14  7:52 ` Christoph Hellwig
  0 siblings, 0 replies; 24+ messages in thread
From: Christoph Hellwig @ 2018-10-14  7:52 UTC (permalink / raw)
  To: x86; +Cc: tedheadster, konrad.wilk, iommu, linux-kernel

We already build the swiotlb code for 32b-t kernels with PAE support,
but the code to actually use swiotlb has only been enabled for 64-bit
kernel for an unknown reason.

Before Linux 4.18 we papers over this fact because the networking code,
the scsi layer and some random block drivers implenented their own
bounce buffering scheme.

Fixes: 21e07dba ("scsi: reduce use of block bounce buffers")
Fixes: ab74cfeb ("net: remove the PCI_DMA_BUS_IS_PHYS check in illegal_highdma")
Reported-by: tedheadster <tedheadster@gmail.com>
Tested-by: tedheadster <tedheadster@gmail.com>
---
 arch/x86/kernel/pci-swiotlb.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/arch/x86/kernel/pci-swiotlb.c b/arch/x86/kernel/pci-swiotlb.c
index 661583662430..71c0b01d93b1 100644
--- a/arch/x86/kernel/pci-swiotlb.c
+++ b/arch/x86/kernel/pci-swiotlb.c
@@ -42,10 +42,8 @@ IOMMU_INIT_FINISH(pci_swiotlb_detect_override,
 int __init pci_swiotlb_detect_4gb(void)
 {
 	/* don't initialize swiotlb if iommu=off (no_iommu=1) */
-#ifdef CONFIG_X86_64
 	if (!no_iommu && max_possible_pfn > MAX_DMA32_PFN)
 		swiotlb = 1;
-#endif
 
 	/*
 	 * If SME is active then swiotlb will be set to 1 so that bounce
-- 
2.19.1


^ permalink raw reply	[flat|nested] 24+ messages in thread

* [PATCH] x86: enable swiotlb for > 4GiG ram on 32-bit kernels
@ 2018-10-14  7:52 ` Christoph Hellwig
  0 siblings, 0 replies; 24+ messages in thread
From: Christoph Hellwig @ 2018-10-14  7:52 UTC (permalink / raw)
  To: x86-DgEjT+Ai2ygdnm+yROfE0A
  Cc: iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA,
	konrad.wilk-QHcLZuEGTsvQT0dZR+AlfA,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA,
	tedheadster-Re5JQEeQqe8AvxtiuMwx3w

We already build the swiotlb code for 32b-t kernels with PAE support,
but the code to actually use swiotlb has only been enabled for 64-bit
kernel for an unknown reason.

Before Linux 4.18 we papers over this fact because the networking code,
the scsi layer and some random block drivers implenented their own
bounce buffering scheme.

Fixes: 21e07dba ("scsi: reduce use of block bounce buffers")
Fixes: ab74cfeb ("net: remove the PCI_DMA_BUS_IS_PHYS check in illegal_highdma")
Reported-by: tedheadster <tedheadster-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Tested-by: tedheadster <tedheadster-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
---
 arch/x86/kernel/pci-swiotlb.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/arch/x86/kernel/pci-swiotlb.c b/arch/x86/kernel/pci-swiotlb.c
index 661583662430..71c0b01d93b1 100644
--- a/arch/x86/kernel/pci-swiotlb.c
+++ b/arch/x86/kernel/pci-swiotlb.c
@@ -42,10 +42,8 @@ IOMMU_INIT_FINISH(pci_swiotlb_detect_override,
 int __init pci_swiotlb_detect_4gb(void)
 {
 	/* don't initialize swiotlb if iommu=off (no_iommu=1) */
-#ifdef CONFIG_X86_64
 	if (!no_iommu && max_possible_pfn > MAX_DMA32_PFN)
 		swiotlb = 1;
-#endif
 
 	/*
 	 * If SME is active then swiotlb will be set to 1 so that bounce
-- 
2.19.1

^ permalink raw reply	[flat|nested] 24+ messages in thread

* Re: [PATCH] x86: enable swiotlb for > 4GiG ram on 32-bit kernels
       [not found] ` <20181014075208.2715-1-hch-jcswGhMUV9g@public.gmane.org>
@ 2018-10-14  8:13   ` Thomas Gleixner
  0 siblings, 0 replies; 24+ messages in thread
From: Thomas Gleixner @ 2018-10-14  8:13 UTC (permalink / raw)
  To: Christoph Hellwig; +Cc: x86, tedheadster, konrad.wilk, iommu, linux-kernel

On Sun, 14 Oct 2018, Christoph Hellwig wrote:

> We already build the swiotlb code for 32b-t kernels with PAE support,
> but the code to actually use swiotlb has only been enabled for 64-bit
> kernel for an unknown reason.
> 
> Before Linux 4.18 we papers over this fact because the networking code,
> the scsi layer and some random block drivers implenented their own
> bounce buffering scheme.
> 
> Fixes: 21e07dba ("scsi: reduce use of block bounce buffers")
> Fixes: ab74cfeb ("net: remove the PCI_DMA_BUS_IS_PHYS check in illegal_highdma")
> Reported-by: tedheadster <tedheadster@gmail.com>
> Tested-by: tedheadster <tedheadster@gmail.com>

I'll add your SOB when picking this up :)

> ---
>  arch/x86/kernel/pci-swiotlb.c | 2 --
>  1 file changed, 2 deletions(-)
> 
> diff --git a/arch/x86/kernel/pci-swiotlb.c b/arch/x86/kernel/pci-swiotlb.c
> index 661583662430..71c0b01d93b1 100644
> --- a/arch/x86/kernel/pci-swiotlb.c
> +++ b/arch/x86/kernel/pci-swiotlb.c
> @@ -42,10 +42,8 @@ IOMMU_INIT_FINISH(pci_swiotlb_detect_override,
>  int __init pci_swiotlb_detect_4gb(void)
>  {
>  	/* don't initialize swiotlb if iommu=off (no_iommu=1) */
> -#ifdef CONFIG_X86_64
>  	if (!no_iommu && max_possible_pfn > MAX_DMA32_PFN)
>  		swiotlb = 1;
> -#endif
>  
>  	/*
>  	 * If SME is active then swiotlb will be set to 1 so that bounce
> -- 
> 2.19.1
> 
> 

^ permalink raw reply	[flat|nested] 24+ messages in thread

* Re: [PATCH] x86: enable swiotlb for > 4GiG ram on 32-bit kernels
@ 2018-10-14  8:13   ` Thomas Gleixner
  0 siblings, 0 replies; 24+ messages in thread
From: Thomas Gleixner @ 2018-10-14  8:13 UTC (permalink / raw)
  To: Christoph Hellwig
  Cc: iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA,
	x86-DgEjT+Ai2ygdnm+yROfE0A, linux-kernel-u79uwXL29TY76Z2rM5mHXA,
	konrad.wilk-QHcLZuEGTsvQT0dZR+AlfA,
	tedheadster-Re5JQEeQqe8AvxtiuMwx3w

On Sun, 14 Oct 2018, Christoph Hellwig wrote:

> We already build the swiotlb code for 32b-t kernels with PAE support,
> but the code to actually use swiotlb has only been enabled for 64-bit
> kernel for an unknown reason.
> 
> Before Linux 4.18 we papers over this fact because the networking code,
> the scsi layer and some random block drivers implenented their own
> bounce buffering scheme.
> 
> Fixes: 21e07dba ("scsi: reduce use of block bounce buffers")
> Fixes: ab74cfeb ("net: remove the PCI_DMA_BUS_IS_PHYS check in illegal_highdma")
> Reported-by: tedheadster <tedheadster-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> Tested-by: tedheadster <tedheadster-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>

I'll add your SOB when picking this up :)

> ---
>  arch/x86/kernel/pci-swiotlb.c | 2 --
>  1 file changed, 2 deletions(-)
> 
> diff --git a/arch/x86/kernel/pci-swiotlb.c b/arch/x86/kernel/pci-swiotlb.c
> index 661583662430..71c0b01d93b1 100644
> --- a/arch/x86/kernel/pci-swiotlb.c
> +++ b/arch/x86/kernel/pci-swiotlb.c
> @@ -42,10 +42,8 @@ IOMMU_INIT_FINISH(pci_swiotlb_detect_override,
>  int __init pci_swiotlb_detect_4gb(void)
>  {
>  	/* don't initialize swiotlb if iommu=off (no_iommu=1) */
> -#ifdef CONFIG_X86_64
>  	if (!no_iommu && max_possible_pfn > MAX_DMA32_PFN)
>  		swiotlb = 1;
> -#endif
>  
>  	/*
>  	 * If SME is active then swiotlb will be set to 1 so that bounce
> -- 
> 2.19.1
> 
> 

^ permalink raw reply	[flat|nested] 24+ messages in thread

* Re: [PATCH] x86: enable swiotlb for > 4GiG ram on 32-bit kernels
@ 2018-10-14  8:14     ` Christoph Hellwig
  0 siblings, 0 replies; 24+ messages in thread
From: Christoph Hellwig @ 2018-10-14  8:14 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: Christoph Hellwig, x86, tedheadster, konrad.wilk, iommu, linux-kernel

On Sun, Oct 14, 2018 at 10:13:31AM +0200, Thomas Gleixner wrote:
> On Sun, 14 Oct 2018, Christoph Hellwig wrote:
> 
> > We already build the swiotlb code for 32b-t kernels with PAE support,
> > but the code to actually use swiotlb has only been enabled for 64-bit
> > kernel for an unknown reason.
> > 
> > Before Linux 4.18 we papers over this fact because the networking code,
> > the scsi layer and some random block drivers implenented their own
> > bounce buffering scheme.
> > 
> > Fixes: 21e07dba ("scsi: reduce use of block bounce buffers")
> > Fixes: ab74cfeb ("net: remove the PCI_DMA_BUS_IS_PHYS check in illegal_highdma")
> > Reported-by: tedheadster <tedheadster@gmail.com>
> > Tested-by: tedheadster <tedheadster@gmail.com>
> 
> I'll add your SOB when picking this up :)

Thanks.  Here it is in writing:

Signed-off-by: Christoph Hellwig <hch@lst.de>

^ permalink raw reply	[flat|nested] 24+ messages in thread

* Re: [PATCH] x86: enable swiotlb for > 4GiG ram on 32-bit kernels
@ 2018-10-14  8:14     ` Christoph Hellwig
  0 siblings, 0 replies; 24+ messages in thread
From: Christoph Hellwig @ 2018-10-14  8:14 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: konrad.wilk-QHcLZuEGTsvQT0dZR+AlfA, x86-DgEjT+Ai2ygdnm+yROfE0A,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA,
	tedheadster-Re5JQEeQqe8AvxtiuMwx3w,
	iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA,
	Christoph Hellwig

On Sun, Oct 14, 2018 at 10:13:31AM +0200, Thomas Gleixner wrote:
> On Sun, 14 Oct 2018, Christoph Hellwig wrote:
> 
> > We already build the swiotlb code for 32b-t kernels with PAE support,
> > but the code to actually use swiotlb has only been enabled for 64-bit
> > kernel for an unknown reason.
> > 
> > Before Linux 4.18 we papers over this fact because the networking code,
> > the scsi layer and some random block drivers implenented their own
> > bounce buffering scheme.
> > 
> > Fixes: 21e07dba ("scsi: reduce use of block bounce buffers")
> > Fixes: ab74cfeb ("net: remove the PCI_DMA_BUS_IS_PHYS check in illegal_highdma")
> > Reported-by: tedheadster <tedheadster-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> > Tested-by: tedheadster <tedheadster-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> 
> I'll add your SOB when picking this up :)

Thanks.  Here it is in writing:

Signed-off-by: Christoph Hellwig <hch-jcswGhMUV9g@public.gmane.org>

^ permalink raw reply	[flat|nested] 24+ messages in thread

* Re: [PATCH] x86: enable swiotlb for > 4GiG ram on 32-bit kernels
@ 2018-10-14  8:57       ` Thomas Gleixner
  0 siblings, 0 replies; 24+ messages in thread
From: Thomas Gleixner @ 2018-10-14  8:57 UTC (permalink / raw)
  To: Christoph Hellwig; +Cc: x86, tedheadster, konrad.wilk, iommu, linux-kernel

On Sun, 14 Oct 2018, Christoph Hellwig wrote:

> On Sun, Oct 14, 2018 at 10:13:31AM +0200, Thomas Gleixner wrote:
> > On Sun, 14 Oct 2018, Christoph Hellwig wrote:
> > 
> > > We already build the swiotlb code for 32b-t kernels with PAE support,
> > > but the code to actually use swiotlb has only been enabled for 64-bit
> > > kernel for an unknown reason.
> > > 
> > > Before Linux 4.18 we papers over this fact because the networking code,
> > > the scsi layer and some random block drivers implenented their own
> > > bounce buffering scheme.
> > > 
> > > Fixes: 21e07dba ("scsi: reduce use of block bounce buffers")

Please use the first 12 characters of the commit SHA for fixes tags in the
future, as documented. No need to resend, I fixed it up for you and added a
Cc: stable as well

Thanks,

	tglx

^ permalink raw reply	[flat|nested] 24+ messages in thread

* Re: [PATCH] x86: enable swiotlb for > 4GiG ram on 32-bit kernels
@ 2018-10-14  8:57       ` Thomas Gleixner
  0 siblings, 0 replies; 24+ messages in thread
From: Thomas Gleixner @ 2018-10-14  8:57 UTC (permalink / raw)
  To: Christoph Hellwig
  Cc: iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA,
	x86-DgEjT+Ai2ygdnm+yROfE0A, linux-kernel-u79uwXL29TY76Z2rM5mHXA,
	konrad.wilk-QHcLZuEGTsvQT0dZR+AlfA,
	tedheadster-Re5JQEeQqe8AvxtiuMwx3w

On Sun, 14 Oct 2018, Christoph Hellwig wrote:

> On Sun, Oct 14, 2018 at 10:13:31AM +0200, Thomas Gleixner wrote:
> > On Sun, 14 Oct 2018, Christoph Hellwig wrote:
> > 
> > > We already build the swiotlb code for 32b-t kernels with PAE support,
> > > but the code to actually use swiotlb has only been enabled for 64-bit
> > > kernel for an unknown reason.
> > > 
> > > Before Linux 4.18 we papers over this fact because the networking code,
> > > the scsi layer and some random block drivers implenented their own
> > > bounce buffering scheme.
> > > 
> > > Fixes: 21e07dba ("scsi: reduce use of block bounce buffers")

Please use the first 12 characters of the commit SHA for fixes tags in the
future, as documented. No need to resend, I fixed it up for you and added a
Cc: stable as well

Thanks,

	tglx

^ permalink raw reply	[flat|nested] 24+ messages in thread

* Re: [PATCH] x86: enable swiotlb for > 4GiG ram on 32-bit kernels
@ 2018-10-14  9:04         ` Ingo Molnar
  0 siblings, 0 replies; 24+ messages in thread
From: Ingo Molnar @ 2018-10-14  9:04 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: Christoph Hellwig, x86, tedheadster, konrad.wilk, iommu, linux-kernel


* Thomas Gleixner <tglx@linutronix.de> wrote:

> On Sun, 14 Oct 2018, Christoph Hellwig wrote:
> 
> > On Sun, Oct 14, 2018 at 10:13:31AM +0200, Thomas Gleixner wrote:
> > > On Sun, 14 Oct 2018, Christoph Hellwig wrote:
> > > 
> > > > We already build the swiotlb code for 32b-t kernels with PAE support,
> > > > but the code to actually use swiotlb has only been enabled for 64-bit
> > > > kernel for an unknown reason.
> > > > 
> > > > Before Linux 4.18 we papers over this fact because the networking code,
> > > > the scsi layer and some random block drivers implenented their own
> > > > bounce buffering scheme.
> > > > 
> > > > Fixes: 21e07dba ("scsi: reduce use of block bounce buffers")
> 
> Please use the first 12 characters of the commit SHA for fixes tags in the
> future, as documented. No need to resend, I fixed it up for you and added a
> Cc: stable as well

For those who have their ~/.gitconfig's from ancient Git history, this can be done via:

	git config --global core.abbrev 12

Thanks,

	Ingo

^ permalink raw reply	[flat|nested] 24+ messages in thread

* Re: [PATCH] x86: enable swiotlb for > 4GiG ram on 32-bit kernels
@ 2018-10-14  9:04         ` Ingo Molnar
  0 siblings, 0 replies; 24+ messages in thread
From: Ingo Molnar @ 2018-10-14  9:04 UTC (permalink / raw)
  To: Thomas Gleixner
  Cc: konrad.wilk-QHcLZuEGTsvQT0dZR+AlfA, x86-DgEjT+Ai2ygdnm+yROfE0A,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA,
	tedheadster-Re5JQEeQqe8AvxtiuMwx3w,
	iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA,
	Christoph Hellwig


* Thomas Gleixner <tglx-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org> wrote:

> On Sun, 14 Oct 2018, Christoph Hellwig wrote:
> 
> > On Sun, Oct 14, 2018 at 10:13:31AM +0200, Thomas Gleixner wrote:
> > > On Sun, 14 Oct 2018, Christoph Hellwig wrote:
> > > 
> > > > We already build the swiotlb code for 32b-t kernels with PAE support,
> > > > but the code to actually use swiotlb has only been enabled for 64-bit
> > > > kernel for an unknown reason.
> > > > 
> > > > Before Linux 4.18 we papers over this fact because the networking code,
> > > > the scsi layer and some random block drivers implenented their own
> > > > bounce buffering scheme.
> > > > 
> > > > Fixes: 21e07dba ("scsi: reduce use of block bounce buffers")
> 
> Please use the first 12 characters of the commit SHA for fixes tags in the
> future, as documented. No need to resend, I fixed it up for you and added a
> Cc: stable as well

For those who have their ~/.gitconfig's from ancient Git history, this can be done via:

	git config --global core.abbrev 12

Thanks,

	Ingo

^ permalink raw reply	[flat|nested] 24+ messages in thread

* [tip:x86/urgent] x86/swiotlb: Enable swiotlb for > 4GiG ram on 32-bit kernels
  2018-10-14  7:52 ` Christoph Hellwig
  (?)
  (?)
@ 2018-10-14  9:18 ` tip-bot for Christoph Hellwig
  -1 siblings, 0 replies; 24+ messages in thread
From: tip-bot for Christoph Hellwig @ 2018-10-14  9:18 UTC (permalink / raw)
  To: linux-tip-commits; +Cc: tedheadster, mingo, hpa, hch, linux-kernel, tglx

Commit-ID:  ab555321e4ddc7f6f17f6c80dfaad228883a8e7c
Gitweb:     https://git.kernel.org/tip/ab555321e4ddc7f6f17f6c80dfaad228883a8e7c
Author:     Christoph Hellwig <hch@lst.de>
AuthorDate: Sun, 14 Oct 2018 09:52:08 +0200
Committer:  Thomas Gleixner <tglx@linutronix.de>
CommitDate: Sun, 14 Oct 2018 11:11:23 +0200

x86/swiotlb: Enable swiotlb for > 4GiG ram on 32-bit kernels

We already build the swiotlb code for 32b-t kernels with PAE support,
but the code to actually use swiotlb has only been enabled for 64-bit
kernel for an unknown reason.

Before Linux 4.18 we paper over this fact because the networking code,
the scsi layer and some random block drivers implemented their own
bounce buffering scheme.

Fixes: 21e07dba9fb1 ("scsi: reduce use of block bounce buffers")
Fixes: ab74cfebafa3 ("net: remove the PCI_DMA_BUS_IS_PHYS check in illegal_highdma")
Reported-by: tedheadster <tedheadster@gmail.com>
Tested-by: tedheadster <tedheadster@gmail.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
Cc: konrad.wilk@oracle.com
Cc: iommu@lists.linux-foundation.org
Cc: stable@vger.kernel.org
Link: https://lkml.kernel.org/r/20181014075208.2715-1-hch@lst.de

---
 arch/x86/kernel/pci-swiotlb.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/arch/x86/kernel/pci-swiotlb.c b/arch/x86/kernel/pci-swiotlb.c
index 661583662430..71c0b01d93b1 100644
--- a/arch/x86/kernel/pci-swiotlb.c
+++ b/arch/x86/kernel/pci-swiotlb.c
@@ -42,10 +42,8 @@ IOMMU_INIT_FINISH(pci_swiotlb_detect_override,
 int __init pci_swiotlb_detect_4gb(void)
 {
 	/* don't initialize swiotlb if iommu=off (no_iommu=1) */
-#ifdef CONFIG_X86_64
 	if (!no_iommu && max_possible_pfn > MAX_DMA32_PFN)
 		swiotlb = 1;
-#endif
 
 	/*
 	 * If SME is active then swiotlb will be set to 1 so that bounce

^ permalink raw reply	[flat|nested] 24+ messages in thread

* Re: [PATCH] x86: enable swiotlb for > 4GiG ram on 32-bit kernels
  2018-10-14  9:04         ` Ingo Molnar
  (?)
@ 2018-10-14 12:49         ` tedheadster
  -1 siblings, 0 replies; 24+ messages in thread
From: tedheadster @ 2018-10-14 12:49 UTC (permalink / raw)
  To: mingo
  Cc: Thomas Gleixner, Christoph Hellwig, x86, konrad.wilk, iommu,
	Linux Kernel Mailing List

Please change:

Reported-by: tedheadster <tedheadster@gmail.com>
Tested-by: tedheadster <tedheadster@gmail.com>

to

Reported-by: Matthew Whitehead <tedheadster@gmail.com>
Tested-by: Matthew Whitehead <tedheadster@gmail.com>

- Matthew

^ permalink raw reply	[flat|nested] 24+ messages in thread

* [tip:x86/urgent] x86/swiotlb: Enable swiotlb for > 4GiG ram on 32-bit kernels
  2018-10-14  7:52 ` Christoph Hellwig
                   ` (2 preceding siblings ...)
  (?)
@ 2018-10-15  9:09 ` tip-bot for Christoph Hellwig
  -1 siblings, 0 replies; 24+ messages in thread
From: tip-bot for Christoph Hellwig @ 2018-10-15  9:09 UTC (permalink / raw)
  To: linux-tip-commits; +Cc: linux-kernel, hch, mingo, tglx, tedheadster, hpa

Commit-ID:  6f3bc8028570e4c326030e8795dbcd57c561b723
Gitweb:     https://git.kernel.org/tip/6f3bc8028570e4c326030e8795dbcd57c561b723
Author:     Christoph Hellwig <hch@lst.de>
AuthorDate: Sun, 14 Oct 2018 09:52:08 +0200
Committer:  Thomas Gleixner <tglx@linutronix.de>
CommitDate: Mon, 15 Oct 2018 10:55:03 +0200

x86/swiotlb: Enable swiotlb for > 4GiG ram on 32-bit kernels

We already build the swiotlb code for 32b-t kernels with PAE support,
but the code to actually use swiotlb has only been enabled for 64-bit
kernel for an unknown reason.

Before Linux 4.18 we paper over this fact because the networking code,
the scsi layer and some random block drivers implemented their own
bounce buffering scheme.

Fixes: 21e07dba9fb1 ("scsi: reduce use of block bounce buffers")
Fixes: ab74cfebafa3 ("net: remove the PCI_DMA_BUS_IS_PHYS check in illegal_highdma")
Reported-by: Matthew Whitehead <tedheadster@gmail.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Matthew Whitehead <tedheadster@gmail.com>
Cc: konrad.wilk@oracle.com
Cc: iommu@lists.linux-foundation.org
Cc: stable@vger.kernel.org
Link: https://lkml.kernel.org/r/20181014075208.2715-1-hch@lst.de
---
 arch/x86/kernel/pci-swiotlb.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/arch/x86/kernel/pci-swiotlb.c b/arch/x86/kernel/pci-swiotlb.c
index 661583662430..71c0b01d93b1 100644
--- a/arch/x86/kernel/pci-swiotlb.c
+++ b/arch/x86/kernel/pci-swiotlb.c
@@ -42,10 +42,8 @@ IOMMU_INIT_FINISH(pci_swiotlb_detect_override,
 int __init pci_swiotlb_detect_4gb(void)
 {
 	/* don't initialize swiotlb if iommu=off (no_iommu=1) */
-#ifdef CONFIG_X86_64
 	if (!no_iommu && max_possible_pfn > MAX_DMA32_PFN)
 		swiotlb = 1;
-#endif
 
 	/*
 	 * If SME is active then swiotlb will be set to 1 so that bounce

^ permalink raw reply	[flat|nested] 24+ messages in thread

* Re: [PATCH] x86: enable swiotlb for > 4GiG ram on 32-bit kernels
       [not found] ` <20181014075208.2715-1-hch-jcswGhMUV9g@public.gmane.org>
@ 2018-10-15 18:52   ` Konrad Rzeszutek Wilk
  0 siblings, 0 replies; 24+ messages in thread
From: Konrad Rzeszutek Wilk @ 2018-10-15 18:52 UTC (permalink / raw)
  To: Christoph Hellwig, x86; +Cc: tedheadster, iommu, linux-kernel

On 10/14/18 3:52 AM, Christoph Hellwig wrote:
> We already build the swiotlb code for 32b-t kernels with PAE support,
> but the code to actually use swiotlb has only been enabled for 64-bit
> kernel for an unknown reason.
> 
> Before Linux 4.18 we papers over this fact because the networking code,
> the scsi layer and some random block drivers implenented their own
> bounce buffering scheme.
> 
> Fixes: 21e07dba ("scsi: reduce use of block bounce buffers")
> Fixes: ab74cfeb ("net: remove the PCI_DMA_BUS_IS_PHYS check in illegal_highdma")
> Reported-by: tedheadster <tedheadster@gmail.com>
> Tested-by: tedheadster <tedheadster@gmail.com>

Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>

But since it is already in 'tip' feel free to ignore my tag.

Thanks!
> ---
>   arch/x86/kernel/pci-swiotlb.c | 2 --
>   1 file changed, 2 deletions(-)
> 
> diff --git a/arch/x86/kernel/pci-swiotlb.c b/arch/x86/kernel/pci-swiotlb.c
> index 661583662430..71c0b01d93b1 100644
> --- a/arch/x86/kernel/pci-swiotlb.c
> +++ b/arch/x86/kernel/pci-swiotlb.c
> @@ -42,10 +42,8 @@ IOMMU_INIT_FINISH(pci_swiotlb_detect_override,
>   int __init pci_swiotlb_detect_4gb(void)
>   {
>   	/* don't initialize swiotlb if iommu=off (no_iommu=1) */
> -#ifdef CONFIG_X86_64
>   	if (!no_iommu && max_possible_pfn > MAX_DMA32_PFN)
>   		swiotlb = 1;
> -#endif
>   
>   	/*
>   	 * If SME is active then swiotlb will be set to 1 so that bounce
> 


^ permalink raw reply	[flat|nested] 24+ messages in thread

* Re: [PATCH] x86: enable swiotlb for > 4GiG ram on 32-bit kernels
@ 2018-10-15 18:52   ` Konrad Rzeszutek Wilk
  0 siblings, 0 replies; 24+ messages in thread
From: Konrad Rzeszutek Wilk @ 2018-10-15 18:52 UTC (permalink / raw)
  To: Christoph Hellwig, x86-DgEjT+Ai2ygdnm+yROfE0A
  Cc: iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA,
	tedheadster-Re5JQEeQqe8AvxtiuMwx3w

On 10/14/18 3:52 AM, Christoph Hellwig wrote:
> We already build the swiotlb code for 32b-t kernels with PAE support,
> but the code to actually use swiotlb has only been enabled for 64-bit
> kernel for an unknown reason.
> 
> Before Linux 4.18 we papers over this fact because the networking code,
> the scsi layer and some random block drivers implenented their own
> bounce buffering scheme.
> 
> Fixes: 21e07dba ("scsi: reduce use of block bounce buffers")
> Fixes: ab74cfeb ("net: remove the PCI_DMA_BUS_IS_PHYS check in illegal_highdma")
> Reported-by: tedheadster <tedheadster-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> Tested-by: tedheadster <tedheadster-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>

Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk-QHcLZuEGTsvQT0dZR+AlfA@public.gmane.org>

But since it is already in 'tip' feel free to ignore my tag.

Thanks!
> ---
>   arch/x86/kernel/pci-swiotlb.c | 2 --
>   1 file changed, 2 deletions(-)
> 
> diff --git a/arch/x86/kernel/pci-swiotlb.c b/arch/x86/kernel/pci-swiotlb.c
> index 661583662430..71c0b01d93b1 100644
> --- a/arch/x86/kernel/pci-swiotlb.c
> +++ b/arch/x86/kernel/pci-swiotlb.c
> @@ -42,10 +42,8 @@ IOMMU_INIT_FINISH(pci_swiotlb_detect_override,
>   int __init pci_swiotlb_detect_4gb(void)
>   {
>   	/* don't initialize swiotlb if iommu=off (no_iommu=1) */
> -#ifdef CONFIG_X86_64
>   	if (!no_iommu && max_possible_pfn > MAX_DMA32_PFN)
>   		swiotlb = 1;
> -#endif
>   
>   	/*
>   	 * If SME is active then swiotlb will be set to 1 so that bounce
> 

^ permalink raw reply	[flat|nested] 24+ messages in thread

* Re: [PATCH] x86: enable swiotlb for > 4GiG ram on 32-bit kernels
       [not found] ` <20181014075208.2715-1-hch-jcswGhMUV9g@public.gmane.org>
@ 2018-10-16 13:11   ` tedheadster
       [not found]     ` <CAP8WD_Zj5aMcTCVtV-hot3zLNfNuMzHyeogm0Lqb=+XZ1LdkKw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
  0 siblings, 1 reply; 24+ messages in thread
From: tedheadster @ 2018-10-16 13:11 UTC (permalink / raw)
  To: Christoph Hellwig
  Cc: iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA,
	x86-DgEjT+Ai2ygdnm+yROfE0A, konrad.wilk-QHcLZuEGTsvQT0dZR+AlfA

On Sun, Oct 14, 2018 at 3:52 AM Christoph Hellwig <hch-jcswGhMUV9g@public.gmane.org> wrote:
>
> We already build the swiotlb code for 32b-t kernels with PAE support,
> but the code to actually use swiotlb has only been enabled for 64-bit
> kernel for an unknown reason.
>
> Before Linux 4.18 we papers over this fact because the networking code,
> the scsi layer and some random block drivers implenented their own
> bounce buffering scheme.
>
> Fixes: 21e07dba ("scsi: reduce use of block bounce buffers")
> Fixes: ab74cfeb ("net: remove the PCI_DMA_BUS_IS_PHYS check in illegal_highdma")
> Reported-by: tedheadster <tedheadster-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> Tested-by: tedheadster <tedheadster-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> ---
>

Christoph,
  this fix has causes performance to decrease dramatically. Kernel
builds that used to take 10-15 minutes are now taking 45-60 minutes on
the same machine.

- Matthew Whitehead

^ permalink raw reply	[flat|nested] 24+ messages in thread

* Re: [PATCH] x86: enable swiotlb for > 4GiG ram on 32-bit kernels
       [not found]     ` <CAP8WD_Zj5aMcTCVtV-hot3zLNfNuMzHyeogm0Lqb=+XZ1LdkKw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
@ 2018-10-17 10:16       ` Thomas Gleixner
  2018-10-17 16:33       ` Christoph Hellwig
  2018-10-18  6:12       ` Ingo Molnar
  2 siblings, 0 replies; 24+ messages in thread
From: Thomas Gleixner @ 2018-10-17 10:16 UTC (permalink / raw)
  To: whiteheadm-HInyCGIudOg
  Cc: iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA,
	x86-DgEjT+Ai2ygdnm+yROfE0A, Christoph Hellwig,
	konrad.wilk-QHcLZuEGTsvQT0dZR+AlfA

On Tue, 16 Oct 2018, tedheadster wrote:
> On Sun, Oct 14, 2018 at 3:52 AM Christoph Hellwig <hch-jcswGhMUV9g@public.gmane.org> wrote:
> >
> > We already build the swiotlb code for 32b-t kernels with PAE support,
> > but the code to actually use swiotlb has only been enabled for 64-bit
> > kernel for an unknown reason.
> >
> > Before Linux 4.18 we papers over this fact because the networking code,
> > the scsi layer and some random block drivers implenented their own
> > bounce buffering scheme.
> >
> > Fixes: 21e07dba ("scsi: reduce use of block bounce buffers")
> > Fixes: ab74cfeb ("net: remove the PCI_DMA_BUS_IS_PHYS check in illegal_highdma")
> > Reported-by: tedheadster <tedheadster-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> > Tested-by: tedheadster <tedheadster-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> > ---
> >
> 
> Christoph,
>   this fix has causes performance to decrease dramatically. Kernel
> builds that used to take 10-15 minutes are now taking 45-60 minutes on
> the same machine.

Christoph, can you have a look please?

Thanks,

	tglx

^ permalink raw reply	[flat|nested] 24+ messages in thread

* Re: [PATCH] x86: enable swiotlb for > 4GiG ram on 32-bit kernels
       [not found]     ` <CAP8WD_Zj5aMcTCVtV-hot3zLNfNuMzHyeogm0Lqb=+XZ1LdkKw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
  2018-10-17 10:16       ` Thomas Gleixner
@ 2018-10-17 16:33       ` Christoph Hellwig
       [not found]         ` <20181017163351.GA23719-jcswGhMUV9g@public.gmane.org>
  2018-10-18  6:12       ` Ingo Molnar
  2 siblings, 1 reply; 24+ messages in thread
From: Christoph Hellwig @ 2018-10-17 16:33 UTC (permalink / raw)
  To: whiteheadm-HInyCGIudOg
  Cc: iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA,
	x86-DgEjT+Ai2ygdnm+yROfE0A, Christoph Hellwig,
	konrad.wilk-QHcLZuEGTsvQT0dZR+AlfA

On Tue, Oct 16, 2018 at 09:11:09AM -0400, tedheadster wrote:
> Christoph,
>   this fix has causes performance to decrease dramatically. Kernel
> builds that used to take 10-15 minutes are now taking 45-60 minutes on
> the same machine.

What is the comparism?  Is this on a non-aic7xxx kernel with and without
the fix?

^ permalink raw reply	[flat|nested] 24+ messages in thread

* Re: [PATCH] x86: enable swiotlb for > 4GiG ram on 32-bit kernels
       [not found]         ` <20181017163351.GA23719-jcswGhMUV9g@public.gmane.org>
@ 2018-10-17 17:41           ` tedheadster
       [not found]             ` <CAP8WD_boL-DxEXxa-ci382Ff8yTdMS9T+sy2Y0-LEX-WPc8L_g-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
  0 siblings, 1 reply; 24+ messages in thread
From: tedheadster @ 2018-10-17 17:41 UTC (permalink / raw)
  To: Christoph Hellwig
  Cc: iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA,
	x86-DgEjT+Ai2ygdnm+yROfE0A, Matthew Whitehead,
	konrad.wilk-QHcLZuEGTsvQT0dZR+AlfA

> What is the comparism?  Is this on a non-aic7xxx kernel with and without
> the fix?

Christoph,
  I will try and do some strict before-and-after benchmarking of your
patch. It will take a few days because I am on travel. This is on an
aic7xxx (it does have that controller) kernel with and without the
fix.

- Matthew Whitehead

^ permalink raw reply	[flat|nested] 24+ messages in thread

* Re: [PATCH] x86: enable swiotlb for > 4GiG ram on 32-bit kernels
       [not found]     ` <CAP8WD_Zj5aMcTCVtV-hot3zLNfNuMzHyeogm0Lqb=+XZ1LdkKw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
  2018-10-17 10:16       ` Thomas Gleixner
  2018-10-17 16:33       ` Christoph Hellwig
@ 2018-10-18  6:12       ` Ingo Molnar
  2 siblings, 0 replies; 24+ messages in thread
From: Ingo Molnar @ 2018-10-18  6:12 UTC (permalink / raw)
  To: whiteheadm-HInyCGIudOg
  Cc: konrad.wilk-QHcLZuEGTsvQT0dZR+AlfA, x86-DgEjT+Ai2ygdnm+yROfE0A,
	iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA,
	Borislav Petkov, Thomas Gleixner, Christoph Hellwig


* tedheadster <tedheadster-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:

> On Sun, Oct 14, 2018 at 3:52 AM Christoph Hellwig <hch-jcswGhMUV9g@public.gmane.org> wrote:
> >
> > We already build the swiotlb code for 32b-t kernels with PAE support,
> > but the code to actually use swiotlb has only been enabled for 64-bit
> > kernel for an unknown reason.
> >
> > Before Linux 4.18 we papers over this fact because the networking code,
> > the scsi layer and some random block drivers implenented their own
> > bounce buffering scheme.
> >
> > Fixes: 21e07dba ("scsi: reduce use of block bounce buffers")
> > Fixes: ab74cfeb ("net: remove the PCI_DMA_BUS_IS_PHYS check in illegal_highdma")
> > Reported-by: tedheadster <tedheadster-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> > Tested-by: tedheadster <tedheadster-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> > ---
> >
> 
> Christoph,
>   this fix has causes performance to decrease dramatically. Kernel
> builds that used to take 10-15 minutes are now taking 45-60 minutes on
> the same machine.

Ok, this is way too severe regression, and because the two offending 
commits:

 Fixes: 21e07dba9fb1 ("scsi: reduce use of block bounce buffers")
 Fixes: ab74cfebafa3 ("net: remove the PCI_DMA_BUS_IS_PHYS check in illegal_highdma")

... are from half a year ago and are in v4.18 already. Fixes should not 
cause new regressions in any case.

So I've removed this patch from tip:x86/urgent for now, could you please 
re-apply it when you do your testing? I've attached it below.

Thanks,

	Ingo

===================>
>From 6f3bc8028570e4c326030e8795dbcd57c561b723 Mon Sep 17 00:00:00 2001
From: Christoph Hellwig <hch-jcswGhMUV9g@public.gmane.org>
Date: Sun, 14 Oct 2018 09:52:08 +0200
Subject: [PATCH] x86/swiotlb: Enable swiotlb for > 4GiG ram on 32-bit kernels

We already build the swiotlb code for 32b-t kernels with PAE support,
but the code to actually use swiotlb has only been enabled for 64-bit
kernel for an unknown reason.

Before Linux 4.18 we paper over this fact because the networking code,
the scsi layer and some random block drivers implemented their own
bounce buffering scheme.

Fixes: 21e07dba9fb1 ("scsi: reduce use of block bounce buffers")
Fixes: ab74cfebafa3 ("net: remove the PCI_DMA_BUS_IS_PHYS check in illegal_highdma")
Reported-by: Matthew Whitehead <tedheadster-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Signed-off-by: Christoph Hellwig <hch-jcswGhMUV9g@public.gmane.org>
Signed-off-by: Thomas Gleixner <tglx-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>
Tested-by: Matthew Whitehead <tedheadster-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: konrad.wilk-QHcLZuEGTsvQT0dZR+AlfA@public.gmane.org
Cc: iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org
Cc: stable-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Link: https://lkml.kernel.org/r/20181014075208.2715-1-hch-jcswGhMUV9g@public.gmane.org
---
 arch/x86/kernel/pci-swiotlb.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/arch/x86/kernel/pci-swiotlb.c b/arch/x86/kernel/pci-swiotlb.c
index 661583662430..71c0b01d93b1 100644
--- a/arch/x86/kernel/pci-swiotlb.c
+++ b/arch/x86/kernel/pci-swiotlb.c
@@ -42,10 +42,8 @@ IOMMU_INIT_FINISH(pci_swiotlb_detect_override,
 int __init pci_swiotlb_detect_4gb(void)
 {
 	/* don't initialize swiotlb if iommu=off (no_iommu=1) */
-#ifdef CONFIG_X86_64
 	if (!no_iommu && max_possible_pfn > MAX_DMA32_PFN)
 		swiotlb = 1;
-#endif
 
 	/*
 	 * If SME is active then swiotlb will be set to 1 so that bounce

^ permalink raw reply	[flat|nested] 24+ messages in thread

* Re: [PATCH] x86: enable swiotlb for > 4GiG ram on 32-bit kernels
       [not found]             ` <CAP8WD_boL-DxEXxa-ci382Ff8yTdMS9T+sy2Y0-LEX-WPc8L_g-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
@ 2018-10-18 12:51               ` Christoph Hellwig
       [not found]                 ` <20181018125116.GA24676-jcswGhMUV9g@public.gmane.org>
  0 siblings, 1 reply; 24+ messages in thread
From: Christoph Hellwig @ 2018-10-18 12:51 UTC (permalink / raw)
  To: whiteheadm-HInyCGIudOg
  Cc: iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA,
	x86-DgEjT+Ai2ygdnm+yROfE0A, Christoph Hellwig,
	konrad.wilk-QHcLZuEGTsvQT0dZR+AlfA

On Wed, Oct 17, 2018 at 01:41:49PM -0400, tedheadster wrote:
> > What is the comparism?  Is this on a non-aic7xxx kernel with and without
> > the fix?
> 
> Christoph,
>   I will try and do some strict before-and-after benchmarking of your
> patch. It will take a few days because I am on travel. This is on an
> aic7xxx (it does have that controller) kernel with and without the
> fix.

But you said without the fix it doesn't work at all?  Or is this
the same box, just with the aic7xxx controller disabled?

In general the patch should only have two effects:

 - set a small amount of memory aside for bounce buffering
 - switch the default dma_ops from dma_direct_ops to swiotlb_ops

I can't really see how either could have such a huge effect, even with
swiotlb having a couple more wired up ops for which we'd enable spectre
mitigations.

So a strict before and after would be very interesting, if it is really
just this one change that causes such a huge drop we have hidden dragons
somewhere..

^ permalink raw reply	[flat|nested] 24+ messages in thread

* Re: [PATCH] x86: enable swiotlb for > 4GiG ram on 32-bit kernels
       [not found]                 ` <20181018125116.GA24676-jcswGhMUV9g@public.gmane.org>
@ 2018-10-19  1:00                   ` tedheadster
       [not found]                     ` <CAP8WD_Z2XvLsqimSnODwr5gj6GRuzh4SMKN56n6Y0JzufG=E8A-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
  0 siblings, 1 reply; 24+ messages in thread
From: tedheadster @ 2018-10-19  1:00 UTC (permalink / raw)
  To: Christoph Hellwig, mingo-DgEjT+Ai2ygdnm+yROfE0A
  Cc: iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA,
	x86-DgEjT+Ai2ygdnm+yROfE0A, Matthew Whitehead,
	konrad.wilk-QHcLZuEGTsvQT0dZR+AlfA

> But you said without the fix it doesn't work at all?  Or is this
> the same box, just with the aic7xxx controller disabled?
>
> In general the patch should only have two effects:
>
>  - set a small amount of memory aside for bounce buffering
>  - switch the default dma_ops from dma_direct_ops to swiotlb_ops
>
> I can't really see how either could have such a huge effect, even with
> swiotlb having a couple more wired up ops for which we'd enable spectre
> mitigations.
>
> So a strict before and after would be very interesting, if it is really
> just this one change that causes such a huge drop we have hidden dragons
> somewhere..

Christoph,
  I did a very controlled before-and-after and got very sensible
results. All compiles were close in time with patched and un-patched
kernels.

I must have screwed something up with my last round of testing.

Ingo: I am confident this patch should be accepted.

- Matthew Whitehead

^ permalink raw reply	[flat|nested] 24+ messages in thread

* Re: [PATCH] x86: enable swiotlb for > 4GiG ram on 32-bit kernels
       [not found]                     ` <CAP8WD_Z2XvLsqimSnODwr5gj6GRuzh4SMKN56n6Y0JzufG=E8A-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
@ 2018-10-19  5:51                       ` Ingo Molnar
  0 siblings, 0 replies; 24+ messages in thread
From: Ingo Molnar @ 2018-10-19  5:51 UTC (permalink / raw)
  To: whiteheadm-HInyCGIudOg
  Cc: iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA,
	x86-DgEjT+Ai2ygdnm+yROfE0A, Christoph Hellwig,
	konrad.wilk-QHcLZuEGTsvQT0dZR+AlfA


* tedheadster <tedheadster-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:

> > But you said without the fix it doesn't work at all?  Or is this
> > the same box, just with the aic7xxx controller disabled?
> >
> > In general the patch should only have two effects:
> >
> >  - set a small amount of memory aside for bounce buffering
> >  - switch the default dma_ops from dma_direct_ops to swiotlb_ops
> >
> > I can't really see how either could have such a huge effect, even with
> > swiotlb having a couple more wired up ops for which we'd enable spectre
> > mitigations.
> >
> > So a strict before and after would be very interesting, if it is really
> > just this one change that causes such a huge drop we have hidden dragons
> > somewhere..
> 
> Christoph,
>   I did a very controlled before-and-after and got very sensible
> results. All compiles were close in time with patched and un-patched
> kernels.
> 
> I must have screwed something up with my last round of testing.
> 
> Ingo: I am confident this patch should be accepted.

Thanks for the update, I've re-applied this to tip:x86/urgent.

	Ingo

^ permalink raw reply	[flat|nested] 24+ messages in thread

* [tip:x86/urgent] x86/swiotlb: Enable swiotlb for > 4GiG RAM on 32-bit kernels
  2018-10-14  7:52 ` Christoph Hellwig
                   ` (5 preceding siblings ...)
  (?)
@ 2018-10-19  5:54 ` tip-bot for Christoph Hellwig
  -1 siblings, 0 replies; 24+ messages in thread
From: tip-bot for Christoph Hellwig @ 2018-10-19  5:54 UTC (permalink / raw)
  To: linux-tip-commits; +Cc: hch, mingo, tedheadster, hpa, tglx, linux-kernel

Commit-ID:  485734f3fc77c1eb77ffe138c027b9a4bf0178f3
Gitweb:     https://git.kernel.org/tip/485734f3fc77c1eb77ffe138c027b9a4bf0178f3
Author:     Christoph Hellwig <hch@lst.de>
AuthorDate: Sun, 14 Oct 2018 09:52:08 +0200
Committer:  Ingo Molnar <mingo@kernel.org>
CommitDate: Fri, 19 Oct 2018 07:49:32 +0200

x86/swiotlb: Enable swiotlb for > 4GiG RAM on 32-bit kernels

We already build the swiotlb code for 32-bit kernels with PAE support,
but the code to actually use swiotlb has only been enabled for 64-bit
kernels for an unknown reason.

Before Linux v4.18 we paper over this fact because the networking code,
the SCSI layer and some random block drivers implemented their own
bounce buffering scheme.

[ mingo: Changelog fixes. ]

Fixes: 21e07dba9fb1 ("scsi: reduce use of block bounce buffers")
Fixes: ab74cfebafa3 ("net: remove the PCI_DMA_BUS_IS_PHYS check in illegal_highdma")
Reported-by: Matthew Whitehead <tedheadster@gmail.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Matthew Whitehead <tedheadster@gmail.com>
Cc: konrad.wilk@oracle.com
Cc: iommu@lists.linux-foundation.org
Cc: stable@vger.kernel.org
Link: https://lkml.kernel.org/r/20181014075208.2715-1-hch@lst.de
Signed-off-by: Ingo Molnar <mingo@kernel.org>
---
 arch/x86/kernel/pci-swiotlb.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/arch/x86/kernel/pci-swiotlb.c b/arch/x86/kernel/pci-swiotlb.c
index 661583662430..71c0b01d93b1 100644
--- a/arch/x86/kernel/pci-swiotlb.c
+++ b/arch/x86/kernel/pci-swiotlb.c
@@ -42,10 +42,8 @@ IOMMU_INIT_FINISH(pci_swiotlb_detect_override,
 int __init pci_swiotlb_detect_4gb(void)
 {
 	/* don't initialize swiotlb if iommu=off (no_iommu=1) */
-#ifdef CONFIG_X86_64
 	if (!no_iommu && max_possible_pfn > MAX_DMA32_PFN)
 		swiotlb = 1;
-#endif
 
 	/*
 	 * If SME is active then swiotlb will be set to 1 so that bounce

^ permalink raw reply	[flat|nested] 24+ messages in thread

end of thread, other threads:[~2018-10-19  5:55 UTC | newest]

Thread overview: 24+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-10-14  7:52 [PATCH] x86: enable swiotlb for > 4GiG ram on 32-bit kernels Christoph Hellwig
2018-10-14  7:52 ` Christoph Hellwig
2018-10-14  8:13 ` Thomas Gleixner
2018-10-14  8:13   ` Thomas Gleixner
2018-10-14  8:14   ` Christoph Hellwig
2018-10-14  8:14     ` Christoph Hellwig
2018-10-14  8:57     ` Thomas Gleixner
2018-10-14  8:57       ` Thomas Gleixner
2018-10-14  9:04       ` Ingo Molnar
2018-10-14  9:04         ` Ingo Molnar
2018-10-14 12:49         ` tedheadster
2018-10-14  9:18 ` [tip:x86/urgent] x86/swiotlb: Enable " tip-bot for Christoph Hellwig
2018-10-15  9:09 ` tip-bot for Christoph Hellwig
2018-10-15 18:52 ` [PATCH] x86: enable " Konrad Rzeszutek Wilk
2018-10-15 18:52   ` Konrad Rzeszutek Wilk
     [not found] ` <20181014075208.2715-1-hch-jcswGhMUV9g@public.gmane.org>
2018-10-16 13:11   ` tedheadster
     [not found]     ` <CAP8WD_Zj5aMcTCVtV-hot3zLNfNuMzHyeogm0Lqb=+XZ1LdkKw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2018-10-17 10:16       ` Thomas Gleixner
2018-10-17 16:33       ` Christoph Hellwig
     [not found]         ` <20181017163351.GA23719-jcswGhMUV9g@public.gmane.org>
2018-10-17 17:41           ` tedheadster
     [not found]             ` <CAP8WD_boL-DxEXxa-ci382Ff8yTdMS9T+sy2Y0-LEX-WPc8L_g-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2018-10-18 12:51               ` Christoph Hellwig
     [not found]                 ` <20181018125116.GA24676-jcswGhMUV9g@public.gmane.org>
2018-10-19  1:00                   ` tedheadster
     [not found]                     ` <CAP8WD_Z2XvLsqimSnODwr5gj6GRuzh4SMKN56n6Y0JzufG=E8A-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2018-10-19  5:51                       ` Ingo Molnar
2018-10-18  6:12       ` Ingo Molnar
2018-10-19  5:54 ` [tip:x86/urgent] x86/swiotlb: Enable swiotlb for > 4GiG RAM " tip-bot for Christoph Hellwig

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