From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ingo Molnar Subject: Re: [PATCH] x86: enable swiotlb for > 4GiG ram on 32-bit kernels Date: Thu, 18 Oct 2018 08:12:09 +0200 Message-ID: <20181018061209.GC62071@gmail.com> References: <20181014075208.2715-1-hch@lst.de> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Content-Disposition: inline In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org Errors-To: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org To: whiteheadm-HInyCGIudOg@public.gmane.org Cc: konrad.wilk-QHcLZuEGTsvQT0dZR+AlfA@public.gmane.org, x86-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org, Borislav Petkov , Thomas Gleixner , Christoph Hellwig List-Id: iommu@lists.linux-foundation.org * tedheadster wrote: > On Sun, Oct 14, 2018 at 3:52 AM Christoph Hellwig wrote: > > > > We already build the swiotlb code for 32b-t kernels with PAE support, > > but the code to actually use swiotlb has only been enabled for 64-bit > > kernel for an unknown reason. > > > > Before Linux 4.18 we papers over this fact because the networking code, > > the scsi layer and some random block drivers implenented their own > > bounce buffering scheme. > > > > Fixes: 21e07dba ("scsi: reduce use of block bounce buffers") > > Fixes: ab74cfeb ("net: remove the PCI_DMA_BUS_IS_PHYS check in illegal_highdma") > > Reported-by: tedheadster > > Tested-by: tedheadster > > --- > > > > Christoph, > this fix has causes performance to decrease dramatically. Kernel > builds that used to take 10-15 minutes are now taking 45-60 minutes on > the same machine. Ok, this is way too severe regression, and because the two offending commits: Fixes: 21e07dba9fb1 ("scsi: reduce use of block bounce buffers") Fixes: ab74cfebafa3 ("net: remove the PCI_DMA_BUS_IS_PHYS check in illegal_highdma") ... are from half a year ago and are in v4.18 already. Fixes should not cause new regressions in any case. So I've removed this patch from tip:x86/urgent for now, could you please re-apply it when you do your testing? I've attached it below. Thanks, Ingo ===================> >>From 6f3bc8028570e4c326030e8795dbcd57c561b723 Mon Sep 17 00:00:00 2001 From: Christoph Hellwig Date: Sun, 14 Oct 2018 09:52:08 +0200 Subject: [PATCH] x86/swiotlb: Enable swiotlb for > 4GiG ram on 32-bit kernels We already build the swiotlb code for 32b-t kernels with PAE support, but the code to actually use swiotlb has only been enabled for 64-bit kernel for an unknown reason. Before Linux 4.18 we paper over this fact because the networking code, the scsi layer and some random block drivers implemented their own bounce buffering scheme. Fixes: 21e07dba9fb1 ("scsi: reduce use of block bounce buffers") Fixes: ab74cfebafa3 ("net: remove the PCI_DMA_BUS_IS_PHYS check in illegal_highdma") Reported-by: Matthew Whitehead Signed-off-by: Christoph Hellwig Signed-off-by: Thomas Gleixner Tested-by: Matthew Whitehead Cc: konrad.wilk-QHcLZuEGTsvQT0dZR+AlfA@public.gmane.org Cc: iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org Cc: stable-u79uwXL29TY76Z2rM5mHXA@public.gmane.org Link: https://lkml.kernel.org/r/20181014075208.2715-1-hch-jcswGhMUV9g@public.gmane.org --- arch/x86/kernel/pci-swiotlb.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/x86/kernel/pci-swiotlb.c b/arch/x86/kernel/pci-swiotlb.c index 661583662430..71c0b01d93b1 100644 --- a/arch/x86/kernel/pci-swiotlb.c +++ b/arch/x86/kernel/pci-swiotlb.c @@ -42,10 +42,8 @@ IOMMU_INIT_FINISH(pci_swiotlb_detect_override, int __init pci_swiotlb_detect_4gb(void) { /* don't initialize swiotlb if iommu=off (no_iommu=1) */ -#ifdef CONFIG_X86_64 if (!no_iommu && max_possible_pfn > MAX_DMA32_PFN) swiotlb = 1; -#endif /* * If SME is active then swiotlb will be set to 1 so that bounce