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Thu, 18 Oct 2018 10:57:17 +0100 (BST) Received: from AMDC2765.digital.local ([106.116.147.25]) by eusync3.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0PGS00GLZGZA2H50@eusync3.samsung.com>; Thu, 18 Oct 2018 10:57:17 +0100 (BST) From: Marek Szyprowski To: linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Marek Szyprowski , Will Deacon , Catalin Marinas , Marc Zyngier , Thomas Gleixner , Daniel Lezcano , Krzysztof Kozlowski , Chanwoo Choi , Bartlomiej Zolnierkiewicz , Inki Dae , Mark Rutland Subject: [PATCH v4 3/6] clocksource: exynos_mct: Refactor resources allocation Date: Thu, 18 Oct 2018 11:57:05 +0200 Message-id: <20181018095708.1527-4-m.szyprowski@samsung.com> X-Mailer: git-send-email 2.17.1 In-reply-to: <20181018095708.1527-1-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrGIsWRmVeSWpSXmKPExsWy7djP87p/I05EG2y+ZWKxccZ6Vov3y3oY La5/ec5qMe+zrMWk+xNYLM6f38BusenxNVaLy7vmsFnMOL+PyWLtkbvsFn/v/GOzWHr9IpPF 5k1TmS1efjzB4sDnsWbeGkaPTas62TzuXNvD5vHu3Dl2j81L6j36tqxi9Pi8SS6APYrLJiU1 J7MstUjfLoEr49zZbvaCXxIVz24+Z29g3CXSxcjJISFgIrHs4DbmLkYuDiGBFYwSj378Zodw PjNK7L4ykQWmatuLpywQiWWMEne+z2KDcBqYJHa2PgarYhMwlOh628UGYosIZEt0Pn7ACFLE LHCSWeLfzU3sIAlhgQCJ67s/g9ksAqoSx1umMoPYvAI2Ev3rj7BCrJOXWL3hAFicU8BW4sz8 d1BnHGGT+PWCA8J2kZi7axczhC0s8er4FnYIW0bi8uRusFMlBJoZJdpnzGKHcHoYJbbO2cEG UWUtcfj4RbBtzAJ8EpO2TQeaxAEU55XoaBOCKPGQ2HxiKSvEmxMYJZY//s8+gVFyASPDKkbx 1NLi3PTUYsO81HK94sTc4tK8dL3k/NxNjMDYPv3v+KcdjF8vJR1iFOBgVOLhfZB6PFqINbGs uDL3EKMEB7OSCG+12YloId6UxMqq1KL8+KLSnNTiQ4zSHCxK4rzL5m2MFhJITyxJzU5NLUgt gskycXBKNTAuefTU8mbtN0UZO6GQg7u4eMId62/2S22PZjz98nhsalrTOUGb+IPa6w1amWS7 pmuUzlJc8qrlUXrm0+2nIx5NLH2oaZnzxD/Ms365Xno+1w7zXTWaxi4LKkULr6cKKV/cr/Xx Bn9R5BYtLbONSTf/lm7ZKF8isSZ2a9PunGVuFms5lm5+8UeJpTgj0VCLuag4EQBIeDDL6QIA AA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrMLMWRmVeSWpSXmKPExsVy+t/xq7p/I05EG/w8KGixccZ6Vov3y3oY La5/ec5qMe+zrMWk+xNYLM6f38BusenxNVaLy7vmsFnMOL+PyWLtkbvsFn/v/GOzWHr9IpPF 5k1TmS1efjzB4sDnsWbeGkaPTas62TzuXNvD5vHu3Dl2j81L6j36tqxi9Pi8SS6APYrLJiU1 J7MstUjfLoEr49zZbvaCXxIVz24+Z29g3CXSxcjJISFgIrHtxVOWLkYuDiGBJYwSh3a/Z4Vw mpgkrrxZyw5SxSZgKNH1tosNxBYRyJaYv7ebHaSIWeAks8Slx+9YQBLCAn4Sp65A2CwCqhLH W6Yyg9i8AjYS/euPsEKsk5dYveEAWJxTwFbizHyIeiGgmu4/69knMPIsYGRYxSiSWlqcm55b bKRXnJhbXJqXrpecn7uJERiU24793LKDsetd8CFGAQ5GJR7eB6nHo4VYE8uKK3MPMUpwMCuJ 8FabnYgW4k1JrKxKLcqPLyrNSS0+xCjNwaIkznveoDJKSCA9sSQ1OzW1ILUIJsvEwSnVwJia z3lCdseNX5/3P6o8f+KKX1fzjXutZxP0rTfPj1u0+0PGiwnn1Ti/f2Lu/hSic+5bfNSSXqY9 IYVlMXmHJwp4pn2yEWm+6rByaWXalu6b6u/uv1RabbSKUbifJSL6y7W985ctPvWkTfRLQfhK h2q2yozbihIP16wQswkudVOU33zKNSH3WpYSS3FGoqEWc1FxIgA8uj/eRgIAAA== X-CMS-MailID: 20181018095717eucas1p2c89f6e71642e6db62676e1af5514529f X-Msg-Generator: CA CMS-TYPE: 201P X-CMS-RootMailID: 20181018095717eucas1p2c89f6e71642e6db62676e1af5514529f References: <20181018095708.1527-1-m.szyprowski@samsung.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Move interrupts allocation from exynos4_timer_resources() into separate function together with the interrupt number parsing code from mct_init_dt(), so the code for managing interrupts is kept together. While touching exynos4_timer_resources() function, move of_iomap() to it. No functional changes. Signed-off-by: Marek Szyprowski Reviewed-by: Chanwoo Choi Tested-by: Chanwoo Choi --- drivers/clocksource/exynos_mct.c | 50 +++++++++++++++++++------------- 1 file changed, 30 insertions(+), 20 deletions(-) diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c index 49413900b24c..4c886ff2941a 100644 --- a/drivers/clocksource/exynos_mct.c +++ b/drivers/clocksource/exynos_mct.c @@ -502,11 +502,14 @@ static int exynos4_mct_dying_cpu(unsigned int cpu) return 0; } -static int __init exynos4_timer_resources(struct device_node *np, void __iomem *base) +static int __init exynos4_timer_resources(struct device_node *np) { - int err, cpu; struct clk *mct_clk, *tick_clk; + reg_base = of_iomap(np, 0); + if (!reg_base) + panic("%s: unable to ioremap mct address space\n", __func__); + tick_clk = of_clk_get_by_name(np, "fin_pll"); if (IS_ERR(tick_clk)) panic("%s: unable to determine tick clock rate\n", __func__); @@ -517,9 +520,27 @@ static int __init exynos4_timer_resources(struct device_node *np, void __iomem * panic("%s: unable to retrieve mct clock instance\n", __func__); clk_prepare_enable(mct_clk); - reg_base = base; - if (!reg_base) - panic("%s: unable to ioremap mct address space\n", __func__); + return 0; +} + +static int __init exynos4_timer_interrupts(struct device_node *np, + unsigned int int_type) +{ + int nr_irqs, i, err, cpu; + + mct_int_type = int_type; + + /* This driver uses only one global timer interrupt */ + mct_irqs[MCT_G0_IRQ] = irq_of_parse_and_map(np, MCT_G0_IRQ); + + /* + * Find out the number of local irqs specified. The local + * timer irqs are specified after the four global timer + * irqs are specified. + */ + nr_irqs = of_irq_count(np); + for (i = MCT_L0_IRQ; i < nr_irqs; i++) + mct_irqs[i] = irq_of_parse_and_map(np, i); if (mct_int_type == MCT_INT_PPI) { @@ -579,24 +600,13 @@ static int __init exynos4_timer_resources(struct device_node *np, void __iomem * static int __init mct_init_dt(struct device_node *np, unsigned int int_type) { - u32 nr_irqs, i; int ret; - mct_int_type = int_type; - - /* This driver uses only one global timer interrupt */ - mct_irqs[MCT_G0_IRQ] = irq_of_parse_and_map(np, MCT_G0_IRQ); - - /* - * Find out the number of local irqs specified. The local - * timer irqs are specified after the four global timer - * irqs are specified. - */ - nr_irqs = of_irq_count(np); - for (i = MCT_L0_IRQ; i < nr_irqs; i++) - mct_irqs[i] = irq_of_parse_and_map(np, i); + ret = exynos4_timer_resources(np); + if (ret) + return ret; - ret = exynos4_timer_resources(np, of_iomap(np, 0)); + ret = exynos4_timer_interrupts(np, int_type); if (ret) return ret; -- 2.17.1 From mboxrd@z Thu Jan 1 00:00:00 1970 From: m.szyprowski@samsung.com (Marek Szyprowski) Date: Thu, 18 Oct 2018 11:57:05 +0200 Subject: [PATCH v4 3/6] clocksource: exynos_mct: Refactor resources allocation In-Reply-To: <20181018095708.1527-1-m.szyprowski@samsung.com> References: <20181018095708.1527-1-m.szyprowski@samsung.com> Message-ID: <20181018095708.1527-4-m.szyprowski@samsung.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Move interrupts allocation from exynos4_timer_resources() into separate function together with the interrupt number parsing code from mct_init_dt(), so the code for managing interrupts is kept together. While touching exynos4_timer_resources() function, move of_iomap() to it. No functional changes. Signed-off-by: Marek Szyprowski Reviewed-by: Chanwoo Choi Tested-by: Chanwoo Choi --- drivers/clocksource/exynos_mct.c | 50 +++++++++++++++++++------------- 1 file changed, 30 insertions(+), 20 deletions(-) diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c index 49413900b24c..4c886ff2941a 100644 --- a/drivers/clocksource/exynos_mct.c +++ b/drivers/clocksource/exynos_mct.c @@ -502,11 +502,14 @@ static int exynos4_mct_dying_cpu(unsigned int cpu) return 0; } -static int __init exynos4_timer_resources(struct device_node *np, void __iomem *base) +static int __init exynos4_timer_resources(struct device_node *np) { - int err, cpu; struct clk *mct_clk, *tick_clk; + reg_base = of_iomap(np, 0); + if (!reg_base) + panic("%s: unable to ioremap mct address space\n", __func__); + tick_clk = of_clk_get_by_name(np, "fin_pll"); if (IS_ERR(tick_clk)) panic("%s: unable to determine tick clock rate\n", __func__); @@ -517,9 +520,27 @@ static int __init exynos4_timer_resources(struct device_node *np, void __iomem * panic("%s: unable to retrieve mct clock instance\n", __func__); clk_prepare_enable(mct_clk); - reg_base = base; - if (!reg_base) - panic("%s: unable to ioremap mct address space\n", __func__); + return 0; +} + +static int __init exynos4_timer_interrupts(struct device_node *np, + unsigned int int_type) +{ + int nr_irqs, i, err, cpu; + + mct_int_type = int_type; + + /* This driver uses only one global timer interrupt */ + mct_irqs[MCT_G0_IRQ] = irq_of_parse_and_map(np, MCT_G0_IRQ); + + /* + * Find out the number of local irqs specified. The local + * timer irqs are specified after the four global timer + * irqs are specified. + */ + nr_irqs = of_irq_count(np); + for (i = MCT_L0_IRQ; i < nr_irqs; i++) + mct_irqs[i] = irq_of_parse_and_map(np, i); if (mct_int_type == MCT_INT_PPI) { @@ -579,24 +600,13 @@ static int __init exynos4_timer_resources(struct device_node *np, void __iomem * static int __init mct_init_dt(struct device_node *np, unsigned int int_type) { - u32 nr_irqs, i; int ret; - mct_int_type = int_type; - - /* This driver uses only one global timer interrupt */ - mct_irqs[MCT_G0_IRQ] = irq_of_parse_and_map(np, MCT_G0_IRQ); - - /* - * Find out the number of local irqs specified. The local - * timer irqs are specified after the four global timer - * irqs are specified. - */ - nr_irqs = of_irq_count(np); - for (i = MCT_L0_IRQ; i < nr_irqs; i++) - mct_irqs[i] = irq_of_parse_and_map(np, i); + ret = exynos4_timer_resources(np); + if (ret) + return ret; - ret = exynos4_timer_resources(np, of_iomap(np, 0)); + ret = exynos4_timer_interrupts(np, int_type); if (ret) return ret; -- 2.17.1