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From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: lucas.demarchi@intel.com, Rodrigo Vivi <rodrigo.vivi@intel.com>
Subject: [RFC 1/8] drm/i915: Make number of ddi ports explicit.
Date: Thu, 18 Oct 2018 16:34:40 -0700	[thread overview]
Message-ID: <20181018233447.5187-2-rodrigo.vivi@intel.com> (raw)
In-Reply-To: <20181018233447.5187-1-rodrigo.vivi@intel.com>

Instead of a simple bool that shows if we have ddi ports
or not, let's highlight the number of ddi ports.

So we can use this information to determine the code
path instead of using platforms codenames.

Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h          | 2 +-
 drivers/gpu/drm/i915/i915_pci.c          | 5 +++--
 drivers/gpu/drm/i915/intel_device_info.h | 2 +-
 3 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 3017ef037fed..7ad232849268 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2647,7 +2647,7 @@ intel_info(const struct drm_i915_private *dev_priv)
 
 #define HAS_DP_MST(dev_priv)	((dev_priv)->info.has_dp_mst)
 
-#define HAS_DDI(dev_priv)		 ((dev_priv)->info.has_ddi)
+#define HAS_DDI(dev_priv)		 ((dev_priv)->info.ddi_ports > 0)
 #define HAS_FPGA_DBG_UNCLAIMED(dev_priv) ((dev_priv)->info.has_fpga_dbg)
 #define HAS_PSR(dev_priv)		 ((dev_priv)->info.has_psr)
 
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 0a05cc7ace14..0427486f63d0 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -363,7 +363,7 @@ static const struct intel_device_info intel_valleyview_info = {
 #define G75_FEATURES  \
 	GEN7_FEATURES, \
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, \
-	.has_ddi = 1, \
+	.ddi_ports = 5, \
 	.has_fpga_dbg = 1, \
 	.has_psr = 1, \
 	.has_dp_mst = 1, \
@@ -505,7 +505,7 @@ static const struct intel_device_info intel_skylake_gt4_info = {
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, \
 	.num_pipes = 3, \
 	.has_64bit_reloc = 1, \
-	.has_ddi = 1, \
+	.ddi_ports = 3, \
 	.has_fpga_dbg = 1, \
 	.has_fbc = 1, \
 	.has_psr = 1, \
@@ -596,6 +596,7 @@ static const struct intel_device_info intel_cannonlake_info = {
 #define GEN11_FEATURES \
 	GEN10_FEATURES, \
 	GEN(11), \
+	.ddi_ports = 6, \
 	.ddb_size = 2048, \
 	.has_logical_ring_elsq = 1
 
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index af7002640cdf..1be941222ed0 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -90,7 +90,6 @@ enum intel_ppgtt {
 	/* Keep has_* in alphabetical order */ \
 	func(has_64bit_reloc); \
 	func(has_csr); \
-	func(has_ddi); \
 	func(has_dp_mst); \
 	func(has_reset_engine); \
 	func(has_fbc); \
@@ -165,6 +164,7 @@ struct intel_device_info {
 
 	u32 display_mmio_offset;
 
+	u8 ddi_ports;
 	u8 num_pipes;
 	u8 num_sprites[I915_MAX_PIPES];
 	u8 num_scalers[I915_MAX_PIPES];
-- 
2.19.1

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  reply	other threads:[~2018-10-18 23:34 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-10-18 23:34 [RFC 0/8] re-organize a bit gen10 and gen11 Rodrigo Vivi
2018-10-18 23:34 ` Rodrigo Vivi [this message]
2018-10-18 23:34 ` [RFC 2/8] drm/i915: Use the ddi_ports info to kill ugly CNL_WITH_PORT_F Rodrigo Vivi
2018-10-19  7:39   ` Jani Nikula
2018-10-19  8:27     ` Daniel Vetter
2018-10-19 16:46     ` Lucas De Marchi
2018-10-19 17:40       ` Rodrigo Vivi
2018-10-18 23:34 ` [RFC 3/8] drm/i915/gen10: Prefer gen number than platform codename Rodrigo Vivi
2018-10-19  7:48   ` Jani Nikula
2018-10-19 10:37   ` Ville Syrjälä
2018-10-18 23:34 ` [RFC 4/8] drm/i915: Group gen 10 display Rodrigo Vivi
2018-10-19  8:03   ` Jani Nikula
2018-10-19  8:30     ` Daniel Vetter
2018-10-19  9:32       ` Joonas Lahtinen
2018-10-19 10:33       ` Ville Syrjälä
2018-10-19 16:41         ` Rodrigo Vivi
2018-10-19 17:45           ` Ville Syrjälä
2018-10-19 16:59         ` Lucas De Marchi
2018-10-19 16:52     ` Lucas De Marchi
2018-10-18 23:34 ` [RFC 5/8] drm/i915/gen11+: Prefer gen over platform codename Rodrigo Vivi
2018-10-19  8:05   ` Jani Nikula
2018-10-18 23:34 ` [RFC 6/8] drm/i915: Consolidate cdclk hooks Rodrigo Vivi
2018-10-18 23:34 ` [RFC 7/8] drm/i915: Sort platform if cases from newer-to-older Rodrigo Vivi
2018-10-19  8:07   ` Jani Nikula
2018-10-18 23:34 ` [RFC 8/8] drm/i915: Simplify intel_has_sagv function Rodrigo Vivi
2018-10-19  8:15   ` Jani Nikula
2018-10-18 23:47 ` ✗ Fi.CI.CHECKPATCH: warning for re-organize a bit gen10 and gen11 Patchwork
2018-10-18 23:50 ` ✗ Fi.CI.SPARSE: " Patchwork
2018-10-19  0:04 ` ✗ Fi.CI.BAT: failure " Patchwork

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