From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58856) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gDJFa-0004cy-2j for qemu-devel@nongnu.org; Thu, 18 Oct 2018 21:06:52 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gDJFY-00032h-2O for qemu-devel@nongnu.org; Thu, 18 Oct 2018 21:06:49 -0400 Received: from out5-smtp.messagingengine.com ([66.111.4.29]:57389) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gDJFX-0002mG-Gq for qemu-devel@nongnu.org; Thu, 18 Oct 2018 21:06:47 -0400 From: "Emilio G. Cota" Date: Thu, 18 Oct 2018 21:05:45 -0400 Message-Id: <20181019010625.25294-17-cota@braap.org> In-Reply-To: <20181019010625.25294-1-cota@braap.org> References: <20181019010625.25294-1-cota@braap.org> Subject: [Qemu-devel] [RFC v3 16/56] riscv: convert to cpu_halted List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Paolo Bonzini , Michael Clark , Palmer Dabbelt , Sagar Karandikar , Bastian Koppelmann , Alistair Francis Cc: Michael Clark Cc: Palmer Dabbelt Cc: Sagar Karandikar Cc: Bastian Koppelmann Cc: Alistair Francis Signed-off-by: Emilio G. Cota --- target/riscv/op_helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/riscv/op_helper.c b/target/riscv/op_helper.c index aec7558e1b..b5c32241dd 100644 --- a/target/riscv/op_helper.c +++ b/target/riscv/op_helper.c @@ -736,7 +736,7 @@ void helper_wfi(CPURISCVState *env) { CPUState *cs = CPU(riscv_env_get_cpu(env)); - cs->halted = 1; + cpu_halted_set(cs, 1); cs->exception_index = EXCP_HLT; cpu_loop_exit(cs); } -- 2.17.1