From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59301) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gDJFo-0004sw-7v for qemu-devel@nongnu.org; Thu, 18 Oct 2018 21:07:06 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gDJFk-0003MD-9G for qemu-devel@nongnu.org; Thu, 18 Oct 2018 21:07:03 -0400 Received: from out5-smtp.messagingengine.com ([66.111.4.29]:44501) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gDJFj-00033Z-Mu for qemu-devel@nongnu.org; Thu, 18 Oct 2018 21:06:59 -0400 From: "Emilio G. Cota" Date: Thu, 18 Oct 2018 21:06:09 -0400 Message-Id: <20181019010625.25294-41-cota@braap.org> In-Reply-To: <20181019010625.25294-1-cota@braap.org> References: <20181019010625.25294-1-cota@braap.org> Subject: [Qemu-devel] [RFC v3 40/56] alpha: convert to cpu_interrupt_request List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Paolo Bonzini , Richard Henderson Cc: Richard Henderson Signed-off-by: Emilio G. Cota --- target/alpha/cpu.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c index a953897fcc..4e8965fb6c 100644 --- a/target/alpha/cpu.c +++ b/target/alpha/cpu.c @@ -42,10 +42,10 @@ static bool alpha_cpu_has_work(CPUState *cs) assume that if a CPU really wants to stay asleep, it will mask interrupts at the chipset level, which will prevent these bits from being set in the first place. */ - return cs->interrupt_request & (CPU_INTERRUPT_HARD - | CPU_INTERRUPT_TIMER - | CPU_INTERRUPT_SMP - | CPU_INTERRUPT_MCHK); + return cpu_interrupt_request(cs) & (CPU_INTERRUPT_HARD + | CPU_INTERRUPT_TIMER + | CPU_INTERRUPT_SMP + | CPU_INTERRUPT_MCHK); } static void alpha_cpu_disas_set_info(CPUState *cpu, disassemble_info *info) -- 2.17.1