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* [PATCH v5 0/3] mmc: tmio_mmc: Add support for RZ/A2
@ 2018-10-24 22:22 Chris Brandt
  2018-10-24 22:22 ` [PATCH v5 1/3] clk: renesas: r7s9210: Add SDHI clocks Chris Brandt
                   ` (2 more replies)
  0 siblings, 3 replies; 6+ messages in thread
From: Chris Brandt @ 2018-10-24 22:22 UTC (permalink / raw)
  To: Ulf Hansson, Rob Herring, Mark Rutland, Geert Uytterhoeven,
	Michael Turquette, Stephen Boyd
  Cc: Wolfram Sang, linux-clk, linux-mmc, devicetree,
	linux-renesas-soc, Chris Brandt

Basically the same HW block that was used in R-Car Gen 3 is used in
RZ/A2 (with only a couple small differences).

V5 was just to rebase to fix merge conflicts

Chris Brandt (3):
  clk: renesas: r7s9210: Add SDHI clocks
  mmc: renesas_sdhi_internal_dmac: Add R7S9210 support
  dt-bindings: mmc: tmio_mmc: Document Renesas R7S9210

 Documentation/devicetree/bindings/mmc/tmio_mmc.txt |  3 ++-
 drivers/clk/renesas/r7s9210-cpg-mssr.c             |  5 ++++
 drivers/mmc/host/Kconfig                           |  7 +++---
 drivers/mmc/host/renesas_sdhi_internal_dmac.c      | 28 ++++++++++++++++++++--
 4 files changed, 37 insertions(+), 6 deletions(-)

-- 
2.16.1

^ permalink raw reply	[flat|nested] 6+ messages in thread

* [PATCH v5 1/3] clk: renesas: r7s9210: Add SDHI clocks
  2018-10-24 22:22 [PATCH v5 0/3] mmc: tmio_mmc: Add support for RZ/A2 Chris Brandt
@ 2018-10-24 22:22 ` Chris Brandt
  2018-10-24 22:23 ` [PATCH v5 2/3] mmc: renesas_sdhi_internal_dmac: Add R7S9210 support Chris Brandt
  2018-10-24 22:23 ` [PATCH v5 3/3] dt-bindings: mmc: tmio_mmc: Document Renesas R7S9210 Chris Brandt
  2 siblings, 0 replies; 6+ messages in thread
From: Chris Brandt @ 2018-10-24 22:22 UTC (permalink / raw)
  To: Ulf Hansson, Rob Herring, Mark Rutland, Geert Uytterhoeven,
	Michael Turquette, Stephen Boyd
  Cc: Wolfram Sang, linux-clk, linux-mmc, devicetree,
	linux-renesas-soc, Chris Brandt

Add SDHI clocks for RZ/A2

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
(Geert will apply to his tree)
---
 drivers/clk/renesas/r7s9210-cpg-mssr.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/clk/renesas/r7s9210-cpg-mssr.c b/drivers/clk/renesas/r7s9210-cpg-mssr.c
index 5135f13ec628..9056da15dc72 100644
--- a/drivers/clk/renesas/r7s9210-cpg-mssr.c
+++ b/drivers/clk/renesas/r7s9210-cpg-mssr.c
@@ -98,6 +98,11 @@ static const struct mssr_mod_clk r7s9210_mod_clks[] __initconst = {
 	DEF_MOD_STB("spi2",	 95,	R7S9210_CLK_P1),
 	DEF_MOD_STB("spi1",	 96,	R7S9210_CLK_P1),
 	DEF_MOD_STB("spi0",	 97,	R7S9210_CLK_P1),
+
+	DEF_MOD_STB("sdhi11",	100,	R7S9210_CLK_B),
+	DEF_MOD_STB("sdhi10",	101,	R7S9210_CLK_B),
+	DEF_MOD_STB("sdhi01",	102,	R7S9210_CLK_B),
+	DEF_MOD_STB("sdhi00",	103,	R7S9210_CLK_B),
 };
 
 /* The clock dividers in the table vary based on DT and register settings */
-- 
2.16.1

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [PATCH v5 2/3] mmc: renesas_sdhi_internal_dmac: Add R7S9210 support
  2018-10-24 22:22 [PATCH v5 0/3] mmc: tmio_mmc: Add support for RZ/A2 Chris Brandt
  2018-10-24 22:22 ` [PATCH v5 1/3] clk: renesas: r7s9210: Add SDHI clocks Chris Brandt
@ 2018-10-24 22:23 ` Chris Brandt
  2018-11-12 11:05   ` Ulf Hansson
  2018-10-24 22:23 ` [PATCH v5 3/3] dt-bindings: mmc: tmio_mmc: Document Renesas R7S9210 Chris Brandt
  2 siblings, 1 reply; 6+ messages in thread
From: Chris Brandt @ 2018-10-24 22:23 UTC (permalink / raw)
  To: Ulf Hansson, Rob Herring, Mark Rutland, Geert Uytterhoeven,
	Michael Turquette, Stephen Boyd
  Cc: Wolfram Sang, linux-clk, linux-mmc, devicetree,
	linux-renesas-soc, Chris Brandt

The SDHI/MMC controller in the RZ/A2 is almost the same as R-Car gen3, but
with some minor differences.

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
---
v5:
 * Rebased against -next to fix conficts with RZ/G1C patches
 * Changed Kconfig message to say "found in some RZ" instead of just
   "found in RZ/A"
v4:
 * Fixed spelling in #define
v3:
 * Removed extra space in Kconfig
 * Removed unneeded parentheses
v2:
 * Made comment clearer
---
 drivers/mmc/host/Kconfig                      |  7 ++++---
 drivers/mmc/host/renesas_sdhi_internal_dmac.c | 28 +++++++++++++++++++++++++--
 2 files changed, 30 insertions(+), 5 deletions(-)

diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
index 1b58739d9744..720311ece714 100644
--- a/drivers/mmc/host/Kconfig
+++ b/drivers/mmc/host/Kconfig
@@ -646,13 +646,14 @@ config MMC_SDHI_SYS_DMAC
 
 config MMC_SDHI_INTERNAL_DMAC
 	tristate "DMA for SDHI SD/SDIO controllers using on-chip bus mastering"
-	depends on ARM64 || ARCH_R8A77470 || COMPILE_TEST
+	depends on ARM64 || ARCH_R7S9210 || ARCH_R8A77470 || COMPILE_TEST
 	depends on MMC_SDHI
-	default MMC_SDHI if (ARM64 || ARCH_R8A77470)
+	default MMC_SDHI if (ARM64 || ARCH_R7S9210 || ARCH_R8A77470)
 	help
 	  This provides DMA support for SDHI SD/SDIO controllers
 	  using on-chip bus mastering. This supports the controllers
-	  found in arm64 based SoCs.
+	  found in arm64 based SoCs. This controller is also found in
+	  some RZ family SoCs.
 
 config MMC_UNIPHIER
 	tristate "UniPhier SD/eMMC Host Controller support"
diff --git a/drivers/mmc/host/renesas_sdhi_internal_dmac.c b/drivers/mmc/host/renesas_sdhi_internal_dmac.c
index b6f54102bfdd..b9d83d6ed346 100644
--- a/drivers/mmc/host/renesas_sdhi_internal_dmac.c
+++ b/drivers/mmc/host/renesas_sdhi_internal_dmac.c
@@ -34,7 +34,7 @@
 #define DTRAN_MODE_CH_NUM_CH0	0	/* "downstream" = for write commands */
 #define DTRAN_MODE_CH_NUM_CH1	BIT(16)	/* "upstream" = for read commands */
 #define DTRAN_MODE_BUS_WIDTH	(BIT(5) | BIT(4))
-#define DTRAN_MODE_ADDR_MODE	BIT(0)	/* 1 = Increment address */
+#define DTRAN_MODE_ADDR_MODE	BIT(0)	/* 1 = Increment address, 0 = Fixed */
 
 /* DM_CM_DTRAN_CTRL */
 #define DTRAN_CTRL_DM_START	BIT(0)
@@ -73,6 +73,9 @@ static unsigned long global_flags;
 #define SDHI_INTERNAL_DMAC_ONE_RX_ONLY	0
 #define SDHI_INTERNAL_DMAC_RX_IN_USE	1
 
+/* RZ/A2 does not have the ADRR_MODE bit */
+#define SDHI_INTERNAL_DMAC_ADDR_MODE_FIXED_ONLY 2
+
 /* Definitions for sampling clocks */
 static struct renesas_sdhi_scc rcar_gen3_scc_taps[] = {
 	{
@@ -81,6 +84,21 @@ static struct renesas_sdhi_scc rcar_gen3_scc_taps[] = {
 	},
 };
 
+static const struct renesas_sdhi_of_data of_rza2_compatible = {
+	.tmio_flags	= TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_CLK_ACTUAL |
+			  TMIO_MMC_HAVE_CBSY,
+	.tmio_ocr_mask	= MMC_VDD_32_33,
+	.capabilities	= MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
+			  MMC_CAP_CMD23,
+	.bus_shift	= 2,
+	.scc_offset	= 0 - 0x1000,
+	.taps		= rcar_gen3_scc_taps,
+	.taps_num	= ARRAY_SIZE(rcar_gen3_scc_taps),
+	/* DMAC can handle 0xffffffff blk count but only 1 segment */
+	.max_blk_count	= 0xffffffff,
+	.max_segs	= 1,
+};
+
 static const struct renesas_sdhi_of_data of_rcar_r8a7795_compatible = {
 	.tmio_flags	= TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_CLK_ACTUAL |
 			  TMIO_MMC_HAVE_CBSY | TMIO_MMC_MIN_RCAR2 |
@@ -113,6 +131,7 @@ static const struct renesas_sdhi_of_data of_rcar_gen3_compatible = {
 };
 
 static const struct of_device_id renesas_sdhi_internal_dmac_of_match[] = {
+	{ .compatible = "renesas,sdhi-r7s9210", .data = &of_rza2_compatible, },
 	{ .compatible = "renesas,sdhi-mmc-r8a77470", .data = &of_rcar_gen3_compatible, },
 	{ .compatible = "renesas,sdhi-r8a7795", .data = &of_rcar_r8a7795_compatible, },
 	{ .compatible = "renesas,sdhi-r8a7796", .data = &of_rcar_r8a7795_compatible, },
@@ -172,7 +191,10 @@ renesas_sdhi_internal_dmac_start_dma(struct tmio_mmc_host *host,
 				     struct mmc_data *data)
 {
 	struct scatterlist *sg = host->sg_ptr;
-	u32 dtran_mode = DTRAN_MODE_BUS_WIDTH | DTRAN_MODE_ADDR_MODE;
+	u32 dtran_mode = DTRAN_MODE_BUS_WIDTH;
+
+	if (!test_bit(SDHI_INTERNAL_DMAC_ADDR_MODE_FIXED_ONLY, &global_flags))
+		dtran_mode |= DTRAN_MODE_ADDR_MODE;
 
 	if (!dma_map_sg(&host->pdev->dev, sg, host->sg_len,
 			mmc_get_dma_dir(data)))
@@ -292,6 +314,8 @@ static const struct tmio_mmc_dma_ops renesas_sdhi_internal_dmac_dma_ops = {
  */
 static const struct soc_device_attribute soc_whitelist[] = {
 	/* specific ones */
+	{ .soc_id = "r7s9210",
+	  .data = (void *)BIT(SDHI_INTERNAL_DMAC_ADDR_MODE_FIXED_ONLY) },
 	{ .soc_id = "r8a7795", .revision = "ES1.*",
 	  .data = (void *)BIT(SDHI_INTERNAL_DMAC_ONE_RX_ONLY) },
 	{ .soc_id = "r8a7796", .revision = "ES1.0",
-- 
2.16.1

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [PATCH v5 3/3] dt-bindings: mmc: tmio_mmc: Document Renesas R7S9210
  2018-10-24 22:22 [PATCH v5 0/3] mmc: tmio_mmc: Add support for RZ/A2 Chris Brandt
  2018-10-24 22:22 ` [PATCH v5 1/3] clk: renesas: r7s9210: Add SDHI clocks Chris Brandt
  2018-10-24 22:23 ` [PATCH v5 2/3] mmc: renesas_sdhi_internal_dmac: Add R7S9210 support Chris Brandt
@ 2018-10-24 22:23 ` Chris Brandt
  2018-11-12 11:05   ` Ulf Hansson
  2 siblings, 1 reply; 6+ messages in thread
From: Chris Brandt @ 2018-10-24 22:23 UTC (permalink / raw)
  To: Ulf Hansson, Rob Herring, Mark Rutland, Geert Uytterhoeven,
	Michael Turquette, Stephen Boyd
  Cc: Wolfram Sang, linux-clk, linux-mmc, devicetree,
	linux-renesas-soc, Chris Brandt

Document support for the RZ/A2 (R7S9210) SoC.

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
---
v3:
 * Added Reviewed-by from Rob and Simon
v2:
 * Documented that R7S9210 has 2 clocks
---
 Documentation/devicetree/bindings/mmc/tmio_mmc.txt | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/mmc/tmio_mmc.txt b/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
index 27f2eab2981d..9391ae9a1d9d 100644
--- a/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
+++ b/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
@@ -13,6 +13,7 @@ Required properties:
 - compatible: should contain one or more of the following:
 		"renesas,sdhi-sh73a0" - SDHI IP on SH73A0 SoC
 		"renesas,sdhi-r7s72100" - SDHI IP on R7S72100 SoC
+		"renesas,sdhi-r7s9210" - SDHI IP on R7S9210 SoC
 		"renesas,sdhi-r8a73a4" - SDHI IP on R8A73A4 SoC
 		"renesas,sdhi-r8a7740" - SDHI IP on R8A7740 SoC
 		"renesas,sdhi-r8a7743" - SDHI IP on R8A7743 SoC
@@ -56,7 +57,7 @@ Required properties:
 	  "core" and "cd". If the controller only has 1 clock, naming is not
 	  required.
 	  Devices which have more than 1 clock are listed below:
-	  2: R7S72100
+	  2: R7S72100, R7S9210
 
 Optional properties:
 - pinctrl-names: should be "default", "state_uhs"
-- 
2.16.1

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* Re: [PATCH v5 2/3] mmc: renesas_sdhi_internal_dmac: Add R7S9210 support
  2018-10-24 22:23 ` [PATCH v5 2/3] mmc: renesas_sdhi_internal_dmac: Add R7S9210 support Chris Brandt
@ 2018-11-12 11:05   ` Ulf Hansson
  0 siblings, 0 replies; 6+ messages in thread
From: Ulf Hansson @ 2018-11-12 11:05 UTC (permalink / raw)
  To: Chris Brandt
  Cc: Rob Herring, Mark Rutland, Geert Uytterhoeven, Michael Turquette,
	Stephen Boyd, Wolfram Sang, linux-clk, linux-mmc, DTML,
	Linux-Renesas

On 25 October 2018 at 00:23, Chris Brandt <chris.brandt@renesas.com> wrote:
> The SDHI/MMC controller in the RZ/A2 is almost the same as R-Car gen3, but
> with some minor differences.
>
> Signed-off-by: Chris Brandt <chris.brandt@renesas.com>

Applied for next, thanks!

Kind regards
Uffe

> ---
> v5:
>  * Rebased against -next to fix conficts with RZ/G1C patches
>  * Changed Kconfig message to say "found in some RZ" instead of just
>    "found in RZ/A"
> v4:
>  * Fixed spelling in #define
> v3:
>  * Removed extra space in Kconfig
>  * Removed unneeded parentheses
> v2:
>  * Made comment clearer
> ---
>  drivers/mmc/host/Kconfig                      |  7 ++++---
>  drivers/mmc/host/renesas_sdhi_internal_dmac.c | 28 +++++++++++++++++++++++++--
>  2 files changed, 30 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
> index 1b58739d9744..720311ece714 100644
> --- a/drivers/mmc/host/Kconfig
> +++ b/drivers/mmc/host/Kconfig
> @@ -646,13 +646,14 @@ config MMC_SDHI_SYS_DMAC
>
>  config MMC_SDHI_INTERNAL_DMAC
>         tristate "DMA for SDHI SD/SDIO controllers using on-chip bus mastering"
> -       depends on ARM64 || ARCH_R8A77470 || COMPILE_TEST
> +       depends on ARM64 || ARCH_R7S9210 || ARCH_R8A77470 || COMPILE_TEST
>         depends on MMC_SDHI
> -       default MMC_SDHI if (ARM64 || ARCH_R8A77470)
> +       default MMC_SDHI if (ARM64 || ARCH_R7S9210 || ARCH_R8A77470)
>         help
>           This provides DMA support for SDHI SD/SDIO controllers
>           using on-chip bus mastering. This supports the controllers
> -         found in arm64 based SoCs.
> +         found in arm64 based SoCs. This controller is also found in
> +         some RZ family SoCs.
>
>  config MMC_UNIPHIER
>         tristate "UniPhier SD/eMMC Host Controller support"
> diff --git a/drivers/mmc/host/renesas_sdhi_internal_dmac.c b/drivers/mmc/host/renesas_sdhi_internal_dmac.c
> index b6f54102bfdd..b9d83d6ed346 100644
> --- a/drivers/mmc/host/renesas_sdhi_internal_dmac.c
> +++ b/drivers/mmc/host/renesas_sdhi_internal_dmac.c
> @@ -34,7 +34,7 @@
>  #define DTRAN_MODE_CH_NUM_CH0  0       /* "downstream" = for write commands */
>  #define DTRAN_MODE_CH_NUM_CH1  BIT(16) /* "upstream" = for read commands */
>  #define DTRAN_MODE_BUS_WIDTH   (BIT(5) | BIT(4))
> -#define DTRAN_MODE_ADDR_MODE   BIT(0)  /* 1 = Increment address */
> +#define DTRAN_MODE_ADDR_MODE   BIT(0)  /* 1 = Increment address, 0 = Fixed */
>
>  /* DM_CM_DTRAN_CTRL */
>  #define DTRAN_CTRL_DM_START    BIT(0)
> @@ -73,6 +73,9 @@ static unsigned long global_flags;
>  #define SDHI_INTERNAL_DMAC_ONE_RX_ONLY 0
>  #define SDHI_INTERNAL_DMAC_RX_IN_USE   1
>
> +/* RZ/A2 does not have the ADRR_MODE bit */
> +#define SDHI_INTERNAL_DMAC_ADDR_MODE_FIXED_ONLY 2
> +
>  /* Definitions for sampling clocks */
>  static struct renesas_sdhi_scc rcar_gen3_scc_taps[] = {
>         {
> @@ -81,6 +84,21 @@ static struct renesas_sdhi_scc rcar_gen3_scc_taps[] = {
>         },
>  };
>
> +static const struct renesas_sdhi_of_data of_rza2_compatible = {
> +       .tmio_flags     = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_CLK_ACTUAL |
> +                         TMIO_MMC_HAVE_CBSY,
> +       .tmio_ocr_mask  = MMC_VDD_32_33,
> +       .capabilities   = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
> +                         MMC_CAP_CMD23,
> +       .bus_shift      = 2,
> +       .scc_offset     = 0 - 0x1000,
> +       .taps           = rcar_gen3_scc_taps,
> +       .taps_num       = ARRAY_SIZE(rcar_gen3_scc_taps),
> +       /* DMAC can handle 0xffffffff blk count but only 1 segment */
> +       .max_blk_count  = 0xffffffff,
> +       .max_segs       = 1,
> +};
> +
>  static const struct renesas_sdhi_of_data of_rcar_r8a7795_compatible = {
>         .tmio_flags     = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_CLK_ACTUAL |
>                           TMIO_MMC_HAVE_CBSY | TMIO_MMC_MIN_RCAR2 |
> @@ -113,6 +131,7 @@ static const struct renesas_sdhi_of_data of_rcar_gen3_compatible = {
>  };
>
>  static const struct of_device_id renesas_sdhi_internal_dmac_of_match[] = {
> +       { .compatible = "renesas,sdhi-r7s9210", .data = &of_rza2_compatible, },
>         { .compatible = "renesas,sdhi-mmc-r8a77470", .data = &of_rcar_gen3_compatible, },
>         { .compatible = "renesas,sdhi-r8a7795", .data = &of_rcar_r8a7795_compatible, },
>         { .compatible = "renesas,sdhi-r8a7796", .data = &of_rcar_r8a7795_compatible, },
> @@ -172,7 +191,10 @@ renesas_sdhi_internal_dmac_start_dma(struct tmio_mmc_host *host,
>                                      struct mmc_data *data)
>  {
>         struct scatterlist *sg = host->sg_ptr;
> -       u32 dtran_mode = DTRAN_MODE_BUS_WIDTH | DTRAN_MODE_ADDR_MODE;
> +       u32 dtran_mode = DTRAN_MODE_BUS_WIDTH;
> +
> +       if (!test_bit(SDHI_INTERNAL_DMAC_ADDR_MODE_FIXED_ONLY, &global_flags))
> +               dtran_mode |= DTRAN_MODE_ADDR_MODE;
>
>         if (!dma_map_sg(&host->pdev->dev, sg, host->sg_len,
>                         mmc_get_dma_dir(data)))
> @@ -292,6 +314,8 @@ static const struct tmio_mmc_dma_ops renesas_sdhi_internal_dmac_dma_ops = {
>   */
>  static const struct soc_device_attribute soc_whitelist[] = {
>         /* specific ones */
> +       { .soc_id = "r7s9210",
> +         .data = (void *)BIT(SDHI_INTERNAL_DMAC_ADDR_MODE_FIXED_ONLY) },
>         { .soc_id = "r8a7795", .revision = "ES1.*",
>           .data = (void *)BIT(SDHI_INTERNAL_DMAC_ONE_RX_ONLY) },
>         { .soc_id = "r8a7796", .revision = "ES1.0",
> --
> 2.16.1
>

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH v5 3/3] dt-bindings: mmc: tmio_mmc: Document Renesas R7S9210
  2018-10-24 22:23 ` [PATCH v5 3/3] dt-bindings: mmc: tmio_mmc: Document Renesas R7S9210 Chris Brandt
@ 2018-11-12 11:05   ` Ulf Hansson
  0 siblings, 0 replies; 6+ messages in thread
From: Ulf Hansson @ 2018-11-12 11:05 UTC (permalink / raw)
  To: Chris Brandt
  Cc: Rob Herring, Mark Rutland, Geert Uytterhoeven, Michael Turquette,
	Stephen Boyd, Wolfram Sang, linux-clk, linux-mmc, DTML,
	Linux-Renesas

On 25 October 2018 at 00:23, Chris Brandt <chris.brandt@renesas.com> wrote:
> Document support for the RZ/A2 (R7S9210) SoC.
>
> Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> Reviewed-by: Rob Herring <robh@kernel.org>
> Reviewed-by: Simon Horman <horms+renesas@verge.net.au>

Applied for next, thanks!

Kind regards
Uffe

> ---
> v3:
>  * Added Reviewed-by from Rob and Simon
> v2:
>  * Documented that R7S9210 has 2 clocks
> ---
>  Documentation/devicetree/bindings/mmc/tmio_mmc.txt | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/mmc/tmio_mmc.txt b/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
> index 27f2eab2981d..9391ae9a1d9d 100644
> --- a/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
> +++ b/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
> @@ -13,6 +13,7 @@ Required properties:
>  - compatible: should contain one or more of the following:
>                 "renesas,sdhi-sh73a0" - SDHI IP on SH73A0 SoC
>                 "renesas,sdhi-r7s72100" - SDHI IP on R7S72100 SoC
> +               "renesas,sdhi-r7s9210" - SDHI IP on R7S9210 SoC
>                 "renesas,sdhi-r8a73a4" - SDHI IP on R8A73A4 SoC
>                 "renesas,sdhi-r8a7740" - SDHI IP on R8A7740 SoC
>                 "renesas,sdhi-r8a7743" - SDHI IP on R8A7743 SoC
> @@ -56,7 +57,7 @@ Required properties:
>           "core" and "cd". If the controller only has 1 clock, naming is not
>           required.
>           Devices which have more than 1 clock are listed below:
> -         2: R7S72100
> +         2: R7S72100, R7S9210
>
>  Optional properties:
>  - pinctrl-names: should be "default", "state_uhs"
> --
> 2.16.1
>

^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2018-11-12 11:05 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-10-24 22:22 [PATCH v5 0/3] mmc: tmio_mmc: Add support for RZ/A2 Chris Brandt
2018-10-24 22:22 ` [PATCH v5 1/3] clk: renesas: r7s9210: Add SDHI clocks Chris Brandt
2018-10-24 22:23 ` [PATCH v5 2/3] mmc: renesas_sdhi_internal_dmac: Add R7S9210 support Chris Brandt
2018-11-12 11:05   ` Ulf Hansson
2018-10-24 22:23 ` [PATCH v5 3/3] dt-bindings: mmc: tmio_mmc: Document Renesas R7S9210 Chris Brandt
2018-11-12 11:05   ` Ulf Hansson

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