From mboxrd@z Thu Jan 1 00:00:00 1970 From: Manasi Navare Subject: [PATCH v6 24/28] drm/i915/dp: Configure Display stream splitter registers during DSC enable Date: Wed, 24 Oct 2018 15:28:36 -0700 Message-ID: <20181024222840.25683-25-manasi.d.navare@intel.com> References: <20181024222840.25683-1-manasi.d.navare@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <20181024222840.25683-1-manasi.d.navare@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Cc: Manasi Navare , Anusha Srivatsa List-Id: dri-devel@lists.freedesktop.org RGlzcGxheSBTdHJlYW0gU3BsaXR0ZXIgcmVnaXN0ZXJzIG5lZWQgdG8gYmUgcHJvZ3JhbW1lZCB0 byBlbmFibGUKdGhlIGpvaW5lciBpZiB0d28gRFNDIGVuZ2luZXMgYXJlIHVzZWQgYW5kIGFsc28g dG8gZW5hYmxlCnRoZSBsZWZ0IGFuZCB0aGUgcmlnaHQgRFNDIGVuZ2luZXMuIFRoaXMgaGFwcGVu cyBhcyBwYXJ0IG9mCnRoZSBEU0MgZW5hYmxpbmcgcm91dGluZSBpbiB0aGUgc291cmNlIGluIGF0 b21pYyBjb21taXQuCgp2MzoKKiBVc2UgY3B1X3RyYW5zY29kZXIgaW5zdGVhZCBvZiBlbmNvZGVy LT50eXBlIChWaWxsZSkKdjI6CiogUmViYXNlIChNYW5hc2kpCgpDYzogSmFuaSBOaWt1bGEgPGph bmkubmlrdWxhQGxpbnV4LmludGVsLmNvbT4KQ2M6IFZpbGxlIFN5cmphbGEgPHZpbGxlLnN5cmph bGFAbGludXguaW50ZWwuY29tPgpDYzogQW51c2hhIFNyaXZhdHNhIDxhbnVzaGEuc3JpdmF0c2FA aW50ZWwuY29tPgpTaWduZWQtb2ZmLWJ5OiBNYW5hc2kgTmF2YXJlIDxtYW5hc2kuZC5uYXZhcmVA aW50ZWwuY29tPgpSZXZpZXdlZC1ieTogQW51c2hhIFNyaXZhdHNhIDxhbnVzaGEuc3JpdmF0c2FA aW50ZWxjb20+Ci0tLQogZHJpdmVycy9ncHUvZHJtL2k5MTUvaW50ZWxfdmRzYy5jIHwgMjIgKysr KysrKysrKysrKysrKysrKysrKwogMSBmaWxlIGNoYW5nZWQsIDIyIGluc2VydGlvbnMoKykKCmRp ZmYgLS1naXQgYS9kcml2ZXJzL2dwdS9kcm0vaTkxNS9pbnRlbF92ZHNjLmMgYi9kcml2ZXJzL2dw dS9kcm0vaTkxNS9pbnRlbF92ZHNjLmMKaW5kZXggNGI0YjgxMmQ2OGYzLi44YjQ2NjE5YWFlMTUg MTAwNjQ0Ci0tLSBhL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2ludGVsX3Zkc2MuYworKysgYi9kcml2 ZXJzL2dwdS9kcm0vaTkxNS9pbnRlbF92ZHNjLmMKQEAgLTEwMTAsNiArMTAxMCwxMiBAQCBzdGF0 aWMgdm9pZCBpbnRlbF9kcF9zZW5kX2RzY19wcHNfc2RwKHN0cnVjdCBpbnRlbF9lbmNvZGVyICpl bmNvZGVyLAogdm9pZCBpbnRlbF9kc2NfZW5hYmxlKHN0cnVjdCBpbnRlbF9lbmNvZGVyICplbmNv ZGVyLAogCQkgICAgICBzdHJ1Y3QgaW50ZWxfY3J0Y19zdGF0ZSAqY3J0Y19zdGF0ZSkKIHsKKwlz dHJ1Y3QgaW50ZWxfY3J0YyAqY3J0YyA9IHRvX2ludGVsX2NydGMoY3J0Y19zdGF0ZS0+YmFzZS5j cnRjKTsKKwlzdHJ1Y3QgZHJtX2k5MTVfcHJpdmF0ZSAqZGV2X3ByaXYgPSB0b19pOTE1KGVuY29k ZXItPmJhc2UuZGV2KTsKKwllbnVtIHBpcGUgcGlwZSA9IGNydGMtPnBpcGU7CisJaTkxNV9yZWdf dCBkc3NfY3RsMV9yZWcsIGRzc19jdGwyX3JlZzsKKwl1MzIgZHNzX2N0bDFfdmFsID0gMDsKKwl1 MzIgZHNzX2N0bDJfdmFsID0gMDsKIAogCWlmICghY3J0Y19zdGF0ZS0+ZHNjX3BhcmFtcy5jb21w cmVzc2lvbl9lbmFibGUpCiAJCXJldHVybjsKQEAgLTEwMTgsNSArMTAyNCwyMSBAQCB2b2lkIGlu dGVsX2RzY19lbmFibGUoc3RydWN0IGludGVsX2VuY29kZXIgKmVuY29kZXIsCiAKIAlpbnRlbF9k cF9zZW5kX2RzY19wcHNfc2RwKGVuY29kZXIsIGNydGNfc3RhdGUpOwogCisJLyogQ29uZmlndXJl IERTU19DVEwgcmVnaXN0ZXJzIGZvciBEU0MgKi8KKwlpZiAoY3J0Y19zdGF0ZS0+Y3B1X3RyYW5z Y29kZXIgPT0gVFJBTlNDT0RFUl9FRFApIHsKKwkJZHNzX2N0bDFfcmVnID0gRFNTX0NUTDE7CisJ CWRzc19jdGwyX3JlZyA9IERTU19DVEwyOworCX0gZWxzZSB7CisJCWRzc19jdGwxX3JlZyA9IElD TF9QSVBFX0RTU19DVEwxKHBpcGUpOworCQlkc3NfY3RsMl9yZWcgPSBJQ0xfUElQRV9EU1NfQ1RM MihwaXBlKTsKKwl9CisJZHNzX2N0bDJfdmFsIHw9IExFRlRfQlJBTkNIX1ZEU0NfRU5BQkxFOwor CWlmIChjcnRjX3N0YXRlLT5kc2NfcGFyYW1zLmRzY19zcGxpdCkgeworCQlkc3NfY3RsMl92YWwg fD0gUklHSFRfQlJBTkNIX1ZEU0NfRU5BQkxFOworCQlkc3NfY3RsMV92YWwgfD0gSk9JTkVSX0VO QUJMRTsKKwl9CisJSTkxNV9XUklURShkc3NfY3RsMV9yZWcsIGRzc19jdGwxX3ZhbCk7CisJSTkx NV9XUklURShkc3NfY3RsMl9yZWcsIGRzc19jdGwyX3ZhbCk7CisKIAlyZXR1cm47CiB9Ci0tIAoy LjE4LjAKCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCmRy aS1kZXZlbCBtYWlsaW5nIGxpc3QKZHJpLWRldmVsQGxpc3RzLmZyZWVkZXNrdG9wLm9yZwpodHRw czovL2xpc3RzLmZyZWVkZXNrdG9wLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2RyaS1kZXZlbAo=