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* [PATCH] drm/i915/gtt: Allow mixed pages to setup large PTE
@ 2018-10-26 12:04 Chris Wilson
  2018-10-26 13:04 ` ✗ Fi.CI.BAT: failure for " Patchwork
                   ` (4 more replies)
  0 siblings, 5 replies; 8+ messages in thread
From: Chris Wilson @ 2018-10-26 12:04 UTC (permalink / raw)
  To: intel-gfx; +Cc: Matthew Auld

For example, we may want to split a 2MiB large page into multiple 64KiB
PTEs. To do so, we want to allow a vma that only has the 2MiB flag set
to utilise the 64KiB as required, i.e. we want to include all larger
pages as well.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Matthew Auld <matthew.auld@intel.com>
---
 drivers/gpu/drm/i915/i915_gem_gtt.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 19b2d991b5d8..9e1756216ada 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -1074,7 +1074,7 @@ static void gen8_ppgtt_insert_huge_entries(struct i915_vma *vma,
 		gen8_pte_t *vaddr;
 		u16 index, max;
 
-		if (vma->page_sizes.sg & I915_GTT_PAGE_SIZE_2M &&
+		if (vma->page_sizes.sg & -I915_GTT_PAGE_SIZE_2M &&
 		    IS_ALIGNED(iter->dma, I915_GTT_PAGE_SIZE_2M) &&
 		    rem >= I915_GTT_PAGE_SIZE_2M && !idx.pte) {
 			index = idx.pde;
@@ -1092,7 +1092,7 @@ static void gen8_ppgtt_insert_huge_entries(struct i915_vma *vma,
 			page_size = I915_GTT_PAGE_SIZE;
 
 			if (!index &&
-			    vma->page_sizes.sg & I915_GTT_PAGE_SIZE_64K &&
+			    vma->page_sizes.sg & -I915_GTT_PAGE_SIZE_64K &&
 			    IS_ALIGNED(iter->dma, I915_GTT_PAGE_SIZE_64K) &&
 			    (IS_ALIGNED(rem, I915_GTT_PAGE_SIZE_64K) ||
 			     rem >= (max - index) * I915_GTT_PAGE_SIZE))
-- 
2.19.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 8+ messages in thread

* ✗ Fi.CI.BAT: failure for drm/i915/gtt: Allow mixed pages to setup large PTE
  2018-10-26 12:04 [PATCH] drm/i915/gtt: Allow mixed pages to setup large PTE Chris Wilson
@ 2018-10-26 13:04 ` Patchwork
  2018-10-26 14:58 ` [PATCH] " Chris Wilson
                   ` (3 subsequent siblings)
  4 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2018-10-26 13:04 UTC (permalink / raw)
  To: Chris Wilson; +Cc: intel-gfx

== Series Details ==

Series: drm/i915/gtt: Allow mixed pages to setup large PTE
URL   : https://patchwork.freedesktop.org/series/51596/
State : failure

== Summary ==

= CI Bug Log - changes from CI_DRM_5042 -> Patchwork_10600 =

== Summary - FAILURE ==

  Serious unknown changes coming with Patchwork_10600 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_10600, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/51596/revisions/1/mbox/

== Possible new issues ==

  Here are the unknown changes that may have been introduced in Patchwork_10600:

  === IGT changes ===

    ==== Possible regressions ====

    igt@drv_selftest@live_contexts:
      fi-icl-u:           NOTRUN -> DMESG-FAIL

    
== Known issues ==

  Here are the changes found in Patchwork_10600 that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@gem_exec_suspend@basic-s3:
      fi-glk-j4005:       PASS -> DMESG-WARN (fdo#105719)

    igt@pm_rpm@module-reload:
      fi-glk-j4005:       PASS -> DMESG-WARN (fdo#107726)

    
    ==== Possible fixes ====

    igt@drv_selftest@live_hangcheck:
      fi-kbl-7560u:       INCOMPLETE (fdo#108044) -> PASS

    igt@kms_flip@basic-flip-vs-wf_vblank:
      fi-glk-j4005:       FAIL (fdo#100368) -> PASS

    igt@kms_flip@basic-plain-flip:
      fi-glk-j4005:       DMESG-WARN (fdo#106097) -> PASS

    igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
      fi-icl-u:           INCOMPLETE (fdo#107713) -> PASS

    
  fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
  fdo#105719 https://bugs.freedesktop.org/show_bug.cgi?id=105719
  fdo#106097 https://bugs.freedesktop.org/show_bug.cgi?id=106097
  fdo#107713 https://bugs.freedesktop.org/show_bug.cgi?id=107713
  fdo#107726 https://bugs.freedesktop.org/show_bug.cgi?id=107726
  fdo#108044 https://bugs.freedesktop.org/show_bug.cgi?id=108044


== Participating hosts (48 -> 43) ==

  Missing    (5): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 


== Build changes ==

    * Linux: CI_DRM_5042 -> Patchwork_10600

  CI_DRM_5042: 591c74093dc70bdceaa02441c494dd7090533564 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4696: ff2db94acb53543acd7ba4e2badff59807069365 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_10600: fa08ba316dbaf4b39336d176e41c43fef7ecf754 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

fa08ba316dba drm/i915/gtt: Allow mixed pages to setup large PTE

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10600/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 8+ messages in thread

* [PATCH] drm/i915/gtt: Allow mixed pages to setup large PTE
  2018-10-26 12:04 [PATCH] drm/i915/gtt: Allow mixed pages to setup large PTE Chris Wilson
  2018-10-26 13:04 ` ✗ Fi.CI.BAT: failure for " Patchwork
@ 2018-10-26 14:58 ` Chris Wilson
  2018-10-26 19:27   ` Matthew Auld
  2018-10-26 15:44 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gtt: Allow mixed pages to setup large PTE (rev2) Patchwork
                   ` (2 subsequent siblings)
  4 siblings, 1 reply; 8+ messages in thread
From: Chris Wilson @ 2018-10-26 14:58 UTC (permalink / raw)
  To: intel-gfx; +Cc: Matthew Auld

For example, we may want to split a 2MiB large page into multiple 64KiB
PTEs. To do so, we want to allow a vma that only has the 2MiB flag set
to utilise the 64KiB as required, i.e. we want to include all larger
pages as well.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Matthew Auld <matthew.auld@intel.com>
---
 drivers/gpu/drm/i915/i915_gem_gtt.c         |  4 ++--
 drivers/gpu/drm/i915/selftests/huge_pages.c | 17 +++++++++++------
 2 files changed, 13 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 19b2d991b5d8..9e1756216ada 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -1074,7 +1074,7 @@ static void gen8_ppgtt_insert_huge_entries(struct i915_vma *vma,
 		gen8_pte_t *vaddr;
 		u16 index, max;
 
-		if (vma->page_sizes.sg & I915_GTT_PAGE_SIZE_2M &&
+		if (vma->page_sizes.sg & -I915_GTT_PAGE_SIZE_2M &&
 		    IS_ALIGNED(iter->dma, I915_GTT_PAGE_SIZE_2M) &&
 		    rem >= I915_GTT_PAGE_SIZE_2M && !idx.pte) {
 			index = idx.pde;
@@ -1092,7 +1092,7 @@ static void gen8_ppgtt_insert_huge_entries(struct i915_vma *vma,
 			page_size = I915_GTT_PAGE_SIZE;
 
 			if (!index &&
-			    vma->page_sizes.sg & I915_GTT_PAGE_SIZE_64K &&
+			    vma->page_sizes.sg & -I915_GTT_PAGE_SIZE_64K &&
 			    IS_ALIGNED(iter->dma, I915_GTT_PAGE_SIZE_64K) &&
 			    (IS_ALIGNED(rem, I915_GTT_PAGE_SIZE_64K) ||
 			     rem >= (max - index) * I915_GTT_PAGE_SIZE))
diff --git a/drivers/gpu/drm/i915/selftests/huge_pages.c b/drivers/gpu/drm/i915/selftests/huge_pages.c
index 256001b00e32..2d66f380ad9a 100644
--- a/drivers/gpu/drm/i915/selftests/huge_pages.c
+++ b/drivers/gpu/drm/i915/selftests/huge_pages.c
@@ -508,6 +508,7 @@ static int igt_mock_ppgtt_misaligned_dma(void *arg)
 			goto out_unpin;
 		}
 
+		GEM_BUG_ON(vma->page_sizes.gtt);
 		err = i915_vma_pin(vma, 0, 0, flags);
 		if (err) {
 			i915_vma_close(vma);
@@ -517,8 +518,9 @@ static int igt_mock_ppgtt_misaligned_dma(void *arg)
 
 		err = igt_check_page_sizes(vma);
 
-		if (vma->page_sizes.gtt != page_size) {
-			pr_err("page_sizes.gtt=%u, expected %u\n",
+		if (!(vma->page_sizes.gtt & -page_size)) {
+			pr_err("%s:%d page_sizes.gtt=%u, expected %u\n",
+			       __func__, __LINE__,
 			       vma->page_sizes.gtt, page_size);
 			err = -EINVAL;
 		}
@@ -542,6 +544,7 @@ static int igt_mock_ppgtt_misaligned_dma(void *arg)
 				goto out_unpin;
 			}
 
+			GEM_BUG_ON(vma->page_sizes.gtt);
 			err = i915_vma_pin(vma, 0, 0, flags | offset);
 			if (err) {
 				i915_vma_close(vma);
@@ -550,8 +553,9 @@ static int igt_mock_ppgtt_misaligned_dma(void *arg)
 
 			err = igt_check_page_sizes(vma);
 
-			if (vma->page_sizes.gtt != I915_GTT_PAGE_SIZE_4K) {
-				pr_err("page_sizes.gtt=%u, expected %llu\n",
+			if (!(vma->page_sizes.gtt & -I915_GTT_PAGE_SIZE_4K)) {
+				pr_err("%s:%d page_sizes.gtt=%u, expected %llu\n",
+						__func__, __LINE__,
 				       vma->page_sizes.gtt, I915_GTT_PAGE_SIZE_4K);
 				err = -EINVAL;
 			}
@@ -1471,7 +1475,7 @@ static int igt_ppgtt_pin_update(void *arg)
 		if (err)
 			goto out_unpin;
 
-		if (vma->page_sizes.gtt != page_size) {
+		if (!(vma->page_sizes.gtt & -page_size)) {
 			dma_addr_t addr = i915_gem_object_get_dma_address(obj, 0);
 
 			/*
@@ -1481,7 +1485,8 @@ static int igt_ppgtt_pin_update(void *arg)
 			 * address.
 			 */
 			if (IS_ALIGNED(addr, page_size)) {
-				pr_err("page_sizes.gtt=%u, expected=%u\n",
+				pr_err("%s:%d page_sizes.gtt=%u, expected=%u\n",
+						__func__, __LINE__,
 				       vma->page_sizes.gtt, page_size);
 				err = -EINVAL;
 			} else {
-- 
2.19.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 8+ messages in thread

* ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gtt: Allow mixed pages to setup large PTE (rev2)
  2018-10-26 12:04 [PATCH] drm/i915/gtt: Allow mixed pages to setup large PTE Chris Wilson
  2018-10-26 13:04 ` ✗ Fi.CI.BAT: failure for " Patchwork
  2018-10-26 14:58 ` [PATCH] " Chris Wilson
@ 2018-10-26 15:44 ` Patchwork
  2018-10-26 16:13 ` ✓ Fi.CI.BAT: success " Patchwork
  2018-10-26 22:52 ` ✓ Fi.CI.IGT: " Patchwork
  4 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2018-10-26 15:44 UTC (permalink / raw)
  To: Chris Wilson; +Cc: intel-gfx

== Series Details ==

Series: drm/i915/gtt: Allow mixed pages to setup large PTE (rev2)
URL   : https://patchwork.freedesktop.org/series/51596/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
d26af29fb682 drm/i915/gtt: Allow mixed pages to setup large PTE
-:76: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#76: FILE: drivers/gpu/drm/i915/selftests/huge_pages.c:558:
+				pr_err("%s:%d page_sizes.gtt=%u, expected %llu\n",
+						__func__, __LINE__,

-:95: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#95: FILE: drivers/gpu/drm/i915/selftests/huge_pages.c:1489:
+				pr_err("%s:%d page_sizes.gtt=%u, expected=%u\n",
+						__func__, __LINE__,

total: 0 errors, 0 warnings, 2 checks, 69 lines checked

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 8+ messages in thread

* ✓ Fi.CI.BAT: success for drm/i915/gtt: Allow mixed pages to setup large PTE (rev2)
  2018-10-26 12:04 [PATCH] drm/i915/gtt: Allow mixed pages to setup large PTE Chris Wilson
                   ` (2 preceding siblings ...)
  2018-10-26 15:44 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gtt: Allow mixed pages to setup large PTE (rev2) Patchwork
@ 2018-10-26 16:13 ` Patchwork
  2018-10-26 22:52 ` ✓ Fi.CI.IGT: " Patchwork
  4 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2018-10-26 16:13 UTC (permalink / raw)
  To: Chris Wilson; +Cc: intel-gfx

== Series Details ==

Series: drm/i915/gtt: Allow mixed pages to setup large PTE (rev2)
URL   : https://patchwork.freedesktop.org/series/51596/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_5043 -> Patchwork_10604 =

== Summary - SUCCESS ==

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/51596/revisions/2/mbox/

== Known issues ==

  Here are the changes found in Patchwork_10604 that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@amdgpu/amd_basic@cs-compute:
      fi-kbl-8809g:       NOTRUN -> FAIL (fdo#108094)

    igt@amdgpu/amd_prime@amd-to-i915:
      fi-kbl-8809g:       NOTRUN -> FAIL (fdo#107341)

    igt@gem_exec_suspend@basic-s3:
      fi-kbl-soraka:      NOTRUN -> INCOMPLETE (fdo#107774, fdo#107556, fdo#107859)
      fi-blb-e6850:       PASS -> INCOMPLETE (fdo#107718)

    igt@kms_flip@basic-flip-vs-wf_vblank:
      fi-glk-j4005:       PASS -> FAIL (fdo#106724)

    
    ==== Possible fixes ====

    igt@kms_flip@basic-flip-vs-modeset:
      fi-glk-j4005:       DMESG-WARN (fdo#106000) -> PASS

    igt@kms_frontbuffer_tracking@basic:
      fi-byt-clapper:     FAIL (fdo#103167) -> PASS

    igt@prime_vgem@basic-fence-flip:
      fi-ilk-650:         FAIL (fdo#104008) -> PASS

    
  fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
  fdo#104008 https://bugs.freedesktop.org/show_bug.cgi?id=104008
  fdo#106000 https://bugs.freedesktop.org/show_bug.cgi?id=106000
  fdo#106724 https://bugs.freedesktop.org/show_bug.cgi?id=106724
  fdo#107341 https://bugs.freedesktop.org/show_bug.cgi?id=107341
  fdo#107556 https://bugs.freedesktop.org/show_bug.cgi?id=107556
  fdo#107718 https://bugs.freedesktop.org/show_bug.cgi?id=107718
  fdo#107774 https://bugs.freedesktop.org/show_bug.cgi?id=107774
  fdo#107859 https://bugs.freedesktop.org/show_bug.cgi?id=107859
  fdo#108094 https://bugs.freedesktop.org/show_bug.cgi?id=108094


== Participating hosts (48 -> 44) ==

  Additional (1): fi-kbl-soraka 
  Missing    (5): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 


== Build changes ==

    * Linux: CI_DRM_5043 -> Patchwork_10604

  CI_DRM_5043: 5ade7d36aae0a4236242249f9a721fdf805e43fe @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4698: af57164fcb16950187ad402ed31f565e88c42a78 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_10604: d26af29fb682791dfb94757eb20435e4274371fa @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

d26af29fb682 drm/i915/gtt: Allow mixed pages to setup large PTE

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10604/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH] drm/i915/gtt: Allow mixed pages to setup large PTE
  2018-10-26 14:58 ` [PATCH] " Chris Wilson
@ 2018-10-26 19:27   ` Matthew Auld
  2018-10-26 19:48     ` Chris Wilson
  0 siblings, 1 reply; 8+ messages in thread
From: Matthew Auld @ 2018-10-26 19:27 UTC (permalink / raw)
  To: Chris Wilson; +Cc: Intel Graphics Development, Matthew Auld

On Fri, 26 Oct 2018 at 16:16, Chris Wilson <chris@chris-wilson.co.uk> wrote:
>
> For example, we may want to split a 2MiB large page into multiple 64KiB
> PTEs. To do so, we want to allow a vma that only has the 2MiB flag set
> to utilise the 64KiB as required, i.e. we want to include all larger
> pages as well.

I thought if we have vma that only has the 2M flag, that can only mean
that 64K is not supported by the platform?

>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Matthew Auld <matthew.auld@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_gem_gtt.c         |  4 ++--
>  drivers/gpu/drm/i915/selftests/huge_pages.c | 17 +++++++++++------
>  2 files changed, 13 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index 19b2d991b5d8..9e1756216ada 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -1074,7 +1074,7 @@ static void gen8_ppgtt_insert_huge_entries(struct i915_vma *vma,
>                 gen8_pte_t *vaddr;
>                 u16 index, max;
>
> -               if (vma->page_sizes.sg & I915_GTT_PAGE_SIZE_2M &&
> +               if (vma->page_sizes.sg & -I915_GTT_PAGE_SIZE_2M &&
>                     IS_ALIGNED(iter->dma, I915_GTT_PAGE_SIZE_2M) &&
>                     rem >= I915_GTT_PAGE_SIZE_2M && !idx.pte) {
>                         index = idx.pde;
> @@ -1092,7 +1092,7 @@ static void gen8_ppgtt_insert_huge_entries(struct i915_vma *vma,
>                         page_size = I915_GTT_PAGE_SIZE;
>
>                         if (!index &&
> -                           vma->page_sizes.sg & I915_GTT_PAGE_SIZE_64K &&
> +                           vma->page_sizes.sg & -I915_GTT_PAGE_SIZE_64K &&

Yeah, so here what if the platform doesn't support 64K pages, but does
support say 2M, and the object is 2M + 64K or perhaps it's 2M but
somehow only aligned to 64K? I think we exercise something like that
for the mock device, or at least I hope we do.

>                             IS_ALIGNED(iter->dma, I915_GTT_PAGE_SIZE_64K) &&
>                             (IS_ALIGNED(rem, I915_GTT_PAGE_SIZE_64K) ||
>                              rem >= (max - index) * I915_GTT_PAGE_SIZE))
> diff --git a/drivers/gpu/drm/i915/selftests/huge_pages.c b/drivers/gpu/drm/i915/selftests/huge_pages.c
> index 256001b00e32..2d66f380ad9a 100644
> --- a/drivers/gpu/drm/i915/selftests/huge_pages.c
> +++ b/drivers/gpu/drm/i915/selftests/huge_pages.c
> @@ -508,6 +508,7 @@ static int igt_mock_ppgtt_misaligned_dma(void *arg)
>                         goto out_unpin;
>                 }
>
> +               GEM_BUG_ON(vma->page_sizes.gtt);
>                 err = i915_vma_pin(vma, 0, 0, flags);
>                 if (err) {
>                         i915_vma_close(vma);
> @@ -517,8 +518,9 @@ static int igt_mock_ppgtt_misaligned_dma(void *arg)
>
>                 err = igt_check_page_sizes(vma);
>
> -               if (vma->page_sizes.gtt != page_size) {
> -                       pr_err("page_sizes.gtt=%u, expected %u\n",
> +               if (!(vma->page_sizes.gtt & -page_size)) {
> +                       pr_err("%s:%d page_sizes.gtt=%u, expected %u\n",
> +                              __func__, __LINE__,
>                                vma->page_sizes.gtt, page_size);
>                         err = -EINVAL;
>                 }
> @@ -542,6 +544,7 @@ static int igt_mock_ppgtt_misaligned_dma(void *arg)
>                                 goto out_unpin;
>                         }
>
> +                       GEM_BUG_ON(vma->page_sizes.gtt);
>                         err = i915_vma_pin(vma, 0, 0, flags | offset);
>                         if (err) {
>                                 i915_vma_close(vma);
> @@ -550,8 +553,9 @@ static int igt_mock_ppgtt_misaligned_dma(void *arg)
>
>                         err = igt_check_page_sizes(vma);
>
> -                       if (vma->page_sizes.gtt != I915_GTT_PAGE_SIZE_4K) {
> -                               pr_err("page_sizes.gtt=%u, expected %llu\n",
> +                       if (!(vma->page_sizes.gtt & -I915_GTT_PAGE_SIZE_4K)) {
> +                               pr_err("%s:%d page_sizes.gtt=%u, expected %llu\n",
> +                                               __func__, __LINE__,
>                                        vma->page_sizes.gtt, I915_GTT_PAGE_SIZE_4K);
>                                 err = -EINVAL;
>                         }
> @@ -1471,7 +1475,7 @@ static int igt_ppgtt_pin_update(void *arg)
>                 if (err)
>                         goto out_unpin;
>
> -               if (vma->page_sizes.gtt != page_size) {
> +               if (!(vma->page_sizes.gtt & -page_size)) {
>                         dma_addr_t addr = i915_gem_object_get_dma_address(obj, 0);
>
>                         /*
> @@ -1481,7 +1485,8 @@ static int igt_ppgtt_pin_update(void *arg)
>                          * address.
>                          */
>                         if (IS_ALIGNED(addr, page_size)) {
> -                               pr_err("page_sizes.gtt=%u, expected=%u\n",
> +                               pr_err("%s:%d page_sizes.gtt=%u, expected=%u\n",
> +                                               __func__, __LINE__,
>                                        vma->page_sizes.gtt, page_size);
>                                 err = -EINVAL;
>                         } else {
> --
> 2.19.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
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^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH] drm/i915/gtt: Allow mixed pages to setup large PTE
  2018-10-26 19:27   ` Matthew Auld
@ 2018-10-26 19:48     ` Chris Wilson
  0 siblings, 0 replies; 8+ messages in thread
From: Chris Wilson @ 2018-10-26 19:48 UTC (permalink / raw)
  To: Matthew Auld; +Cc: Intel Graphics Development, Matthew Auld

Quoting Matthew Auld (2018-10-26 20:27:46)
> On Fri, 26 Oct 2018 at 16:16, Chris Wilson <chris@chris-wilson.co.uk> wrote:
> >
> > For example, we may want to split a 2MiB large page into multiple 64KiB
> > PTEs. To do so, we want to allow a vma that only has the 2MiB flag set
> > to utilise the 64KiB as required, i.e. we want to include all larger
> > pages as well.
> 
> I thought if we have vma that only has the 2M flag, that can only mean
> that 64K is not supported by the platform?

        obj->mm.page_sizes.sg = 0;
        for_each_set_bit(i, &supported, ilog2(I915_GTT_MAX_PAGE_SIZE) + 1) {
                if (obj->mm.page_sizes.phys & ~0u << i)
                        obj->mm.page_sizes.sg |= BIT(i);
        }

.sg should indeed be set for all supported bits upto the actual page size.

> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > Cc: Matthew Auld <matthew.auld@intel.com>
> > ---
> >  drivers/gpu/drm/i915/i915_gem_gtt.c         |  4 ++--
> >  drivers/gpu/drm/i915/selftests/huge_pages.c | 17 +++++++++++------
> >  2 files changed, 13 insertions(+), 8 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> > index 19b2d991b5d8..9e1756216ada 100644
> > --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> > +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> > @@ -1074,7 +1074,7 @@ static void gen8_ppgtt_insert_huge_entries(struct i915_vma *vma,
> >                 gen8_pte_t *vaddr;
> >                 u16 index, max;
> >
> > -               if (vma->page_sizes.sg & I915_GTT_PAGE_SIZE_2M &&
> > +               if (vma->page_sizes.sg & -I915_GTT_PAGE_SIZE_2M &&
> >                     IS_ALIGNED(iter->dma, I915_GTT_PAGE_SIZE_2M) &&
> >                     rem >= I915_GTT_PAGE_SIZE_2M && !idx.pte) {
> >                         index = idx.pde;
> > @@ -1092,7 +1092,7 @@ static void gen8_ppgtt_insert_huge_entries(struct i915_vma *vma,
> >                         page_size = I915_GTT_PAGE_SIZE;
> >
> >                         if (!index &&
> > -                           vma->page_sizes.sg & I915_GTT_PAGE_SIZE_64K &&
> > +                           vma->page_sizes.sg & -I915_GTT_PAGE_SIZE_64K &&
> 
> Yeah, so here what if the platform doesn't support 64K pages, but does
> support say 2M, and the object is 2M + 64K or perhaps it's 2M but
> somehow only aligned to 64K? I think we exercise something like that
> for the mock device, or at least I hope we do.

I'm just not having fun with scratch atm.
-Chris
_______________________________________________
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^ permalink raw reply	[flat|nested] 8+ messages in thread

* ✓ Fi.CI.IGT: success for drm/i915/gtt: Allow mixed pages to setup large PTE (rev2)
  2018-10-26 12:04 [PATCH] drm/i915/gtt: Allow mixed pages to setup large PTE Chris Wilson
                   ` (3 preceding siblings ...)
  2018-10-26 16:13 ` ✓ Fi.CI.BAT: success " Patchwork
@ 2018-10-26 22:52 ` Patchwork
  4 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2018-10-26 22:52 UTC (permalink / raw)
  To: Chris Wilson; +Cc: intel-gfx

== Series Details ==

Series: drm/i915/gtt: Allow mixed pages to setup large PTE (rev2)
URL   : https://patchwork.freedesktop.org/series/51596/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_5043_full -> Patchwork_10604_full =

== Summary - WARNING ==

  Minor unknown changes coming with Patchwork_10604_full need to be verified
  manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_10604_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

== Possible new issues ==

  Here are the unknown changes that may have been introduced in Patchwork_10604_full:

  === IGT changes ===

    ==== Warnings ====

    igt@pm_rc6_residency@rc6-accuracy:
      shard-snb:          SKIP -> PASS

    
== Known issues ==

  Here are the changes found in Patchwork_10604_full that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@gem_ctx_isolation@bcs0-s3:
      shard-kbl:          PASS -> INCOMPLETE (fdo#103665) +1

    igt@gem_exec_schedule@pi-ringfull-blt:
      shard-skl:          NOTRUN -> FAIL (fdo#103158)

    igt@kms_available_modes_crc@available_mode_test_crc:
      shard-apl:          PASS -> FAIL (fdo#106641)

    igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-b:
      shard-skl:          NOTRUN -> DMESG-WARN (fdo#107956)

    igt@kms_color@pipe-b-ctm-max:
      shard-apl:          PASS -> DMESG-WARN (fdo#108549) +24

    igt@kms_cursor_crc@cursor-128x128-random:
      shard-apl:          PASS -> FAIL (fdo#103232)

    igt@kms_cursor_crc@cursor-128x128-suspend:
      shard-apl:          PASS -> DMESG-FAIL (fdo#103232, fdo#108549)

    igt@kms_cursor_crc@cursor-128x42-offscreen:
      shard-apl:          PASS -> INCOMPLETE (fdo#103927) +1

    igt@kms_cursor_crc@cursor-64x21-offscreen:
      shard-skl:          NOTRUN -> FAIL (fdo#103232)

    igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic:
      shard-hsw:          PASS -> FAIL (fdo#105767)

    igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
      shard-glk:          PASS -> FAIL (fdo#105363)

    igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-pwrite:
      shard-apl:          PASS -> FAIL (fdo#103167) +1

    igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt:
      shard-kbl:          PASS -> FAIL (fdo#103167)

    igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-pwrite:
      shard-glk:          PASS -> FAIL (fdo#103167) +1

    igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max:
      shard-skl:          NOTRUN -> FAIL (fdo#108145)

    igt@kms_plane_alpha_blend@pipe-c-alpha-7efc:
      shard-skl:          NOTRUN -> FAIL (fdo#108145, fdo#107815)

    igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
      shard-skl:          PASS -> FAIL (fdo#107815)

    igt@kms_plane_multiple@atomic-pipe-a-tiling-y:
      shard-apl:          PASS -> FAIL (fdo#103166) +1

    igt@kms_plane_multiple@atomic-pipe-c-tiling-y:
      shard-skl:          NOTRUN -> FAIL (fdo#103166, fdo#107815)

    igt@kms_vblank@pipe-c-ts-continuation-dpms-rpm:
      shard-apl:          PASS -> DMESG-FAIL (fdo#108549)

    igt@pm_rpm@gem-execbuf:
      shard-skl:          PASS -> INCOMPLETE (fdo#107803, fdo#107807)

    igt@prime_busy@hang-bsd:
      shard-glk:          PASS -> INCOMPLETE (k.org#198133, fdo#103359)

    
    ==== Possible fixes ====

    igt@drv_suspend@shrink:
      shard-kbl:          INCOMPLETE (fdo#103665, fdo#106886) -> PASS

    igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-a:
      shard-kbl:          DMESG-WARN (fdo#107956) -> PASS

    igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-c:
      shard-glk:          DMESG-WARN (fdo#107956) -> PASS

    igt@kms_cursor_crc@cursor-256x85-onscreen:
      shard-apl:          FAIL (fdo#103232) -> PASS +3

    igt@kms_cursor_crc@cursor-64x64-suspend:
      shard-apl:          FAIL (fdo#103232, fdo#103191) -> PASS

    igt@kms_flip@flip-vs-expired-vblank-interruptible:
      shard-skl:          FAIL (fdo#105363) -> PASS

    igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-gtt:
      shard-apl:          FAIL (fdo#103167) -> PASS +2

    igt@kms_frontbuffer_tracking@fbc-1p-rte:
      shard-apl:          FAIL (fdo#103167, fdo#105682) -> PASS

    igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-onoff:
      shard-glk:          FAIL (fdo#103167) -> PASS

    igt@kms_frontbuffer_tracking@fbc-suspend:
      shard-skl:          INCOMPLETE (fdo#104108, fdo#105959) -> PASS

    igt@kms_plane@plane-position-covered-pipe-a-planes:
      shard-glk:          FAIL (fdo#103166) -> PASS

    igt@kms_plane_multiple@atomic-pipe-a-tiling-x:
      shard-apl:          FAIL (fdo#103166) -> PASS +3

    igt@kms_setmode@basic:
      shard-apl:          FAIL (fdo#99912) -> PASS

    
    ==== Warnings ====

    igt@kms_cursor_crc@cursor-128x42-sliding:
      shard-apl:          FAIL (fdo#103232) -> DMESG-FAIL (fdo#103232, fdo#108549)

    igt@kms_cursor_crc@cursor-256x256-dpms:
      shard-apl:          DMESG-WARN (fdo#108549) -> DMESG-FAIL (fdo#103232, fdo#108549)

    igt@kms_cursor_crc@cursor-64x64-sliding:
      shard-apl:          DMESG-FAIL (fdo#103232, fdo#108549) -> FAIL (fdo#103232)

    igt@kms_plane_multiple@atomic-pipe-c-tiling-x:
      shard-apl:          FAIL (fdo#103166) -> DMESG-WARN (fdo#108549)

    
  fdo#103158 https://bugs.freedesktop.org/show_bug.cgi?id=103158
  fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166
  fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
  fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191
  fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232
  fdo#103359 https://bugs.freedesktop.org/show_bug.cgi?id=103359
  fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665
  fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927
  fdo#104108 https://bugs.freedesktop.org/show_bug.cgi?id=104108
  fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363
  fdo#105682 https://bugs.freedesktop.org/show_bug.cgi?id=105682
  fdo#105767 https://bugs.freedesktop.org/show_bug.cgi?id=105767
  fdo#105959 https://bugs.freedesktop.org/show_bug.cgi?id=105959
  fdo#106641 https://bugs.freedesktop.org/show_bug.cgi?id=106641
  fdo#106886 https://bugs.freedesktop.org/show_bug.cgi?id=106886
  fdo#107803 https://bugs.freedesktop.org/show_bug.cgi?id=107803
  fdo#107807 https://bugs.freedesktop.org/show_bug.cgi?id=107807
  fdo#107815 https://bugs.freedesktop.org/show_bug.cgi?id=107815
  fdo#107956 https://bugs.freedesktop.org/show_bug.cgi?id=107956
  fdo#108145 https://bugs.freedesktop.org/show_bug.cgi?id=108145
  fdo#108549 https://bugs.freedesktop.org/show_bug.cgi?id=108549
  fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912
  k.org#198133 https://bugzilla.kernel.org/show_bug.cgi?id=198133


== Participating hosts (6 -> 6) ==

  No changes in participating hosts


== Build changes ==

    * Linux: CI_DRM_5043 -> Patchwork_10604

  CI_DRM_5043: 5ade7d36aae0a4236242249f9a721fdf805e43fe @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4698: af57164fcb16950187ad402ed31f565e88c42a78 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_10604: d26af29fb682791dfb94757eb20435e4274371fa @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10604/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 8+ messages in thread

end of thread, other threads:[~2018-10-26 22:52 UTC | newest]

Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-10-26 12:04 [PATCH] drm/i915/gtt: Allow mixed pages to setup large PTE Chris Wilson
2018-10-26 13:04 ` ✗ Fi.CI.BAT: failure for " Patchwork
2018-10-26 14:58 ` [PATCH] " Chris Wilson
2018-10-26 19:27   ` Matthew Auld
2018-10-26 19:48     ` Chris Wilson
2018-10-26 15:44 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gtt: Allow mixed pages to setup large PTE (rev2) Patchwork
2018-10-26 16:13 ` ✓ Fi.CI.BAT: success " Patchwork
2018-10-26 22:52 ` ✓ Fi.CI.IGT: " Patchwork

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