From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 805E8C46475 for ; Mon, 29 Oct 2018 07:26:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 442AC2080A for ; Mon, 29 Oct 2018 07:26:24 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=alliedtelesis.co.nz header.i=@alliedtelesis.co.nz header.b="ti/GPx/+" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 442AC2080A Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=alliedtelesis.co.nz Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729492AbeJ2QNr (ORCPT ); Mon, 29 Oct 2018 12:13:47 -0400 Received: from gate2.alliedtelesis.co.nz ([202.36.163.20]:51839 "EHLO gate2.alliedtelesis.co.nz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729428AbeJ2QN0 (ORCPT ); Mon, 29 Oct 2018 12:13:26 -0400 Received: from mmarshal3.atlnz.lc (mmarshal3.atlnz.lc [10.32.18.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by gate2.alliedtelesis.co.nz (Postfix) with ESMTPS id 483EA89154; Mon, 29 Oct 2018 20:25:54 +1300 (NZDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alliedtelesis.co.nz; s=mail181024; t=1540797954; bh=mTaA5V5SDbaoUTifccvwBOpV2UZw2RIkrTYYv2E8CzU=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=ti/GPx/+sPNdfPV4aeEcmJoy2L3jDrK2eG2473W7ggqSdJwEyauAJIgB06TYvG3ad Dz/iTiFy10J9eeCeJos+/ng8uPF24/KcoJj1CR8aqUVwr7HmpbdLf1UZRcbBYj8+ef kceeowpuONNqdw0ymn4DaL3B6uDOYDKshUcwiK05zrdAhhvN8zldr7HYYTiay8/Osl +QKdiYdTtszKMv9oajUmZeODtUnRiQsFRtJbAwz0IiqPj10RS8b5b42Vm58AjlaiPw eYBDWbsvcGWqHf4sdw9Y7gfwuWoquP9aeuvghKDp35m8M7vepuz2wGUMge4ef6TgRH 2iiRRlT1cxcTw== Received: from smtp (Not Verified[10.32.16.33]) by mmarshal3.atlnz.lc with Trustwave SEG (v7,5,8,10121) id ; Mon, 29 Oct 2018 20:25:53 +1300 Received: from chrisp-dl.ws.atlnz.lc (chrisp-dl.ws.atlnz.lc [10.33.22.30]) by smtp (Postfix) with ESMTP id 5DC7913EF8E; Mon, 29 Oct 2018 20:25:53 +1300 (NZDT) Received: by chrisp-dl.ws.atlnz.lc (Postfix, from userid 1030) id 844A31E21FF; Mon, 29 Oct 2018 20:25:48 +1300 (NZDT) From: Chris Packham To: linux@armlinux.org.uk Cc: u.kleine-koenig@pengutronix.de, jlu@pengutronix.de, bp@alien8.de, linux-arm-kernel@lists.infradead.org, linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org, Chris Packham Subject: [PATCH v5 2/8] ARM: aurora-l2: add prefix to MAX_RANGE_SIZE Date: Mon, 29 Oct 2018 20:25:29 +1300 Message-Id: <20181029072535.31667-3-chris.packham@alliedtelesis.co.nz> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181029072535.31667-1-chris.packham@alliedtelesis.co.nz> References: <20181029072535.31667-1-chris.packham@alliedtelesis.co.nz> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable x-atlnz-ls: pat Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Jan Luebbe The macro name is too generic, so add a AURORA_ prefix. Signed-off-by: Jan Luebbe Reviewed-by: Gregory CLEMENT Signed-off-by: Chris Packham --- =20arch/arm/include/asm/hardware/cache-aurora-l2.h | 2 +- =20arch/arm/mm/cache-l2x0.c | 4 ++-- =202 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/include/asm/hardware/cache-aurora-l2.h b/arch/arm/i= nclude/asm/hardware/cache-aurora-l2.h index c86124769831..dc5c479ec4c3 100644 --- a/arch/arm/include/asm/hardware/cache-aurora-l2.h +++ b/arch/arm/include/asm/hardware/cache-aurora-l2.h @@ -41,7 +41,7 @@ =20#define AURORA_ACR_FORCE_WRITE_THRO_POLICY \ =20 (2 << AURORA_ACR_FORCE_WRITE_POLICY_OFFSET) =20 -#define MAX_RANGE_SIZE 1024 +#define AURORA_MAX_RANGE_SIZE 1024 =20 =20#define AURORA_WAY_SIZE_SHIFT 2 =20 diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c index a00d6f7fd34c..7d2d2a3c67d0 100644 --- a/arch/arm/mm/cache-l2x0.c +++ b/arch/arm/mm/cache-l2x0.c @@ -1364,8 +1364,8 @@ static unsigned long aurora_range_end(unsigned long= =20start, unsigned long end) =20 * since cache range operations stall the CPU pipeline =20 * until completion. =20 */ - if (end > start + MAX_RANGE_SIZE) - end =3D start + MAX_RANGE_SIZE; + if (end > start + AURORA_MAX_RANGE_SIZE) + end =3D start + AURORA_MAX_RANGE_SIZE; =20 =20 /* =20 * Cache range operations can't straddle a page boundary. --=20 2.19.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Subject: [v5,2/8] ARM: aurora-l2: add prefix to MAX_RANGE_SIZE From: Chris Packham Message-Id: <20181029072535.31667-3-chris.packham@alliedtelesis.co.nz> Date: Mon, 29 Oct 2018 20:25:29 +1300 To: linux@armlinux.org.uk Cc: u.kleine-koenig@pengutronix.de, jlu@pengutronix.de, bp@alien8.de, linux-arm-kernel@lists.infradead.org, linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org, Chris Packham List-ID: RnJvbTogSmFuIEx1ZWJiZSA8amx1QHBlbmd1dHJvbml4LmRlPgoKVGhlIG1hY3JvIG5hbWUgaXMg dG9vIGdlbmVyaWMsIHNvIGFkZCBhIEFVUk9SQV8gcHJlZml4LgoKU2lnbmVkLW9mZi1ieTogSmFu IEx1ZWJiZSA8amx1QHBlbmd1dHJvbml4LmRlPgpSZXZpZXdlZC1ieTogR3JlZ29yeSBDTEVNRU5U IDxncmVnb3J5LmNsZW1lbnRAZnJlZS1lbGVjdHJvbnMuY29tPgpTaWduZWQtb2ZmLWJ5OiBDaHJp cyBQYWNraGFtIDxjaHJpcy5wYWNraGFtQGFsbGllZHRlbGVzaXMuY28ubno+Ci0tLQogYXJjaC9h cm0vaW5jbHVkZS9hc20vaGFyZHdhcmUvY2FjaGUtYXVyb3JhLWwyLmggfCAyICstCiBhcmNoL2Fy bS9tbS9jYWNoZS1sMngwLmMgICAgICAgICAgICAgICAgICAgICAgICB8IDQgKystLQogMiBmaWxl cyBjaGFuZ2VkLCAzIGluc2VydGlvbnMoKyksIDMgZGVsZXRpb25zKC0pCgpkaWZmIC0tZ2l0IGEv YXJjaC9hcm0vaW5jbHVkZS9hc20vaGFyZHdhcmUvY2FjaGUtYXVyb3JhLWwyLmggYi9hcmNoL2Fy bS9pbmNsdWRlL2FzbS9oYXJkd2FyZS9jYWNoZS1hdXJvcmEtbDIuaAppbmRleCBjODYxMjQ3Njk4 MzEuLmRjNWM0NzllYzRjMyAxMDA2NDQKLS0tIGEvYXJjaC9hcm0vaW5jbHVkZS9hc20vaGFyZHdh cmUvY2FjaGUtYXVyb3JhLWwyLmgKKysrIGIvYXJjaC9hcm0vaW5jbHVkZS9hc20vaGFyZHdhcmUv Y2FjaGUtYXVyb3JhLWwyLmgKQEAgLTQxLDcgKzQxLDcgQEAKICNkZWZpbmUgQVVST1JBX0FDUl9G T1JDRV9XUklURV9USFJPX1BPTElDWQlcCiAJKDIgPDwgQVVST1JBX0FDUl9GT1JDRV9XUklURV9Q T0xJQ1lfT0ZGU0VUKQogCi0jZGVmaW5lIE1BWF9SQU5HRV9TSVpFCQkxMDI0CisjZGVmaW5lIEFV Uk9SQV9NQVhfUkFOR0VfU0laRQkxMDI0CiAKICNkZWZpbmUgQVVST1JBX1dBWV9TSVpFX1NISUZU CTIKIApkaWZmIC0tZ2l0IGEvYXJjaC9hcm0vbW0vY2FjaGUtbDJ4MC5jIGIvYXJjaC9hcm0vbW0v Y2FjaGUtbDJ4MC5jCmluZGV4IGEwMGQ2ZjdmZDM0Yy4uN2QyZDJhM2M2N2QwIDEwMDY0NAotLS0g YS9hcmNoL2FybS9tbS9jYWNoZS1sMngwLmMKKysrIGIvYXJjaC9hcm0vbW0vY2FjaGUtbDJ4MC5j CkBAIC0xMzY0LDggKzEzNjQsOCBAQCBzdGF0aWMgdW5zaWduZWQgbG9uZyBhdXJvcmFfcmFuZ2Vf ZW5kKHVuc2lnbmVkIGxvbmcgc3RhcnQsIHVuc2lnbmVkIGxvbmcgZW5kKQogCSAqIHNpbmNlIGNh Y2hlIHJhbmdlIG9wZXJhdGlvbnMgc3RhbGwgdGhlIENQVSBwaXBlbGluZQogCSAqIHVudGlsIGNv bXBsZXRpb24uCiAJICovCi0JaWYgKGVuZCA+IHN0YXJ0ICsgTUFYX1JBTkdFX1NJWkUpCi0JCWVu ZCA9IHN0YXJ0ICsgTUFYX1JBTkdFX1NJWkU7CisJaWYgKGVuZCA+IHN0YXJ0ICsgQVVST1JBX01B WF9SQU5HRV9TSVpFKQorCQllbmQgPSBzdGFydCArIEFVUk9SQV9NQVhfUkFOR0VfU0laRTsKIAog CS8qCiAJICogQ2FjaGUgcmFuZ2Ugb3BlcmF0aW9ucyBjYW4ndCBzdHJhZGRsZSBhIHBhZ2UgYm91 bmRhcnkuCg== From mboxrd@z Thu Jan 1 00:00:00 1970 From: chris.packham@alliedtelesis.co.nz (Chris Packham) Date: Mon, 29 Oct 2018 20:25:29 +1300 Subject: [PATCH v5 2/8] ARM: aurora-l2: add prefix to MAX_RANGE_SIZE In-Reply-To: <20181029072535.31667-1-chris.packham@alliedtelesis.co.nz> References: <20181029072535.31667-1-chris.packham@alliedtelesis.co.nz> Message-ID: <20181029072535.31667-3-chris.packham@alliedtelesis.co.nz> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org From: Jan Luebbe The macro name is too generic, so add a AURORA_ prefix. Signed-off-by: Jan Luebbe Reviewed-by: Gregory CLEMENT Signed-off-by: Chris Packham --- arch/arm/include/asm/hardware/cache-aurora-l2.h | 2 +- arch/arm/mm/cache-l2x0.c | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/include/asm/hardware/cache-aurora-l2.h b/arch/arm/include/asm/hardware/cache-aurora-l2.h index c86124769831..dc5c479ec4c3 100644 --- a/arch/arm/include/asm/hardware/cache-aurora-l2.h +++ b/arch/arm/include/asm/hardware/cache-aurora-l2.h @@ -41,7 +41,7 @@ #define AURORA_ACR_FORCE_WRITE_THRO_POLICY \ (2 << AURORA_ACR_FORCE_WRITE_POLICY_OFFSET) -#define MAX_RANGE_SIZE 1024 +#define AURORA_MAX_RANGE_SIZE 1024 #define AURORA_WAY_SIZE_SHIFT 2 diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c index a00d6f7fd34c..7d2d2a3c67d0 100644 --- a/arch/arm/mm/cache-l2x0.c +++ b/arch/arm/mm/cache-l2x0.c @@ -1364,8 +1364,8 @@ static unsigned long aurora_range_end(unsigned long start, unsigned long end) * since cache range operations stall the CPU pipeline * until completion. */ - if (end > start + MAX_RANGE_SIZE) - end = start + MAX_RANGE_SIZE; + if (end > start + AURORA_MAX_RANGE_SIZE) + end = start + AURORA_MAX_RANGE_SIZE; /* * Cache range operations can't straddle a page boundary. -- 2.19.1