All of lore.kernel.org
 help / color / mirror / Atom feed
From: Manasi Navare <manasi.d.navare@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [CI 1/7] drm/i915/dsc: Add slice_row_per_frame in DSC PPS programming
Date: Tue, 30 Oct 2018 17:19:17 -0700	[thread overview]
Message-ID: <20181031001923.31442-1-manasi.d.navare@intel.com> (raw)

From: Anusha Srivatsa <anusha.srivatsa@intel.com>

Add the newly added slice_row_per_frame parameter
in the Picture Parameter Set registers.
This defines the number of vertically stacked slices
in a frame.

Credits to Manasi for noticing bSpec change.

Suggested-by: Manasi Navare <manasi.d.navare@intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index bcee91bcfba6..05e296d04a60 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -10934,6 +10934,7 @@ enum skl_power_gate {
 #define ICL_DSC1_PICTURE_PARAMETER_SET_16(pipe)	_MMIO_PIPE((pipe) - PIPE_B, \
 							   _ICL_DSC1_PICTURE_PARAMETER_SET_16_PB, \
 							   _ICL_DSC1_PICTURE_PARAMETER_SET_16_PC)
+#define  DSC_SLICE_ROW_PER_FRAME(slice_row_per_frame)	((slice_row_per_frame) << 20)
 #define  DSC_SLICE_PER_LINE(slice_per_line)		((slice_per_line) << 16)
 #define  DSC_SLICE_CHUNK_SIZE(slice_chunk_size)		((slice_chunk_size) << 0)
 
-- 
2.18.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

             reply	other threads:[~2018-10-31  0:16 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-10-31  0:19 Manasi Navare [this message]
2018-10-31  0:19 ` [CI 2/7] drm/dp: Add DP DSC DPCD receiver capability size define and missing SHIFT Manasi Navare
2018-10-31  0:19 ` [CI 3/7] drm/i915/dp: Cache the DP/eDP DSC DPCD register set on Hotplug/eDP Init Manasi Navare
2018-10-31  0:19 ` [CI 4/7] drm/dp: DRM DP helper/macros to get DP sink DSC parameters Manasi Navare
2018-10-31  0:19 ` [CI 5/7] drm/i915/dp: Add helpers for Compressed BPP and Slice Count for DSC Manasi Navare
2018-10-31  0:19 ` [CI 6/7] drm/i915/dp: Validate modes using max Output BPP and slice count when DSC supported Manasi Navare
2018-10-31  0:19 ` [CI 7/7] drm/dp: Define payload size for DP SDP PPS packet Manasi Navare
2018-10-31  9:20 ` ✗ Fi.CI.SPARSE: warning for series starting with [CI,1/7] drm/i915/dsc: Add slice_row_per_frame in DSC PPS programming Patchwork
2018-10-31  9:34 ` ✓ Fi.CI.BAT: success " Patchwork
2018-10-31 11:07 ` ✓ Fi.CI.IGT: " Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2018-10-29 21:47 [CI 1/7] " Manasi Navare
2018-10-25 22:47 Manasi Navare

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20181031001923.31442-1-manasi.d.navare@intel.com \
    --to=manasi.d.navare@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.