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From: Marcel Ziswiler <marcel@ziswiler.com>
To: linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>,
	Thierry Reding <thierry.reding@gmail.com>,
	Jiri Slaby <jslaby@suse.com>,
	Jonathan Hunter <jonathanh@nvidia.com>,
	linux-serial@vger.kernel.org,
	Laxman Dewangan <ldewangan@nvidia.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Subject: [PATCH v1 3/3] serial: tegra: fix some spelling mistakes
Date: Thu,  1 Nov 2018 02:52:30 +0100	[thread overview]
Message-ID: <20181101015230.27310-4-marcel@ziswiler.com> (raw)
In-Reply-To: <20181101015230.27310-1-marcel@ziswiler.com>

From: Marcel Ziswiler <marcel.ziswiler@toradex.com>

Fix a few spelling mistakes I stumbled upon while debugging a customers
UART issues.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>

---

 drivers/tty/serial/serial-tegra.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/tty/serial/serial-tegra.c b/drivers/tty/serial/serial-tegra.c
index af2a29cfbbe9..d5269aaaf9b2 100644
--- a/drivers/tty/serial/serial-tegra.c
+++ b/drivers/tty/serial/serial-tegra.c
@@ -746,7 +746,7 @@ static void tegra_uart_stop_rx(struct uart_port *u)
 	if (!tup->rx_in_progress)
 		return;
 
-	tegra_uart_wait_sym_time(tup, 1); /* wait a character interval */
+	tegra_uart_wait_sym_time(tup, 1); /* wait one character interval */
 
 	ier = tup->ier_shadow;
 	ier &= ~(UART_IER_RDI | UART_IER_RLSI | UART_IER_RTOIE |
@@ -887,7 +887,7 @@ static int tegra_uart_hw_init(struct tegra_uart_port *tup)
 	 *
 	 * EORD is different interrupt than RX_TIMEOUT - RX_TIMEOUT occurs when
 	 * the DATA is sitting in the FIFO and couldn't be transferred to the
-	 * DMA as the DMA size alignment(4 bytes) is not met. EORD will be
+	 * DMA as the DMA size alignment (4 bytes) is not met. EORD will be
 	 * triggered when there is a pause of the incomming data stream for 4
 	 * characters long.
 	 *
@@ -1079,7 +1079,7 @@ static void tegra_uart_set_termios(struct uart_port *u,
 	if (tup->rts_active)
 		set_rts(tup, false);
 
-	/* Clear all interrupts as configuration is going to be change */
+	/* Clear all interrupts as configuration is going to be changed */
 	tegra_uart_write(tup, tup->ier_shadow | UART_IER_RDI, UART_IER);
 	tegra_uart_read(tup, UART_IER);
 	tegra_uart_write(tup, 0, UART_IER);
@@ -1165,10 +1165,10 @@ static void tegra_uart_set_termios(struct uart_port *u,
 	/* update the port timeout based on new settings */
 	uart_update_timeout(u, termios->c_cflag, baud);
 
-	/* Make sure all write has completed */
+	/* Make sure all writes have completed */
 	tegra_uart_read(tup, UART_IER);
 
-	/* Reenable interrupt */
+	/* Re-enable interrupt */
 	tegra_uart_write(tup, tup->ier_shadow, UART_IER);
 	tegra_uart_read(tup, UART_IER);
 
-- 
2.14.5

  parent reply	other threads:[~2018-11-01  1:52 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-11-01  1:52 [PATCH v1 0/3] clk/serial tegra: uart related fixes Marcel Ziswiler
2018-11-01  1:52 ` [PATCH v1 1/3] clk: tegra: get rid of duplicate defines Marcel Ziswiler
2018-11-28  9:17   ` Thierry Reding
2018-12-10 19:10   ` Stephen Boyd
2018-11-01  1:52 ` [PATCH v1 2/3] clk: tegra: ignore unused vfir clock shared with uartb Marcel Ziswiler
2018-11-01  8:41   ` Peter De Schrijver
2018-11-01  8:41     ` Peter De Schrijver
2018-11-28  9:24     ` Thierry Reding
2018-12-10 21:41       ` Marcel Ziswiler
2018-11-01  1:52 ` Marcel Ziswiler [this message]
2018-11-28  9:20   ` [PATCH v1 3/3] serial: tegra: fix some spelling mistakes Thierry Reding

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