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From: Matt Roper <matthew.d.roper@intel.com>
To: Uma Shankar <uma.shankar@intel.com>
Cc: dcastagna@chromium.org, intel-gfx@lists.freedesktop.org,
	alexandru-cosmin.gheorghe@arm.com,
	dri-devel@lists.freedesktop.org, seanpaul@chromium.org,
	ville.syrjala@intel.com, maarten.lankhorst@intel.com
Subject: Re: [Intel-gfx] [RFC v5 1/8] drm: Add Enhanced Gamma LUT precision structure
Date: Mon, 5 Nov 2018 10:17:19 -0800	[thread overview]
Message-ID: <20181105181719.GB5732@mdroper-desk.amr.corp.intel.com> (raw)
In-Reply-To: <1537085731-6355-2-git-send-email-uma.shankar@intel.com>

On Sun, Sep 16, 2018 at 01:45:24PM +0530, Uma Shankar wrote:
> Existing LUT precision structure is having only 16 bit
> precision. This is not enough for upcoming enhanced hardwares
> and advance usecases like HDR processing. Hence added a new
> structure with 32 bit precision values. Also added the code,
> for extracting the same from values passed from userspace.
> 
> v4: Rebase
> 
> v5: Relocated the helper function to drm_color_mgmt.c. Declared
> the same in a header file (Alexandru Gheorghe)
> 
> Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> Reviewed-by: Alexandru Gheorghe <alexandru-cosmin.gheorghe@arm.com>
> ---
>  drivers/gpu/drm/drm_color_mgmt.c | 19 +++++++++++++++++++
>  include/drm/drm_color_mgmt.h     |  1 +
>  include/uapi/drm/drm_mode.h      | 15 +++++++++++++++
>  3 files changed, 35 insertions(+)
> 
> diff --git a/drivers/gpu/drm/drm_color_mgmt.c b/drivers/gpu/drm/drm_color_mgmt.c
> index b97e2de..1bdcc1a 100644
> --- a/drivers/gpu/drm/drm_color_mgmt.c
> +++ b/drivers/gpu/drm/drm_color_mgmt.c
> @@ -128,6 +128,25 @@ uint32_t drm_color_lut_extract(uint32_t user_input, uint32_t bit_precision)
>  }
>  EXPORT_SYMBOL(drm_color_lut_extract);
>  
> +/*
> + * Added to accommodate enhanced LUT precision.
> + * Max LUT precision is 32 bits.
> + */
> +uint32_t drm_color_lut_extract_ext(uint32_t user_input, uint32_t bit_precision)
> +{
> +	uint32_t val = user_input;
> +	uint32_t max = 0xffffffff >> (32 - bit_precision);
> +
> +	/* Round only if we're not using full precision. */
> +	if (bit_precision < 32) {
> +		val += 1UL << (32 - bit_precision - 1);

Does val need to be a 64-bit type to prevent this from overflowing?


Matt

> +		val >>= 32 - bit_precision;
> +	}
> +
> +	return clamp_val(val, 0, max);
> +}
> +EXPORT_SYMBOL(drm_color_lut_extract_ext);
> +
>  /**
>   * drm_crtc_enable_color_mgmt - enable color management properties
>   * @crtc: DRM CRTC
> diff --git a/include/drm/drm_color_mgmt.h b/include/drm/drm_color_mgmt.h
> index 44f04233..78b5a37 100644
> --- a/include/drm/drm_color_mgmt.h
> +++ b/include/drm/drm_color_mgmt.h
> @@ -29,6 +29,7 @@
>  struct drm_plane;
>  
>  uint32_t drm_color_lut_extract(uint32_t user_input, uint32_t bit_precision);
> +uint32_t drm_color_lut_extract_ext(uint32_t user_input, uint32_t bit_precision);
>  
>  void drm_crtc_enable_color_mgmt(struct drm_crtc *crtc,
>  				uint degamma_lut_size,
> diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
> index 8d67243..874407b 100644
> --- a/include/uapi/drm/drm_mode.h
> +++ b/include/uapi/drm/drm_mode.h
> @@ -629,6 +629,21 @@ struct drm_color_lut {
>  	__u16 reserved;
>  };
>  
> +/*
> + * Creating 32 bit palette entries for better data
> + * precision. This will be required for HDR and
> + * similar color processing usecases.
> + */
> +struct drm_color_lut_ext {
> +	/*
> +	 * Data is U0.32 fixed point format.
> +	 */
> +	__u32 red;
> +	__u32 green;
> +	__u32 blue;
> +	__u32 reserved;
> +};
> +
>  #define DRM_MODE_PAGE_FLIP_EVENT 0x01
>  #define DRM_MODE_PAGE_FLIP_ASYNC 0x02
>  #define DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE 0x4
> -- 
> 1.9.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Matt Roper
Graphics Software Engineer
IoTG Platform Enabling & Development
Intel Corporation
(916) 356-2795
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

  reply	other threads:[~2018-11-05 18:17 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-09-16  8:15 [RFC v5 0/8] Add Plane Color Properties Uma Shankar
2018-09-16  8:15 ` [RFC v5 1/8] drm: Add Enhanced Gamma LUT precision structure Uma Shankar
2018-11-05 18:17   ` Matt Roper [this message]
2018-11-06  9:03   ` [Intel-gfx] " Daniel Vetter
2018-09-16  8:15 ` [RFC v5 2/8] drm: Add Plane Degamma properties Uma Shankar
2018-09-18 16:08   ` Alexandru-Cosmin Gheorghe
2018-11-14  1:08   ` Matt Roper
2018-11-14 13:59     ` Shankar, Uma
2018-09-16  8:15 ` [RFC v5 3/8] drm: Add Plane CTM property Uma Shankar
2018-09-16  8:15 ` [RFC v5 4/8] drm: Add Plane Gamma properties Uma Shankar
2018-09-16  8:15 ` [RFC v5 5/8] drm: Define helper function for plane color enabling Uma Shankar
2018-09-16  8:15 ` [RFC v5 6/8] drm/i915: Enable plane color features Uma Shankar
2018-09-16  8:15 ` [RFC v5 7/8] drm/i915: Implement Plane Gamma for Bdw and Gen9 platforms Uma Shankar
2018-09-16  8:15 ` [RFC v5 8/8] drm/i915: Load plane color luts from atomic flip Uma Shankar
2018-09-16 18:11 ` ✗ Fi.CI.BAT: failure for Add Plane Color Properties (rev5) Patchwork
2018-09-18 15:53 ` [RFC v5 0/8] Add Plane Color Properties Alexandru-Cosmin Gheorghe
2018-09-26  7:35 ` Lankhorst, Maarten
2018-09-26  8:59   ` Shankar, Uma

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