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From: "Roger Pau Monné" <roger.pau@citrix.com>
To: Jan Beulich <JBeulich@suse.com>
Cc: Stefano Stabellini <sstabellini@kernel.org>,
	Wei Liu <wei.liu2@citrix.com>,
	Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>,
	George Dunlap <George.Dunlap@eu.citrix.com>,
	Andrew Cooper <andrew.cooper3@citrix.com>,
	Ian Jackson <Ian.Jackson@eu.citrix.com>, Tim Deegan <tim@xen.org>,
	Julien Grall <julien.grall@arm.com>,
	xen-devel <xen-devel@lists.xenproject.org>
Subject: Re: [PATCH v3 6/7] vpci/msix: carve p2m hole for MSIX MMIO regions
Date: Wed, 7 Nov 2018 12:33:40 +0100	[thread overview]
Message-ID: <20181107113340.r77nyc4p32tx4zqb@mac.citrite.net> (raw)
In-Reply-To: <5BE078CC02000078001F8374@prv1-mh.provo.novell.com>

On Mon, Nov 05, 2018 at 10:07:24AM -0700, Jan Beulich wrote:
> >>> On 30.10.18 at 16:41, <roger.pau@citrix.com> wrote:
> > Make sure the MSIX MMIO regions don't have p2m entries setup, so that
> > accesses to them trap into the hypervisor and can be handled by vpci.
> > 
> > This is a side-effect of commit 042678762 for PVH Dom0, which added
> > mappings for all the reserved regions into the Dom0 p2m.
> 
> I'm afraid the description is ambiguous or misleading, as I don't suppose
> you want to state that what the patch here does is a side effect of the
> mentioned commit. Instead I assume you mean that p2m entries we
> don't want get set up without the change here.

Yes, arch_iommu_hwdom_init will setup such entries. What's done here
is just to make sure there are no mappings established for the MSIX
MMIO regions, or else no trapping would happen. I will reword the
commit message to make it clearer.

> > --- a/xen/drivers/vpci/header.c
> > +++ b/xen/drivers/vpci/header.c
> > @@ -88,6 +88,14 @@ static void modify_decoding(const struct pci_dev *pdev, bool map, bool rom_only)
> >      uint16_t cmd;
> >      unsigned int i;
> >  
> > +    /*
> > +     * Make sure there are no mappings in the MSIX MMIO areas, so that accesses
> > +     * can be trapped (and emulated) by Xen when the memory decoding bit is
> > +     * enabled.
> > +     */
> > +    if ( map && !rom_only && vpci_make_msix_hole(pdev) )
> > +        return;
> 
> If I'm not mistaken, you punch holes after having set up p2m entries.
> This may be fine for Dom0, but looks racy for (future) DomU use of
> this code. If so, please add a respective fixme annotation.

Ack. All the BAR handling/mapping must be much more strict for DomU.

> > +int vpci_make_msix_hole(const struct pci_dev *pdev)
> > +{
> > +    struct domain *d = pdev->domain;
> > +    unsigned int i;
> > +
> > +    if ( !pdev->vpci->msix )
> > +        return 0;
> > +
> > +    /* Make sure there's a hole for the MSIX table/PBA in the p2m. */
> > +    for ( i = 0; i < ARRAY_SIZE(pdev->vpci->msix->tables); i++ )
> > +    {
> > +        unsigned long start = PFN_DOWN(vmsix_table_addr(pdev->vpci, i));
> > +        unsigned long end = PFN_DOWN(vmsix_table_addr(pdev->vpci, i) +
> > +                                     vmsix_table_size(pdev->vpci, i) - 1);
> > +
> > +        for ( ; start <= end; start++ )
> > +        {
> > +            p2m_type_t t;
> > +            mfn_t mfn = get_gfn_query(d, start, &t);
> > +
> > +            if ( t == p2m_mmio_direct && mfn_x(mfn) == start )
> > +                    clear_identity_p2m_entry(d, start);
> 
> Indentation.
> 
> > +            else if ( t != p2m_mmio_dm )
> 
> Can you please also permit p2m_invalid right away, as the long term
> plan is to default to that type instead of p2m_mmio_dm for unpopulated
> p2m entries? And perhaps using switch() then produces easier to read
> code.

Sure.

Thanks, Roger.

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  reply	other threads:[~2018-11-07 11:33 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-10-30 15:41 [PATCH v3 0/7] x86/pvh: fix fixes for PVH Dom0 Roger Pau Monne
2018-10-30 15:41 ` [PATCH v3 1/7] x86/pvh: fix TSC mode setup " Roger Pau Monne
2018-10-30 15:41 ` [PATCH v3 2/7] x86/hvm: introduce a define for the debug output IO port Roger Pau Monne
2018-10-31 16:36   ` Wei Liu
2018-10-30 15:41 ` [PATCH v3 3/7] x86/pvh: allow PVH Dom0 to use the debug IO port console Roger Pau Monne
2018-10-30 16:27   ` Wei Liu
2018-10-30 15:41 ` [PATCH v3 4/7] vpci: fix updating the command register Roger Pau Monne
2018-11-05 16:46   ` Jan Beulich
2018-11-07 10:47     ` Roger Pau Monné
2018-11-07 15:00       ` Jan Beulich
2018-10-30 15:41 ` [PATCH v3 5/7] vpci: fix execution of long running operations Roger Pau Monne
2018-11-05 16:56   ` Jan Beulich
2018-11-07 11:11     ` Roger Pau Monné
2018-11-07 15:06       ` Jan Beulich
2018-11-07 17:15         ` Roger Pau Monné
2018-11-08  9:55           ` Jan Beulich
2018-11-08 11:29             ` Roger Pau Monné
2018-11-08 11:42               ` Julien Grall
2018-11-08 11:44                 ` Roger Pau Monné
2018-11-08 11:52                   ` Julien Grall
2018-11-08 12:20                     ` Roger Pau Monné
2018-11-08 12:38                       ` Julien Grall
2018-11-08 12:32               ` Jan Beulich
2018-11-08 12:47                 ` Roger Pau Monné
2018-11-08 13:04                   ` Jan Beulich
2018-11-08 13:20                     ` Roger Pau Monné
     [not found]                       ` <791E55F8020000889527FA34@prv1-mh.provo.novell.com>
2018-11-08 16:25                         ` Jan Beulich
2018-11-08 16:59                           ` Roger Pau Monné
     [not found]                             ` <E720D0C40200003B9527FA34@prv1-mh.provo.novell.com>
2018-11-09  8:02                               ` Jan Beulich
2018-10-30 15:41 ` [PATCH v3 6/7] vpci/msix: carve p2m hole for MSIX MMIO regions Roger Pau Monne
2018-11-05 17:07   ` Jan Beulich
2018-11-07 11:33     ` Roger Pau Monné [this message]
2018-10-30 15:41 ` [PATCH v3 7/7] amd/pvh: enable ACPI C1E disable quirk on PVH Dom0 Roger Pau Monne
2018-10-30 16:28   ` Wei Liu
2018-10-31 17:44   ` Boris Ostrovsky
2018-11-02  9:06   ` Jan Beulich
2018-11-07 10:24     ` Roger Pau Monné

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