* [PATCH] drm/i915: Always write both TILEOFF and LINOFF plane registers
@ 2018-11-08 15:09 Ville Syrjala
2018-11-08 16:00 ` ✓ Fi.CI.BAT: success for " Patchwork
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Ville Syrjala @ 2018-11-08 15:09 UTC (permalink / raw)
To: intel-gfx; +Cc: Rodrigo Vivi
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reduce the clutter in the sprite update functions by writing
both TILEOFF and LINOFF registers unconditionally. We already
did this for primary planes so might as well do it for the
sprites too.
There is no harm in writing both registers. Which one gets
used depends on the tilimg mode selected in the plane control
registers.
It might even make sense to clear the register that won't
get used. That could make register dumps a little easier to
parse. But I'm not sure it's worth the extra hassle.
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_sprite.c | 21 +++++++--------------
1 file changed, 7 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index 1293182dbcb0..06e8845b071d 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -792,7 +792,6 @@ vlv_update_plane(struct intel_plane *plane,
const struct intel_plane_state *plane_state)
{
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
- const struct drm_framebuffer *fb = plane_state->base.fb;
enum pipe pipe = plane->pipe;
enum plane_id plane_id = plane->id;
u32 sprctl = plane_state->ctl;
@@ -829,10 +828,8 @@ vlv_update_plane(struct intel_plane *plane,
plane_state->color_plane[0].stride);
I915_WRITE_FW(SPPOS(pipe, plane_id), (crtc_y << 16) | crtc_x);
- if (fb->modifier == I915_FORMAT_MOD_X_TILED)
- I915_WRITE_FW(SPTILEOFF(pipe, plane_id), (y << 16) | x);
- else
- I915_WRITE_FW(SPLINOFF(pipe, plane_id), linear_offset);
+ I915_WRITE_FW(SPTILEOFF(pipe, plane_id), (y << 16) | x);
+ I915_WRITE_FW(SPLINOFF(pipe, plane_id), linear_offset);
I915_WRITE_FW(SPCONSTALPHA(pipe, plane_id), 0);
@@ -950,7 +947,6 @@ ivb_update_plane(struct intel_plane *plane,
const struct intel_plane_state *plane_state)
{
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
- const struct drm_framebuffer *fb = plane_state->base.fb;
enum pipe pipe = plane->pipe;
u32 sprctl = plane_state->ctl, sprscale = 0;
u32 sprsurf_offset = plane_state->color_plane[0].offset;
@@ -990,12 +986,12 @@ ivb_update_plane(struct intel_plane *plane,
/* HSW consolidates SPRTILEOFF and SPRLINOFF into a single SPROFFSET
* register */
- if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
+ if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) {
I915_WRITE_FW(SPROFFSET(pipe), (y << 16) | x);
- else if (fb->modifier == I915_FORMAT_MOD_X_TILED)
+ } else {
I915_WRITE_FW(SPRTILEOFF(pipe), (y << 16) | x);
- else
I915_WRITE_FW(SPRLINOFF(pipe), linear_offset);
+ }
I915_WRITE_FW(SPRSIZE(pipe), (crtc_h << 16) | crtc_w);
if (IS_IVYBRIDGE(dev_priv))
@@ -1119,7 +1115,6 @@ g4x_update_plane(struct intel_plane *plane,
const struct intel_plane_state *plane_state)
{
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
- const struct drm_framebuffer *fb = plane_state->base.fb;
enum pipe pipe = plane->pipe;
u32 dvscntr = plane_state->ctl, dvsscale = 0;
u32 dvssurf_offset = plane_state->color_plane[0].offset;
@@ -1157,10 +1152,8 @@ g4x_update_plane(struct intel_plane *plane,
I915_WRITE_FW(DVSSTRIDE(pipe), plane_state->color_plane[0].stride);
I915_WRITE_FW(DVSPOS(pipe), (crtc_y << 16) | crtc_x);
- if (fb->modifier == I915_FORMAT_MOD_X_TILED)
- I915_WRITE_FW(DVSTILEOFF(pipe), (y << 16) | x);
- else
- I915_WRITE_FW(DVSLINOFF(pipe), linear_offset);
+ I915_WRITE_FW(DVSTILEOFF(pipe), (y << 16) | x);
+ I915_WRITE_FW(DVSLINOFF(pipe), linear_offset);
I915_WRITE_FW(DVSSIZE(pipe), (crtc_h << 16) | crtc_w);
I915_WRITE_FW(DVSSCALE(pipe), dvsscale);
--
2.18.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 4+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915: Always write both TILEOFF and LINOFF plane registers
2018-11-08 15:09 [PATCH] drm/i915: Always write both TILEOFF and LINOFF plane registers Ville Syrjala
@ 2018-11-08 16:00 ` Patchwork
2018-11-09 1:38 ` ✓ Fi.CI.IGT: " Patchwork
2018-11-13 15:59 ` [PATCH] " Ville Syrjälä
2 siblings, 0 replies; 4+ messages in thread
From: Patchwork @ 2018-11-08 16:00 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Always write both TILEOFF and LINOFF plane registers
URL : https://patchwork.freedesktop.org/series/52246/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5105 -> Patchwork_10776 =
== Summary - WARNING ==
Minor unknown changes coming with Patchwork_10776 need to be verified
manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_10776, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://patchwork.freedesktop.org/api/1.0/series/52246/revisions/1/mbox/
== Possible new issues ==
Here are the unknown changes that may have been introduced in Patchwork_10776:
=== IGT changes ===
==== Warnings ====
igt@pm_rpm@basic-rte:
fi-kbl-7567u: SKIP -> PASS +2
== Known issues ==
Here are the changes found in Patchwork_10776 that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a:
fi-byt-clapper: PASS -> FAIL (fdo#107362)
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
fi-kbl-7567u: SKIP -> DMESG-WARN (fdo#105079, fdo#105602) +1
==== Possible fixes ====
igt@drv_module_reload@basic-reload-inject:
fi-kbl-7567u: DMESG-WARN (fdo#108529, fdo#105602) -> PASS +1
igt@gem_ctx_create@basic-files:
fi-icl-u2: DMESG-WARN (fdo#107724) -> PASS
igt@kms_pipe_crc_basic@nonblocking-crc-pipe-b-frame-sequence:
fi-byt-clapper: FAIL (fdo#103191, fdo#107362) -> PASS
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
fi-blb-e6850: INCOMPLETE (fdo#107718) -> PASS
igt@pm_rpm@module-reload:
fi-kbl-7567u: DMESG-WARN (fdo#108529) -> PASS
==== Warnings ====
igt@kms_chamelium@common-hpd-after-suspend:
fi-skl-6700k2: FAIL (fdo#103841) -> WARN (fdo#108680)
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
fi-kbl-7567u: DMESG-FAIL (fdo#105079) -> DMESG-WARN (fdo#105079, fdo#105602)
fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191
fdo#103841 https://bugs.freedesktop.org/show_bug.cgi?id=103841
fdo#105079 https://bugs.freedesktop.org/show_bug.cgi?id=105079
fdo#105602 https://bugs.freedesktop.org/show_bug.cgi?id=105602
fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362
fdo#107718 https://bugs.freedesktop.org/show_bug.cgi?id=107718
fdo#107724 https://bugs.freedesktop.org/show_bug.cgi?id=107724
fdo#108529 https://bugs.freedesktop.org/show_bug.cgi?id=108529
fdo#108680 https://bugs.freedesktop.org/show_bug.cgi?id=108680
== Participating hosts (51 -> 46) ==
Additional (2): fi-byt-j1900 fi-glk-dsi
Missing (7): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-snb-2520m fi-icl-u
== Build changes ==
* Linux: CI_DRM_5105 -> Patchwork_10776
CI_DRM_5105: e44a1cc644d1719d195bd0afb9e319ae555059e1 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4712: a3ede1b535ac8137f6949c468edd7054453d5dae @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_10776: 1a7a1ccf43e6aae833b8c1467752db8f098a07fb @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
1a7a1ccf43e6 drm/i915: Always write both TILEOFF and LINOFF plane registers
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10776/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 4+ messages in thread
* ✓ Fi.CI.IGT: success for drm/i915: Always write both TILEOFF and LINOFF plane registers
2018-11-08 15:09 [PATCH] drm/i915: Always write both TILEOFF and LINOFF plane registers Ville Syrjala
2018-11-08 16:00 ` ✓ Fi.CI.BAT: success for " Patchwork
@ 2018-11-09 1:38 ` Patchwork
2018-11-13 15:59 ` [PATCH] " Ville Syrjälä
2 siblings, 0 replies; 4+ messages in thread
From: Patchwork @ 2018-11-09 1:38 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Always write both TILEOFF and LINOFF plane registers
URL : https://patchwork.freedesktop.org/series/52246/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5105_full -> Patchwork_10776_full =
== Summary - SUCCESS ==
No regressions found.
== Known issues ==
Here are the changes found in Patchwork_10776_full that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt@drv_selftest@mock_sanitycheck:
shard-kbl: PASS -> DMESG-WARN (fdo#105604)
igt@gem_ctx_isolation@rcs0-s3:
shard-kbl: PASS -> DMESG-WARN (fdo#103841)
igt@gem_workarounds@suspend-resume-context:
shard-skl: NOTRUN -> INCOMPLETE (fdo#104108, fdo#107773)
igt@kms_cursor_crc@cursor-128x128-offscreen:
shard-skl: PASS -> FAIL (fdo#103232) +1
igt@kms_cursor_crc@cursor-128x128-random:
shard-apl: PASS -> FAIL (fdo#103232) +4
igt@kms_cursor_crc@cursor-128x42-onscreen:
shard-glk: PASS -> FAIL (fdo#103232) +3
igt@kms_flip@modeset-vs-vblank-race:
shard-skl: PASS -> FAIL (fdo#103060)
igt@kms_flip@single-buffer-flip-vs-dpms-off-vs-modeset:
shard-kbl: PASS -> DMESG-WARN (fdo#103558, fdo#105602) +14
igt@kms_flip_tiling@flip-to-y-tiled:
shard-skl: PASS -> FAIL (fdo#107931) +1
igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-blt:
shard-apl: PASS -> FAIL (fdo#103167)
igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
shard-skl: PASS -> FAIL (fdo#107815)
igt@kms_plane_multiple@atomic-pipe-b-tiling-yf:
shard-apl: PASS -> FAIL (fdo#103166)
igt@kms_universal_plane@universal-plane-pipe-c-functional:
shard-kbl: PASS -> DMESG-WARN (fdo#103558, fdo#103313, fdo#105602) +2
igt@pm_rpm@modeset-lpsp-stress-no-wait:
shard-skl: PASS -> INCOMPLETE (fdo#107807)
==== Possible fixes ====
igt@kms_color@pipe-b-legacy-gamma:
shard-apl: FAIL (fdo#104782) -> PASS
igt@kms_cursor_crc@cursor-128x128-suspend:
shard-apl: FAIL (fdo#103191, fdo#103232) -> PASS +1
igt@kms_cursor_crc@cursor-size-change:
shard-apl: FAIL (fdo#103232) -> PASS
igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
shard-glk: FAIL (fdo#105363) -> PASS
igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render:
shard-apl: FAIL (fdo#103167) -> PASS
igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-pwrite:
shard-glk: FAIL (fdo#103167) -> PASS +1
igt@kms_frontbuffer_tracking@fbc-indfb-scaledprimary:
shard-skl: FAIL (fdo#103167) -> PASS
igt@kms_frontbuffer_tracking@psr-suspend:
shard-skl: INCOMPLETE (fdo#104108, fdo#106978, fdo#107773) -> PASS
igt@kms_plane@plane-position-covered-pipe-b-planes:
shard-glk: FAIL (fdo#103166) -> PASS
igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
shard-skl: FAIL (fdo#107815, fdo#108145) -> PASS
igt@kms_plane_alpha_blend@pipe-b-alpha-opaque-fb:
shard-glk: FAIL (fdo#108145) -> PASS
igt@kms_plane_multiple@atomic-pipe-a-tiling-x:
shard-apl: FAIL (fdo#103166) -> PASS +1
fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060
fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166
fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191
fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232
fdo#103313 https://bugs.freedesktop.org/show_bug.cgi?id=103313
fdo#103558 https://bugs.freedesktop.org/show_bug.cgi?id=103558
fdo#103841 https://bugs.freedesktop.org/show_bug.cgi?id=103841
fdo#104108 https://bugs.freedesktop.org/show_bug.cgi?id=104108
fdo#104782 https://bugs.freedesktop.org/show_bug.cgi?id=104782
fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363
fdo#105602 https://bugs.freedesktop.org/show_bug.cgi?id=105602
fdo#105604 https://bugs.freedesktop.org/show_bug.cgi?id=105604
fdo#106978 https://bugs.freedesktop.org/show_bug.cgi?id=106978
fdo#107773 https://bugs.freedesktop.org/show_bug.cgi?id=107773
fdo#107807 https://bugs.freedesktop.org/show_bug.cgi?id=107807
fdo#107815 https://bugs.freedesktop.org/show_bug.cgi?id=107815
fdo#107931 https://bugs.freedesktop.org/show_bug.cgi?id=107931
fdo#108145 https://bugs.freedesktop.org/show_bug.cgi?id=108145
== Participating hosts (6 -> 6) ==
No changes in participating hosts
== Build changes ==
* Linux: CI_DRM_5105 -> Patchwork_10776
CI_DRM_5105: e44a1cc644d1719d195bd0afb9e319ae555059e1 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4712: a3ede1b535ac8137f6949c468edd7054453d5dae @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_10776: 1a7a1ccf43e6aae833b8c1467752db8f098a07fb @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10776/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] drm/i915: Always write both TILEOFF and LINOFF plane registers
2018-11-08 15:09 [PATCH] drm/i915: Always write both TILEOFF and LINOFF plane registers Ville Syrjala
2018-11-08 16:00 ` ✓ Fi.CI.BAT: success for " Patchwork
2018-11-09 1:38 ` ✓ Fi.CI.IGT: " Patchwork
@ 2018-11-13 15:59 ` Ville Syrjälä
2 siblings, 0 replies; 4+ messages in thread
From: Ville Syrjälä @ 2018-11-13 15:59 UTC (permalink / raw)
To: intel-gfx; +Cc: Rodrigo Vivi
On Thu, Nov 08, 2018 at 05:09:55PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Reduce the clutter in the sprite update functions by writing
> both TILEOFF and LINOFF registers unconditionally. We already
> did this for primary planes so might as well do it for the
> sprites too.
>
> There is no harm in writing both registers. Which one gets
> used depends on the tilimg mode selected in the plane control
> registers.
>
> It might even make sense to clear the register that won't
> get used. That could make register dumps a little easier to
> parse. But I'm not sure it's worth the extra hassle.
>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Pushed with Maarten's irc r-b.
> ---
> drivers/gpu/drm/i915/intel_sprite.c | 21 +++++++--------------
> 1 file changed, 7 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
> index 1293182dbcb0..06e8845b071d 100644
> --- a/drivers/gpu/drm/i915/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/intel_sprite.c
> @@ -792,7 +792,6 @@ vlv_update_plane(struct intel_plane *plane,
> const struct intel_plane_state *plane_state)
> {
> struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
> - const struct drm_framebuffer *fb = plane_state->base.fb;
> enum pipe pipe = plane->pipe;
> enum plane_id plane_id = plane->id;
> u32 sprctl = plane_state->ctl;
> @@ -829,10 +828,8 @@ vlv_update_plane(struct intel_plane *plane,
> plane_state->color_plane[0].stride);
> I915_WRITE_FW(SPPOS(pipe, plane_id), (crtc_y << 16) | crtc_x);
>
> - if (fb->modifier == I915_FORMAT_MOD_X_TILED)
> - I915_WRITE_FW(SPTILEOFF(pipe, plane_id), (y << 16) | x);
> - else
> - I915_WRITE_FW(SPLINOFF(pipe, plane_id), linear_offset);
> + I915_WRITE_FW(SPTILEOFF(pipe, plane_id), (y << 16) | x);
> + I915_WRITE_FW(SPLINOFF(pipe, plane_id), linear_offset);
>
> I915_WRITE_FW(SPCONSTALPHA(pipe, plane_id), 0);
>
> @@ -950,7 +947,6 @@ ivb_update_plane(struct intel_plane *plane,
> const struct intel_plane_state *plane_state)
> {
> struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
> - const struct drm_framebuffer *fb = plane_state->base.fb;
> enum pipe pipe = plane->pipe;
> u32 sprctl = plane_state->ctl, sprscale = 0;
> u32 sprsurf_offset = plane_state->color_plane[0].offset;
> @@ -990,12 +986,12 @@ ivb_update_plane(struct intel_plane *plane,
>
> /* HSW consolidates SPRTILEOFF and SPRLINOFF into a single SPROFFSET
> * register */
> - if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
> + if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) {
> I915_WRITE_FW(SPROFFSET(pipe), (y << 16) | x);
> - else if (fb->modifier == I915_FORMAT_MOD_X_TILED)
> + } else {
> I915_WRITE_FW(SPRTILEOFF(pipe), (y << 16) | x);
> - else
> I915_WRITE_FW(SPRLINOFF(pipe), linear_offset);
> + }
>
> I915_WRITE_FW(SPRSIZE(pipe), (crtc_h << 16) | crtc_w);
> if (IS_IVYBRIDGE(dev_priv))
> @@ -1119,7 +1115,6 @@ g4x_update_plane(struct intel_plane *plane,
> const struct intel_plane_state *plane_state)
> {
> struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
> - const struct drm_framebuffer *fb = plane_state->base.fb;
> enum pipe pipe = plane->pipe;
> u32 dvscntr = plane_state->ctl, dvsscale = 0;
> u32 dvssurf_offset = plane_state->color_plane[0].offset;
> @@ -1157,10 +1152,8 @@ g4x_update_plane(struct intel_plane *plane,
> I915_WRITE_FW(DVSSTRIDE(pipe), plane_state->color_plane[0].stride);
> I915_WRITE_FW(DVSPOS(pipe), (crtc_y << 16) | crtc_x);
>
> - if (fb->modifier == I915_FORMAT_MOD_X_TILED)
> - I915_WRITE_FW(DVSTILEOFF(pipe), (y << 16) | x);
> - else
> - I915_WRITE_FW(DVSLINOFF(pipe), linear_offset);
> + I915_WRITE_FW(DVSTILEOFF(pipe), (y << 16) | x);
> + I915_WRITE_FW(DVSLINOFF(pipe), linear_offset);
>
> I915_WRITE_FW(DVSSIZE(pipe), (crtc_h << 16) | crtc_w);
> I915_WRITE_FW(DVSSCALE(pipe), dvsscale);
> --
> 2.18.1
--
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2018-11-13 16:00 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-11-08 15:09 [PATCH] drm/i915: Always write both TILEOFF and LINOFF plane registers Ville Syrjala
2018-11-08 16:00 ` ✓ Fi.CI.BAT: success for " Patchwork
2018-11-09 1:38 ` ✓ Fi.CI.IGT: " Patchwork
2018-11-13 15:59 ` [PATCH] " Ville Syrjälä
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