From mboxrd@z Thu Jan 1 00:00:00 1970 From: LABBE Corentin Subject: Re: [PATCH v3 0/7] include: add setbits32/clrbits32/clrsetbits32/setbits64/clrbits64/clrsetbits64 Date: Thu, 15 Nov 2018 13:24:44 +0100 Message-ID: <20181115122444.GA29281@Red> References: <1540366553-18541-1-git-send-email-clabbe@baylibre.com> <20181024085700.GR30658@n2100.armlinux.org.uk> <20181115093034.GB23965@Red> <20181115093348.GV30658@n2100.armlinux.org.uk> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Content-Disposition: inline In-Reply-To: <20181115093348.GV30658@n2100.armlinux.org.uk> Sender: linux-kernel-owner@vger.kernel.org To: Russell King - ARM Linux Cc: Gilles.Muller@lip6.fr, Julia.Lawall@lip6.fr, agust@denx.de, airlied@linux.ie, alexandre.torgue@st.com, alistair@popple.id.au, benh@kernel.crashing.org, carlo@caione.org, davem@davemloft.net, galak@kernel.crashing.org, joabreu@synopsys.com, khilman@baylibre.com, matthias.bgg@gmail.com, maxime.ripard@bootlin.com, michal.lkml@markovi.net, mpe@ellerman.id.au, mporter@kernel.crashing.org, narmstrong@baylibre.com, nicolas.palix@imag.fr, oss@buserror.net, paulus@samba.org, peppe.cavallaro@st.com, tj@kernel.org, vitb@kernel.crashing.org, wens@csie.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-ide@vger.kernel.org, linux-sunxi@googlegroups.com, linux-mediatek@lists.infradead.org, linux-amlogic@lists.infradead.org, linuxppc-dev@lists.ozlabs. List-Id: linux-ide@vger.kernel.org On Thu, Nov 15, 2018 at 09:33:48AM +0000, Russell King - ARM Linux wrote: > On Thu, Nov 15, 2018 at 10:30:34AM +0100, LABBE Corentin wrote: > > On Wed, Oct 24, 2018 at 09:57:00AM +0100, Russell King - ARM Linux wrote: > > > On Wed, Oct 24, 2018 at 07:35:46AM +0000, Corentin Labbe wrote: > > > > This patchset adds a new set of functions which are open-coded in lot of > > > > place. > > > > Basicly the pattern is always the same, "read, modify a bit, write" > > > > some driver and the powerpc arch already have thoses pattern them as functions. (like ahci_sunxi.c or dwmac-meson8b) > > > > > > The advantage of them being open-coded is that it's _obvious_ to the > > > reviewer that there is a read-modify-write going on which, in a multi- > > > threaded environment, may need some locking (so it should trigger a > > > review of the locking around that code.) > > > > > > With it hidden inside a helper which has no locking itself, it becomes > > > much easier to pass over in review, which means that races are much > > > more likely to go unspotted - and that is bad news. > > > > > > > Hello > > > > I understand your fear, but I think the benefit overhaul thoses. > > Furthermore, drivers which I have converted does not need such locking. > > > > If you want I can rename the header to linux/setbits-non-atomic.h for making obvious the lack of locking. > > It'd probably be better in the function name - it then doesn't get > "lost" that it's non-atomic when it's included via other headers. > I proposed that way for doing like writeq have do it with io-64-nonatomic-hi-lo.h From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.0 required=3.0 tests=DKIMWL_WL_MED,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_PASS, USER_AGENT_MUTT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BA8C0C43441 for ; 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Thu, 15 Nov 2018 04:24:49 -0800 (PST) Received: from Red ([2a01:cb1d:147:7200:2e56:dcff:fed2:c6d6]) by smtp.googlemail.com with ESMTPSA id j129-v6sm21008489wmb.47.2018.11.15.04.24.46 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 15 Nov 2018 04:24:48 -0800 (PST) Date: Thu, 15 Nov 2018 13:24:44 +0100 From: LABBE Corentin To: Russell King - ARM Linux Cc: Gilles.Muller@lip6.fr, Julia.Lawall@lip6.fr, agust@denx.de, airlied@linux.ie, alexandre.torgue@st.com, alistair@popple.id.au, benh@kernel.crashing.org, carlo@caione.org, davem@davemloft.net, galak@kernel.crashing.org, joabreu@synopsys.com, khilman@baylibre.com, matthias.bgg@gmail.com, maxime.ripard@bootlin.com, michal.lkml@markovi.net, mpe@ellerman.id.au, mporter@kernel.crashing.org, narmstrong@baylibre.com, nicolas.palix@imag.fr, oss@buserror.net, paulus@samba.org, peppe.cavallaro@st.com, tj@kernel.org, vitb@kernel.crashing.org, wens@csie.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-ide@vger.kernel.org, linux-sunxi@googlegroups.com, linux-mediatek@lists.infradead.org, linux-amlogic@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, cocci@systeme.lip6.fr, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v3 0/7] include: add setbits32/clrbits32/clrsetbits32/setbits64/clrbits64/clrsetbits64 Message-ID: <20181115122444.GA29281@Red> References: <1540366553-18541-1-git-send-email-clabbe@baylibre.com> <20181024085700.GR30658@n2100.armlinux.org.uk> <20181115093034.GB23965@Red> <20181115093348.GV30658@n2100.armlinux.org.uk> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20181115093348.GV30658@n2100.armlinux.org.uk> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Nov 15, 2018 at 09:33:48AM +0000, Russell King - ARM Linux wrote: > On Thu, Nov 15, 2018 at 10:30:34AM +0100, LABBE Corentin wrote: > > On Wed, Oct 24, 2018 at 09:57:00AM +0100, Russell King - ARM Linux wrote: > > > On Wed, Oct 24, 2018 at 07:35:46AM +0000, Corentin Labbe wrote: > > > > This patchset adds a new set of functions which are open-coded in lot of > > > > place. > > > > Basicly the pattern is always the same, "read, modify a bit, write" > > > > some driver and the powerpc arch already have thoses pattern them as functions. (like ahci_sunxi.c or dwmac-meson8b) > > > > > > The advantage of them being open-coded is that it's _obvious_ to the > > > reviewer that there is a read-modify-write going on which, in a multi- > > > threaded environment, may need some locking (so it should trigger a > > > review of the locking around that code.) > > > > > > With it hidden inside a helper which has no locking itself, it becomes > > > much easier to pass over in review, which means that races are much > > > more likely to go unspotted - and that is bad news. > > > > > > > Hello > > > > I understand your fear, but I think the benefit overhaul thoses. > > Furthermore, drivers which I have converted does not need such locking. > > > > If you want I can rename the header to linux/setbits-non-atomic.h for making obvious the lack of locking. > > It'd probably be better in the function name - it then doesn't get > "lost" that it's non-atomic when it's included via other headers. > I proposed that way for doing like writeq have do it with io-64-nonatomic-hi-lo.h From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.3 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_PASS,USER_AGENT_MUTT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 575EAC43441 for ; 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charset=us-ascii Content-Disposition: inline In-Reply-To: <20181115093348.GV30658@n2100.armlinux.org.uk> User-Agent: Mutt/1.10.1 (2018-07-13) X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Gilles.Muller@lip6.fr, maxime.ripard@bootlin.com, dri-devel@lists.freedesktop.org, linux-ide@vger.kernel.org, linux-sunxi@googlegroups.com, paulus@samba.org, linux-amlogic@lists.infradead.org, cocci@systeme.lip6.fr, narmstrong@baylibre.com, airlied@linux.ie, wens@csie.org, joabreu@synopsys.com, agust@denx.de, alexandre.torgue@st.com, alistair@popple.id.au, nicolas.palix@imag.fr, oss@buserror.net, Julia.Lawall@lip6.fr, linux-mediatek@lists.infradead.org, matthias.bgg@gmail.com, peppe.cavallaro@st.com, linux-arm-kernel@lists.infradead.org, michal.lkml@markovi.net, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, khilman@baylibre.com, carlo@caione.org, tj@kernel.org, linuxppc-dev@lists.ozlabs.org, davem@davemloft.net Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On Thu, Nov 15, 2018 at 09:33:48AM +0000, Russell King - ARM Linux wrote: > On Thu, Nov 15, 2018 at 10:30:34AM +0100, LABBE Corentin wrote: > > On Wed, Oct 24, 2018 at 09:57:00AM +0100, Russell King - ARM Linux wrote: > > > On Wed, Oct 24, 2018 at 07:35:46AM +0000, Corentin Labbe wrote: > > > > This patchset adds a new set of functions which are open-coded in lot of > > > > place. > > > > Basicly the pattern is always the same, "read, modify a bit, write" > > > > some driver and the powerpc arch already have thoses pattern them as functions. (like ahci_sunxi.c or dwmac-meson8b) > > > > > > The advantage of them being open-coded is that it's _obvious_ to the > > > reviewer that there is a read-modify-write going on which, in a multi- > > > threaded environment, may need some locking (so it should trigger a > > > review of the locking around that code.) > > > > > > With it hidden inside a helper which has no locking itself, it becomes > > > much easier to pass over in review, which means that races are much > > > more likely to go unspotted - and that is bad news. > > > > > > > Hello > > > > I understand your fear, but I think the benefit overhaul thoses. > > Furthermore, drivers which I have converted does not need such locking. > > > > If you want I can rename the header to linux/setbits-non-atomic.h for making obvious the lack of locking. > > It'd probably be better in the function name - it then doesn't get > "lost" that it's non-atomic when it's included via other headers. > I proposed that way for doing like writeq have do it with io-64-nonatomic-hi-lo.h From mboxrd@z Thu Jan 1 00:00:00 1970 From: clabbe@baylibre.com (LABBE Corentin) Date: Thu, 15 Nov 2018 13:24:44 +0100 Subject: [PATCH v3 0/7] include: add setbits32/clrbits32/clrsetbits32/setbits64/clrbits64/clrsetbits64 In-Reply-To: <20181115093348.GV30658@n2100.armlinux.org.uk> References: <1540366553-18541-1-git-send-email-clabbe@baylibre.com> <20181024085700.GR30658@n2100.armlinux.org.uk> <20181115093034.GB23965@Red> <20181115093348.GV30658@n2100.armlinux.org.uk> Message-ID: <20181115122444.GA29281@Red> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Thu, Nov 15, 2018 at 09:33:48AM +0000, Russell King - ARM Linux wrote: > On Thu, Nov 15, 2018 at 10:30:34AM +0100, LABBE Corentin wrote: > > On Wed, Oct 24, 2018 at 09:57:00AM +0100, Russell King - ARM Linux wrote: > > > On Wed, Oct 24, 2018 at 07:35:46AM +0000, Corentin Labbe wrote: > > > > This patchset adds a new set of functions which are open-coded in lot of > > > > place. > > > > Basicly the pattern is always the same, "read, modify a bit, write" > > > > some driver and the powerpc arch already have thoses pattern them as functions. (like ahci_sunxi.c or dwmac-meson8b) > > > > > > The advantage of them being open-coded is that it's _obvious_ to the > > > reviewer that there is a read-modify-write going on which, in a multi- > > > threaded environment, may need some locking (so it should trigger a > > > review of the locking around that code.) > > > > > > With it hidden inside a helper which has no locking itself, it becomes > > > much easier to pass over in review, which means that races are much > > > more likely to go unspotted - and that is bad news. > > > > > > > Hello > > > > I understand your fear, but I think the benefit overhaul thoses. > > Furthermore, drivers which I have converted does not need such locking. > > > > If you want I can rename the header to linux/setbits-non-atomic.h for making obvious the lack of locking. > > It'd probably be better in the function name - it then doesn't get > "lost" that it's non-atomic when it's included via other headers. > I proposed that way for doing like writeq have do it with io-64-nonatomic-hi-lo.h From mboxrd@z Thu Jan 1 00:00:00 1970 From: clabbe@baylibre.com (LABBE Corentin) Date: Thu, 15 Nov 2018 13:24:44 +0100 Subject: [PATCH v3 0/7] include: add setbits32/clrbits32/clrsetbits32/setbits64/clrbits64/clrsetbits64 In-Reply-To: <20181115093348.GV30658@n2100.armlinux.org.uk> References: <1540366553-18541-1-git-send-email-clabbe@baylibre.com> <20181024085700.GR30658@n2100.armlinux.org.uk> <20181115093034.GB23965@Red> <20181115093348.GV30658@n2100.armlinux.org.uk> Message-ID: <20181115122444.GA29281@Red> To: linus-amlogic@lists.infradead.org List-Id: linus-amlogic.lists.infradead.org On Thu, Nov 15, 2018 at 09:33:48AM +0000, Russell King - ARM Linux wrote: > On Thu, Nov 15, 2018 at 10:30:34AM +0100, LABBE Corentin wrote: > > On Wed, Oct 24, 2018 at 09:57:00AM +0100, Russell King - ARM Linux wrote: > > > On Wed, Oct 24, 2018 at 07:35:46AM +0000, Corentin Labbe wrote: > > > > This patchset adds a new set of functions which are open-coded in lot of > > > > place. > > > > Basicly the pattern is always the same, "read, modify a bit, write" > > > > some driver and the powerpc arch already have thoses pattern them as functions. (like ahci_sunxi.c or dwmac-meson8b) > > > > > > The advantage of them being open-coded is that it's _obvious_ to the > > > reviewer that there is a read-modify-write going on which, in a multi- > > > threaded environment, may need some locking (so it should trigger a > > > review of the locking around that code.) > > > > > > With it hidden inside a helper which has no locking itself, it becomes > > > much easier to pass over in review, which means that races are much > > > more likely to go unspotted - and that is bad news. > > > > > > > Hello > > > > I understand your fear, but I think the benefit overhaul thoses. > > Furthermore, drivers which I have converted does not need such locking. > > > > If you want I can rename the header to linux/setbits-non-atomic.h for making obvious the lack of locking. > > It'd probably be better in the function name - it then doesn't get > "lost" that it's non-atomic when it's included via other headers. > I proposed that way for doing like writeq have do it with io-64-nonatomic-hi-lo.h