From mboxrd@z Thu Jan  1 00:00:00 1970
From: =?UTF-8?q?Jos=C3=A9=20Roberto=20de=20Souza?= <jose.souza@intel.com>
Subject: [PATCH 3/9] drm/i915/psr: Enable sink to trigger a interruption on
 PSR2 CRC mismatch
Date: Mon, 26 Nov 2018 16:37:04 -0800
Message-ID: <20181127003710.18618-3-jose.souza@intel.com>
References: <20181127003710.18618-1-jose.souza@intel.com>
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Cc: =?UTF-8?q?Jos=C3=A9=20Roberto=20de=20Souza?= <jose.souza@intel.com>, Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>, dri-devel@lists.freedesktop.org, Rodrigo Vivi <rodrigo.vivi@intel.com>
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