From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ulf Hansson Subject: [PATCH v10 27/27] arm64: dts: hikey: Convert to the hierarchical CPU topology layout Date: Thu, 29 Nov 2018 18:47:00 +0100 Message-ID: <20181129174700.16585-28-ulf.hansson@linaro.org> References: <20181129174700.16585-1-ulf.hansson@linaro.org> Return-path: In-Reply-To: <20181129174700.16585-1-ulf.hansson@linaro.org> Sender: linux-kernel-owner@vger.kernel.org To: "Rafael J . Wysocki" , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Daniel Lezcano , linux-pm@vger.kernel.org Cc: "Raju P . L . S . S . S . N" , Stephen Boyd , Tony Lindgren , Kevin Hilman , Lina Iyer , Ulf Hansson , Viresh Kumar , Vincent Guittot , Geert Uytterhoeven , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org List-Id: linux-arm-msm@vger.kernel.org To enable the OS to manage last-man standing activities for a CPU, while an idle state for a group of CPUs is selected, let's convert the Hikey platform into using the hierarchical CPU topology layout. Signed-off-by: Ulf Hansson --- Changes in v10: - New patch. --- arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 87 ++++++++++++++++++++--- 1 file changed, 76 insertions(+), 11 deletions(-) diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi index 97d5bf2c6ec5..fa5b385cfbc4 100644 --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi @@ -20,6 +20,64 @@ psci { compatible = "arm,psci-0.2"; method = "smc"; + + CPU_PD0: cpu-pd0 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD0>; + domain-idle-states = <&CPU_SLEEP>; + }; + + CPU_PD1: cpu-pd1 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD0>; + domain-idle-states = <&CPU_SLEEP>; + }; + + CPU_PD2: cpu-pd2 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD0>; + domain-idle-states = <&CPU_SLEEP>; + }; + + CPU_PD3: cpu-pd3 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD0>; + domain-idle-states = <&CPU_SLEEP>; + }; + + CPU_PD4: cpu-pd4 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD1>; + domain-idle-states = <&CPU_SLEEP>; + }; + + CPU_PD5: cpu-pd5 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD1>; + domain-idle-states = <&CPU_SLEEP>; + }; + + CPU_PD6: cpu-pd6 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD1>; + domain-idle-states = <&CPU_SLEEP>; + }; + + CPU_PD7: cpu-pd7 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD1>; + domain-idle-states = <&CPU_SLEEP>; + }; + + CLUSTER_PD0: cluster-pd0 { + #power-domain-cells = <0>; + domain-idle-states = <&CLUSTER_SLEEP>; + }; + + CLUSTER_PD1: cluster-pd1 { + #power-domain-cells = <0>; + domain-idle-states = <&CLUSTER_SLEEP>; + }; }; cpus { @@ -70,9 +128,8 @@ }; CLUSTER_SLEEP: cluster-sleep { - compatible = "arm,idle-state"; - local-timer-stop; - arm,psci-suspend-param = <0x1010000>; + compatible = "domain-idle-state"; + arm,psci-suspend-param = <0x1000000>; entry-latency-us = <1000>; exit-latency-us = <700>; min-residency-us = <2700>; @@ -88,9 +145,10 @@ next-level-cache = <&CLUSTER0_L2>; clocks = <&stub_clock 0>; operating-points-v2 = <&cpu_opp_table>; - cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; #cooling-cells = <2>; /* min followed by max */ dynamic-power-coefficient = <311>; + power-domains = <&CPU_PD0>; + power-domain-names = "psci"; }; cpu1: cpu@1 { @@ -101,9 +159,10 @@ next-level-cache = <&CLUSTER0_L2>; clocks = <&stub_clock 0>; operating-points-v2 = <&cpu_opp_table>; - cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; #cooling-cells = <2>; /* min followed by max */ dynamic-power-coefficient = <311>; + power-domains = <&CPU_PD1>; + power-domain-names = "psci"; }; cpu2: cpu@2 { @@ -114,9 +173,10 @@ next-level-cache = <&CLUSTER0_L2>; clocks = <&stub_clock 0>; operating-points-v2 = <&cpu_opp_table>; - cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; #cooling-cells = <2>; /* min followed by max */ dynamic-power-coefficient = <311>; + power-domains = <&CPU_PD2>; + power-domain-names = "psci"; }; cpu3: cpu@3 { @@ -127,9 +187,10 @@ next-level-cache = <&CLUSTER0_L2>; clocks = <&stub_clock 0>; operating-points-v2 = <&cpu_opp_table>; - cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; #cooling-cells = <2>; /* min followed by max */ dynamic-power-coefficient = <311>; + power-domains = <&CPU_PD3>; + power-domain-names = "psci"; }; cpu4: cpu@100 { @@ -140,9 +201,10 @@ next-level-cache = <&CLUSTER1_L2>; clocks = <&stub_clock 0>; operating-points-v2 = <&cpu_opp_table>; - cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; #cooling-cells = <2>; /* min followed by max */ dynamic-power-coefficient = <311>; + power-domains = <&CPU_PD4>; + power-domain-names = "psci"; }; cpu5: cpu@101 { @@ -153,9 +215,10 @@ next-level-cache = <&CLUSTER1_L2>; clocks = <&stub_clock 0>; operating-points-v2 = <&cpu_opp_table>; - cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; #cooling-cells = <2>; /* min followed by max */ dynamic-power-coefficient = <311>; + power-domains = <&CPU_PD5>; + power-domain-names = "psci"; }; cpu6: cpu@102 { @@ -166,9 +229,10 @@ next-level-cache = <&CLUSTER1_L2>; clocks = <&stub_clock 0>; operating-points-v2 = <&cpu_opp_table>; - cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; #cooling-cells = <2>; /* min followed by max */ dynamic-power-coefficient = <311>; + power-domains = <&CPU_PD6>; + power-domain-names = "psci"; }; cpu7: cpu@103 { @@ -179,9 +243,10 @@ next-level-cache = <&CLUSTER1_L2>; clocks = <&stub_clock 0>; operating-points-v2 = <&cpu_opp_table>; - cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; #cooling-cells = <2>; /* min followed by max */ dynamic-power-coefficient = <311>; + power-domains = <&CPU_PD7>; + power-domain-names = "psci"; }; CLUSTER0_L2: l2-cache0 { -- 2.17.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.5 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6D92BC43610 for ; Thu, 29 Nov 2018 17:55:53 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3FE7B213A2 for ; Thu, 29 Nov 2018 17:55:53 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="slrvRVnv"; dkim=fail reason="signature verification failed" (1024-bit key) header.d=linaro.org header.i=@linaro.org header.b="A6wx/B1l" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3FE7B213A2 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=/rEpBdxa9TSqX8ygrgA8sKQI9P68We0IUB8NtbwSfE0=; b=slrvRVnvxmo6QXISLY4jrk0SVI qeUBckrWKkZTFy4xbEIL/VxYp5Et5n84s4UgaytXgVjFGwlWL4uMTeo7U+OKBzOFP3hjwa6o0wfr5 McxULt5CssIE3Nb1N4y2x3Iu06xJdJBON5OR+yHxGMZcSiznVMC5TWKIq8n4vculiQQ0m1frj793B DkN8/6OC2Lns+Q3/7Tn4Hjd6F431AVnF59sTv5oZWZwQ+U9XGMcu6THxiCYjNqKMMAeNDNXG4D1RD rcJRp4fXQ3I2yOfIwXprnCLZy0YzMfSqRohLVFwJQ1Biy6yZqHit8/GEYZZd6byXfBssSKfq0ou/I k5Wle6Lg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gSQXR-00027n-NJ; Thu, 29 Nov 2018 17:55:45 +0000 Received: from mail-lf1-x144.google.com ([2a00:1450:4864:20::144]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1gSQQ4-0001hC-Tz for linux-arm-kernel@lists.infradead.org; Thu, 29 Nov 2018 17:48:14 +0000 Received: by mail-lf1-x144.google.com with SMTP id e26so2125962lfc.2 for ; Thu, 29 Nov 2018 09:47:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=edUuds9oK7rq3a7y1o1twsgnSy+L5oYmA4xb9WHJ9+k=; b=A6wx/B1lx1+bygG6vNTP5U1cnmX9jGEyu1b3aHBxjvlAIzHP/jh/FWsauGN28VCUzQ ljorwL5unf+YDLuCY0t6Ivi4w5Lj71gYb0YXCgZ4jRGr+Jt6dYLG2khG3OERWdIZ5xkY Ac65FBUbc5jI8f4Eyk6HdNONOTEhIVUNeWVhQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=edUuds9oK7rq3a7y1o1twsgnSy+L5oYmA4xb9WHJ9+k=; b=qdXTsEUuVzfho92+/2usxOuh0zpuaoZ0Njy0I9A7ZZcOtjUipUYq4mYi8Dui756/b4 RLJNfhrSRJmw3RidhsfPspQ4Pqs3fgLYky2RCwKQsi5qUfTCnueQY1T1spVroS/q4ubQ BwMU502w9LuXmxBtDeky2qw0jjCmv6bEfvY+yf14c2uf30onp8kCDrvAtV0euE7ej9Sz UDJxkTEEN0bwZAtyv1l3eQbM5CuOnZmviwxFJHCCUmc8TGdETYX8498bbCEv/6asa2dK prrzUN2yGAD05ZIqdE4Lgqr2eouR8mJTw02ttIRd1qXtsHxbE5rrB/02kg58TlVV/ZlT tZrQ== X-Gm-Message-State: AA+aEWYh1UzHZSH2uwYH8yajGAnwgmbt1Mh36P32vkSnfvqBbBTH85sj RpjOUuuhaHWNTFEmdby+xRvTTw== X-Google-Smtp-Source: AFSGD/XVzFGUZimGhzy88XMVy4uhorvpa7/8oAxi7Md22GA4kR2vIjSPoAiN4QAPlVeK/uqUb9G+/Q== X-Received: by 2002:a19:59c2:: with SMTP id n185mr1558629lfb.118.1543513677002; Thu, 29 Nov 2018 09:47:57 -0800 (PST) Received: from localhost.localdomain (h-158-174-22-210.NA.cust.bahnhof.se. [158.174.22.210]) by smtp.gmail.com with ESMTPSA id j76-v6sm393983ljb.12.2018.11.29.09.47.55 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 29 Nov 2018 09:47:56 -0800 (PST) From: Ulf Hansson To: "Rafael J . Wysocki" , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Daniel Lezcano , linux-pm@vger.kernel.org Subject: [PATCH v10 27/27] arm64: dts: hikey: Convert to the hierarchical CPU topology layout Date: Thu, 29 Nov 2018 18:47:00 +0100 Message-Id: <20181129174700.16585-28-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181129174700.16585-1-ulf.hansson@linaro.org> References: <20181129174700.16585-1-ulf.hansson@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181129_094809_095897_25E494D4 X-CRM114-Status: GOOD ( 15.28 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Ulf Hansson , Vincent Guittot , Geert Uytterhoeven , Kevin Hilman , Stephen Boyd , Viresh Kumar , linux-kernel@vger.kernel.org, Lina Iyer , Tony Lindgren , linux-arm-msm@vger.kernel.org, "Raju P . L . S . S . S . N" , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org To enable the OS to manage last-man standing activities for a CPU, while an idle state for a group of CPUs is selected, let's convert the Hikey platform into using the hierarchical CPU topology layout. Signed-off-by: Ulf Hansson --- Changes in v10: - New patch. --- arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 87 ++++++++++++++++++++--- 1 file changed, 76 insertions(+), 11 deletions(-) diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi index 97d5bf2c6ec5..fa5b385cfbc4 100644 --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi @@ -20,6 +20,64 @@ psci { compatible = "arm,psci-0.2"; method = "smc"; + + CPU_PD0: cpu-pd0 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD0>; + domain-idle-states = <&CPU_SLEEP>; + }; + + CPU_PD1: cpu-pd1 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD0>; + domain-idle-states = <&CPU_SLEEP>; + }; + + CPU_PD2: cpu-pd2 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD0>; + domain-idle-states = <&CPU_SLEEP>; + }; + + CPU_PD3: cpu-pd3 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD0>; + domain-idle-states = <&CPU_SLEEP>; + }; + + CPU_PD4: cpu-pd4 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD1>; + domain-idle-states = <&CPU_SLEEP>; + }; + + CPU_PD5: cpu-pd5 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD1>; + domain-idle-states = <&CPU_SLEEP>; + }; + + CPU_PD6: cpu-pd6 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD1>; + domain-idle-states = <&CPU_SLEEP>; + }; + + CPU_PD7: cpu-pd7 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD1>; + domain-idle-states = <&CPU_SLEEP>; + }; + + CLUSTER_PD0: cluster-pd0 { + #power-domain-cells = <0>; + domain-idle-states = <&CLUSTER_SLEEP>; + }; + + CLUSTER_PD1: cluster-pd1 { + #power-domain-cells = <0>; + domain-idle-states = <&CLUSTER_SLEEP>; + }; }; cpus { @@ -70,9 +128,8 @@ }; CLUSTER_SLEEP: cluster-sleep { - compatible = "arm,idle-state"; - local-timer-stop; - arm,psci-suspend-param = <0x1010000>; + compatible = "domain-idle-state"; + arm,psci-suspend-param = <0x1000000>; entry-latency-us = <1000>; exit-latency-us = <700>; min-residency-us = <2700>; @@ -88,9 +145,10 @@ next-level-cache = <&CLUSTER0_L2>; clocks = <&stub_clock 0>; operating-points-v2 = <&cpu_opp_table>; - cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; #cooling-cells = <2>; /* min followed by max */ dynamic-power-coefficient = <311>; + power-domains = <&CPU_PD0>; + power-domain-names = "psci"; }; cpu1: cpu@1 { @@ -101,9 +159,10 @@ next-level-cache = <&CLUSTER0_L2>; clocks = <&stub_clock 0>; operating-points-v2 = <&cpu_opp_table>; - cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; #cooling-cells = <2>; /* min followed by max */ dynamic-power-coefficient = <311>; + power-domains = <&CPU_PD1>; + power-domain-names = "psci"; }; cpu2: cpu@2 { @@ -114,9 +173,10 @@ next-level-cache = <&CLUSTER0_L2>; clocks = <&stub_clock 0>; operating-points-v2 = <&cpu_opp_table>; - cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; #cooling-cells = <2>; /* min followed by max */ dynamic-power-coefficient = <311>; + power-domains = <&CPU_PD2>; + power-domain-names = "psci"; }; cpu3: cpu@3 { @@ -127,9 +187,10 @@ next-level-cache = <&CLUSTER0_L2>; clocks = <&stub_clock 0>; operating-points-v2 = <&cpu_opp_table>; - cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; #cooling-cells = <2>; /* min followed by max */ dynamic-power-coefficient = <311>; + power-domains = <&CPU_PD3>; + power-domain-names = "psci"; }; cpu4: cpu@100 { @@ -140,9 +201,10 @@ next-level-cache = <&CLUSTER1_L2>; clocks = <&stub_clock 0>; operating-points-v2 = <&cpu_opp_table>; - cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; #cooling-cells = <2>; /* min followed by max */ dynamic-power-coefficient = <311>; + power-domains = <&CPU_PD4>; + power-domain-names = "psci"; }; cpu5: cpu@101 { @@ -153,9 +215,10 @@ next-level-cache = <&CLUSTER1_L2>; clocks = <&stub_clock 0>; operating-points-v2 = <&cpu_opp_table>; - cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; #cooling-cells = <2>; /* min followed by max */ dynamic-power-coefficient = <311>; + power-domains = <&CPU_PD5>; + power-domain-names = "psci"; }; cpu6: cpu@102 { @@ -166,9 +229,10 @@ next-level-cache = <&CLUSTER1_L2>; clocks = <&stub_clock 0>; operating-points-v2 = <&cpu_opp_table>; - cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; #cooling-cells = <2>; /* min followed by max */ dynamic-power-coefficient = <311>; + power-domains = <&CPU_PD6>; + power-domain-names = "psci"; }; cpu7: cpu@103 { @@ -179,9 +243,10 @@ next-level-cache = <&CLUSTER1_L2>; clocks = <&stub_clock 0>; operating-points-v2 = <&cpu_opp_table>; - cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; #cooling-cells = <2>; /* min followed by max */ dynamic-power-coefficient = <311>; + power-domains = <&CPU_PD7>; + power-domain-names = "psci"; }; CLUSTER0_L2: l2-cache0 { -- 2.17.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel