[PATCH v2 0/6] Bring suspend to RAM support to MVEBU SATA

From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Gregory Clement <gregory.clement@bootlin.com>,
	Jason Cooper <jason@lakedaemon.net>, Andrew Lunn <andrew@lunn.ch>,
	Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
	Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>, Jens Axboe <axboe@kernel.dk>,
	Hans de Goede <hdegoede@redhat.com>
Cc: devicetree@vger.kernel.org, linux-pm@vger.kernel.org,
	Antoine Tenart <antoine.tenart@bootlin.com>,
	Maxime Chevallier <maxime.chevallier@bootlin.com>,
	Nadav Haklai <nadavh@marvell.com>,
	linux-ide@vger.kernel.org,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Miquel Raynal <miquel.raynal@bootlin.com>,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 0/6] Bring suspend to RAM support to MVEBU SATA
Date: Fri, 30 Nov 2018 16:38:27 +0100	[thread overview]
Message-ID: <20181130153833.11421-1-miquel.raynal@bootlin.com> (raw)

Hello,

As part of an effort to bring suspend to RAM support to Armada 3700
SoCs (main target: ESPRESSObin), this series handles the work around
the SATA IP.

First, a change in the libahci platform adds support for the new PHY
framework by following the phy_set_mode()/phy_power_on()
sequence. Then, the AHCI MVEBU driver is a bit updated (patch 2 & 3)
and a missing initialization is added for the A3700 in patch 4 (only
done by the Bootloader before). Missing clock support is implemented
in patch 5 to be sure the clock will be resumed before this driver
(see [1] for the series adding device links to the clock core).

Finally, device trees are updated to reflect the hardware: the missing
PHY is added to the ESPRESSObin DT, and the clock is added to the SoC
DT (patch 6 & 7). Bindings already document the clock and the PHY so
no update is needed on this regard.

[1] http://lists.infradead.org/pipermail/linux-arm-kernel/2018-November/614527.html

Thanks,
Miquèl

Changes since v1:
=================
* The clock is automatically requested by the libahci_platform.c
  driver, doing it in the mvebu driver is redundant, remove the patch
  adding clock support as clock support already exists.
* Changed authorship of patch adding a SATA enum in the PHY core.
* Added Suggested-by tag to the patch fixing the SATA node scope in DT,
  to the patch adding PHY framework compliance to the
  libahci_platform driver and to the DT patch adding the SATA PHY
  property.
* Add a flag to do not disable/enable the PHY for compatibility
  reasons and to avoid to break untested boards with this change.
  The flag is called AHCI_HFLAG_MANAGE_PHYS.
* The mvebu ahci driver is edited to enable this flag only on A3700.

Miquel Raynal (6):
  ata: libahci_platform: comply to PHY framework
  ata: ahci: mvebu: remove stale comment
  ata: ahci: mvebu: do Armada 38x configuration only on relevant SoCs
  ata: ahci: mvebu: add Armada 3700 initialization needed for S2RAM
  ARM64: dts: marvell: armada-37xx: declare SATA clock
  ARM64: dts: marvell: armada-3720-espressobin: declare SATA PHY
    property

 .../dts/marvell/armada-3720-espressobin.dts   |  2 +
 arch/arm64/boot/dts/marvell/armada-37xx.dtsi  |  1 +
 drivers/ata/ahci.h                            |  2 +
 drivers/ata/ahci_mvebu.c                      | 88 ++++++++++++++-----
 drivers/ata/libahci_platform.c                | 19 +++-
 5 files changed, 87 insertions(+), 25 deletions(-)

-- 
2.19.1

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