From mboxrd@z Thu Jan  1 00:00:00 1970
From: =?UTF-8?q?Jos=C3=A9=20Roberto=20de=20Souza?= <jose.souza@intel.com>
Subject: [PATCH 4/5] drm/i915: Add PSR2 selective update status
 registers and bits definitions
Date: Tue,  4 Dec 2018 15:00:31 -0800
Message-ID: <20181204230032.6352-4-jose.souza@intel.com>
References: <20181204230032.6352-1-jose.souza@intel.com>
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