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From: Anup Patel <anup@brainfault.org>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 2/2] riscv: qemu: Enable SiFive UART driver in defconfigs
Date: Wed,  5 Dec 2018 11:59:24 +0530	[thread overview]
Message-ID: <20181205062924.26640-3-anup@brainfault.org> (raw)
In-Reply-To: <20181205062924.26640-1-anup@brainfault.org>

This patch enables SiFive UART driver in all QEMU RISC-V defconfigs.

Signed-off-by: Anup Patel <anup@brainfault.org>
---
 configs/qemu-riscv32_defconfig       | 1 +
 configs/qemu-riscv32_smode_defconfig | 1 +
 configs/qemu-riscv64_defconfig       | 1 +
 configs/qemu-riscv64_smode_defconfig | 1 +
 4 files changed, 4 insertions(+)

diff --git a/configs/qemu-riscv32_defconfig b/configs/qemu-riscv32_defconfig
index 6334d8c0fc..79c8d54cc7 100644
--- a/configs/qemu-riscv32_defconfig
+++ b/configs/qemu-riscv32_defconfig
@@ -7,3 +7,4 @@ CONFIG_DISPLAY_CPUINFO=y
 CONFIG_DISPLAY_BOARDINFO=y
 # CONFIG_CMD_MII is not set
 CONFIG_OF_PRIOR_STAGE=y
+CONFIG_SIFIVE_SERIAL=y
diff --git a/configs/qemu-riscv32_smode_defconfig b/configs/qemu-riscv32_smode_defconfig
index 0a84ec1874..b733dbed2f 100644
--- a/configs/qemu-riscv32_smode_defconfig
+++ b/configs/qemu-riscv32_smode_defconfig
@@ -8,3 +8,4 @@ CONFIG_DISPLAY_CPUINFO=y
 CONFIG_DISPLAY_BOARDINFO=y
 # CONFIG_CMD_MII is not set
 CONFIG_OF_PRIOR_STAGE=y
+CONFIG_SIFIVE_SERIAL=y
diff --git a/configs/qemu-riscv64_defconfig b/configs/qemu-riscv64_defconfig
index 2d9ead93a2..a9d19a5574 100644
--- a/configs/qemu-riscv64_defconfig
+++ b/configs/qemu-riscv64_defconfig
@@ -8,3 +8,4 @@ CONFIG_DISPLAY_CPUINFO=y
 CONFIG_DISPLAY_BOARDINFO=y
 # CONFIG_CMD_MII is not set
 CONFIG_OF_PRIOR_STAGE=y
+CONFIG_SIFIVE_SERIAL=y
diff --git a/configs/qemu-riscv64_smode_defconfig b/configs/qemu-riscv64_smode_defconfig
index b012443370..8adc23f826 100644
--- a/configs/qemu-riscv64_smode_defconfig
+++ b/configs/qemu-riscv64_smode_defconfig
@@ -9,3 +9,4 @@ CONFIG_DISPLAY_CPUINFO=y
 CONFIG_DISPLAY_BOARDINFO=y
 # CONFIG_CMD_MII is not set
 CONFIG_OF_PRIOR_STAGE=y
+CONFIG_SIFIVE_SERIAL=y
-- 
2.17.1

  parent reply	other threads:[~2018-12-05  6:29 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-12-05  6:29 [U-Boot] [PATCH 0/2] SiFive UART support Anup Patel
2018-12-05  6:29 ` [U-Boot] [PATCH 1/2] drivers: serial: Add SiFive UART driver Anup Patel
2018-12-07 18:40   ` Palmer Dabbelt
2018-12-11 14:56     ` Anup Patel
2018-12-10  1:54   ` Bin Meng
2018-12-10 12:59     ` Anup Patel
2018-12-05  6:29 ` Anup Patel [this message]
2018-12-07 18:41   ` [U-Boot] [PATCH 2/2] riscv: qemu: Enable SiFive UART driver in defconfigs Palmer Dabbelt
2018-12-10  1:54   ` Bin Meng
2018-12-10 13:00     ` Anup Patel
2018-12-10  1:28 ` [U-Boot] [PATCH 0/2] SiFive UART support Bin Meng

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