From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.8 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0C513C04EB8 for ; Thu, 6 Dec 2018 21:29:05 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C2A3A2146F for ; Thu, 6 Dec 2018 21:29:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1544131744; bh=heAJkGru8HX8tMzCK2voOeskDnAaXPnQGMgbS61b6qM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=oayIgnvxqaI9v7ClR9Cx9PV3kbDqtwuPnVbjtmJk+2we199hA22iVOjZaXYdwBtuN ydTBL/MSpt+6RKzHSJg4dG2wxL1spb/lgVS9I/8S35+9ROw3NwA4v0dfEQkhBBRFRZ Gvpx6/BY4e2hrD4BTCLxEsWZ/xo+jFCngCFy+OQY= DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org C2A3A2146F Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726150AbeLFV3D (ORCPT ); Thu, 6 Dec 2018 16:29:03 -0500 Received: from mail.kernel.org ([198.145.29.99]:47564 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726018AbeLFV26 (ORCPT ); Thu, 6 Dec 2018 16:28:58 -0500 Received: from quaco.ghostprotocols.net (179.187.13.223.dynamic.adsl.gvt.net.br [179.187.13.223]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 645A82146D; Thu, 6 Dec 2018 21:28:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1544131738; bh=heAJkGru8HX8tMzCK2voOeskDnAaXPnQGMgbS61b6qM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=thwPp66kDftRTvSoEE7svms+QRnmUY09FsXCfP9OkunfpqN/PzqAcT2kIetgfRbRY Fc/inli30SlYKX/RHxcw2kErT/U6Ef0lpt8Q6W7gcNGKDUB9Uc1W06cgNR5bQjZgnD BKdlecSMrtg0o5CtlmB5aGN1NdtTpNPRFfORw3N8= From: Arnaldo Carvalho de Melo To: Ingo Molnar Cc: Clark Williams , linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, Florian Fainelli , Will Deacon , Alexander Shishkin , Namhyung Kim , Peter Zijlstra , Arnaldo Carvalho de Melo Subject: [PATCH 36/75] perf tests ARM: Disable breakpoint tests 32-bit Date: Thu, 6 Dec 2018 18:25:23 -0300 Message-Id: <20181206212602.20474-37-acme@kernel.org> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181206212602.20474-1-acme@kernel.org> References: <20181206212602.20474-1-acme@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Florian Fainelli The breakpoint tests on the ARM 32-bit kernel are broken in several ways. The breakpoint length requested does not necessarily match whether the function address has the Thumb bit (bit 0) set or not, and this does matter to the ARM kernel hw_breakpoint infrastructure. See [1] for background. [1]: https://lkml.org/lkml/2018/11/15/205 As Will indicated, the overflow handling would require single-stepping which is not supported at the moment. Just disable those tests for the ARM 32-bit platforms and update the comment above to explain these limitations. Co-developed-by: Will Deacon Signed-off-by: Florian Fainelli Signed-off-by: Will Deacon Acked-by: Jiri Olsa Cc: Alexander Shishkin Cc: Namhyung Kim Cc: Peter Zijlstra Link: http://lkml.kernel.org/r/20181203191138.2419-1-f.fainelli@gmail.com Signed-off-by: Arnaldo Carvalho de Melo --- tools/perf/tests/bp_signal.c | 20 ++++++++++++++------ 1 file changed, 14 insertions(+), 6 deletions(-) diff --git a/tools/perf/tests/bp_signal.c b/tools/perf/tests/bp_signal.c index a467615c5a0e..910e25e64188 100644 --- a/tools/perf/tests/bp_signal.c +++ b/tools/perf/tests/bp_signal.c @@ -291,12 +291,20 @@ int test__bp_signal(struct test *test __maybe_unused, int subtest __maybe_unused bool test__bp_signal_is_supported(void) { -/* - * The powerpc so far does not have support to even create - * instruction breakpoint using the perf event interface. - * Once it's there we can release this. - */ -#if defined(__powerpc__) || defined(__s390x__) + /* + * PowerPC and S390 do not support creation of instruction + * breakpoints using the perf_event interface. + * + * ARM requires explicit rounding down of the instruction + * pointer in Thumb mode, and then requires the single-step + * to be handled explicitly in the overflow handler to avoid + * stepping into the SIGIO handler and getting stuck on the + * breakpointed instruction. + * + * Just disable the test for these architectures until these + * issues are resolved. + */ +#if defined(__powerpc__) || defined(__s390x__) || defined(__arm__) return false; #else return true; -- 2.19.2