All of lore.kernel.org
 help / color / mirror / Atom feed
From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 26/37] hw/arm: versal: Use IRQs 111 - 118 for virtio-mmio
Date: Thu, 13 Dec 2018 14:54:34 +0000	[thread overview]
Message-ID: <20181213145445.17935-27-peter.maydell@linaro.org> (raw)
In-Reply-To: <20181213145445.17935-1-peter.maydell@linaro.org>

From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>

Use IRQs 111 - 118 for virtio-mmio. The interrupts we're currently
using 160+ are not available in the Versal GIC.

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20181129163655.20370-4-edgar.iglesias@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 include/hw/arm/xlnx-versal.h | 6 +++---
 hw/arm/xlnx-versal-virt.c    | 4 ++--
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h
index 9da621e4b68..76fb9de3918 100644
--- a/include/hw/arm/xlnx-versal.h
+++ b/include/hw/arm/xlnx-versal.h
@@ -75,9 +75,9 @@ typedef struct Versal {
 #define VERSAL_GEM1_IRQ_0          58
 #define VERSAL_GEM1_WAKE_IRQ_0     59
 
-/* Architecturally eserved IRQs suitable for virtualization.  */
-#define VERSAL_RSVD_HIGH_IRQ_FIRST 160
-#define VERSAL_RSVD_HIGH_IRQ_LAST  255
+/* Architecturally reserved IRQs suitable for virtualization.  */
+#define VERSAL_RSVD_IRQ_FIRST 111
+#define VERSAL_RSVD_IRQ_LAST  118
 
 #define MM_TOP_RSVD                 0xa0000000U
 #define MM_TOP_RSVD_SIZE            0x4000000
diff --git a/hw/arm/xlnx-versal-virt.c b/hw/arm/xlnx-versal-virt.c
index 2ed6ee9934d..c6feeac532f 100644
--- a/hw/arm/xlnx-versal-virt.c
+++ b/hw/arm/xlnx-versal-virt.c
@@ -351,7 +351,7 @@ static void create_virtio_regions(VersalVirt *s)
     for (i = 0; i < NUM_VIRTIO_TRANSPORT; i++) {
         char *name = g_strdup_printf("virtio%d", i);;
         hwaddr base = MM_TOP_RSVD + i * virtio_mmio_size;
-        int irq = VERSAL_RSVD_HIGH_IRQ_FIRST + i;
+        int irq = VERSAL_RSVD_IRQ_FIRST + i;
         MemoryRegion *mr;
         DeviceState *dev;
         qemu_irq pic_irq;
@@ -368,7 +368,7 @@ static void create_virtio_regions(VersalVirt *s)
 
     for (i = 0; i < NUM_VIRTIO_TRANSPORT; i++) {
         hwaddr base = MM_TOP_RSVD + i * virtio_mmio_size;
-        int irq = VERSAL_RSVD_HIGH_IRQ_FIRST + i;
+        int irq = VERSAL_RSVD_IRQ_FIRST + i;
         char *name = g_strdup_printf("/virtio_mmio@%" PRIx64, base);
 
         qemu_fdt_add_subnode(s->fdt, name);
-- 
2.19.2

  parent reply	other threads:[~2018-12-13 14:55 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-12-13 14:54 [Qemu-devel] [PULL 00/37] target-arm queue Peter Maydell
2018-12-13 14:54 ` [Qemu-devel] [PULL 01/37] hw: arm: musicpal: drop TYPE_WM8750 in object_property_set_link() Peter Maydell
2018-12-13 14:54 ` [Qemu-devel] [PULL 02/37] Allow AArch64 processors to boot from a kernel placed over 4GB Peter Maydell
2018-12-13 14:54 ` [Qemu-devel] [PULL 03/37] musicpal: Convert sysbus init function to realize function Peter Maydell
2018-12-13 14:54 ` [Qemu-devel] [PULL 04/37] block/noenand: " Peter Maydell
2018-12-13 14:54 ` [Qemu-devel] [PULL 05/37] char/grlib_apbuart: " Peter Maydell
2018-12-13 14:54 ` [Qemu-devel] [PULL 06/37] core/empty_slot: " Peter Maydell
2018-12-13 14:54 ` [Qemu-devel] [PULL 07/37] display/g364fb: " Peter Maydell
2018-12-13 14:54 ` [Qemu-devel] [PULL 08/37] dma/puv3_dma: " Peter Maydell
2018-12-13 14:54 ` [Qemu-devel] [PULL 09/37] gpio/puv3_gpio: " Peter Maydell
2018-12-13 14:54 ` [Qemu-devel] [PULL 10/37] milkymist-softusb: " Peter Maydell
2018-12-13 14:54 ` [Qemu-devel] [PULL 11/37] input/pl050: " Peter Maydell
2018-12-13 14:54 ` [Qemu-devel] [PULL 12/37] intc/puv3_intc: " Peter Maydell
2018-12-13 14:54 ` [Qemu-devel] [PULL 13/37] milkymist-hpdmc: " Peter Maydell
2018-12-13 14:54 ` [Qemu-devel] [PULL 14/37] milkymist-pfpu: " Peter Maydell
2018-12-13 14:54 ` [Qemu-devel] [PULL 15/37] puv3_pm.c: " Peter Maydell
2018-12-13 14:54 ` [Qemu-devel] [PULL 16/37] nvram/ds1225y: " Peter Maydell
2018-12-13 14:54 ` [Qemu-devel] [PULL 17/37] pci-bridge/dec: " Peter Maydell
2018-12-13 14:54 ` [Qemu-devel] [PULL 18/37] timer/etraxfs_timer: " Peter Maydell
2018-12-13 14:54 ` [Qemu-devel] [PULL 19/37] timer/grlib_gptimer: " Peter Maydell
2018-12-13 14:54 ` [Qemu-devel] [PULL 20/37] timer/puv3_ost: " Peter Maydell
2018-12-13 14:54 ` [Qemu-devel] [PULL 21/37] usb/tusb6010: " Peter Maydell
2018-12-13 14:54 ` [Qemu-devel] [PULL 22/37] xen_backend: remove xen_sysdev_init() function Peter Maydell
2018-12-13 14:54 ` [Qemu-devel] [PULL 23/37] core/sysbus: remove the SysBusDeviceClass::init path Peter Maydell
2018-12-13 14:54 ` [Qemu-devel] [PULL 24/37] hw/arm: versal: Remove bogus virtio-mmio creation Peter Maydell
2018-12-13 14:54 ` [Qemu-devel] [PULL 25/37] hw/arm: versal: Reduce number of virtio-mmio instances Peter Maydell
2018-12-13 14:54 ` Peter Maydell [this message]
2018-12-13 14:54 ` [Qemu-devel] [PULL 27/37] hw/arm: versal: Correct the nr of IRQs to 192 Peter Maydell
2018-12-13 14:54 ` [Qemu-devel] [PULL 28/37] target/arm: Move id_aa64mmfr* to ARMISARegisters Peter Maydell
2018-12-13 14:54 ` [Qemu-devel] [PULL 29/37] target/arm: Add HCR_EL2 bits up to ARMv8.5 Peter Maydell
2018-12-13 14:54 ` [Qemu-devel] [PULL 30/37] target/arm: Add SCR_EL3 " Peter Maydell
2018-12-13 14:54 ` [Qemu-devel] [PULL 31/37] target/arm: Fix HCR_EL2.TGE check in arm_phys_excp_target_el Peter Maydell
2018-12-13 14:54 ` [Qemu-devel] [PULL 32/37] target/arm: Tidy scr_write Peter Maydell
2018-12-13 14:54 ` [Qemu-devel] [PULL 33/37] target/arm: Implement the ARMv8.1-HPD extension Peter Maydell
2018-12-13 14:54 ` [Qemu-devel] [PULL 34/37] target/arm: Implement the ARMv8.2-AA32HPD extension Peter Maydell
2018-12-13 14:54 ` [Qemu-devel] [PULL 35/37] target/arm: Introduce arm_hcr_el2_eff Peter Maydell
2018-12-13 14:54 ` [Qemu-devel] [PULL 36/37] target/arm: Use arm_hcr_el2_eff more places Peter Maydell
2018-12-13 14:54 ` [Qemu-devel] [PULL 37/37] target/arm: Implement the ARMv8.1-LOR extension Peter Maydell
2018-12-14 16:43 ` [Qemu-devel] [PULL 00/37] target-arm queue Peter Maydell

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20181213145445.17935-27-peter.maydell@linaro.org \
    --to=peter.maydell@linaro.org \
    --cc=qemu-devel@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.