From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andrew Lunn Subject: Re: [PATCH V2] net: phy: tja11xx: Add TJA11xx PHY driver Date: Sat, 15 Dec 2018 18:01:53 +0100 Message-ID: <20181215170153.GA5922@lunn.ch> References: <20181214161149.6493-1-marex@denx.de> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Cc: netdev@vger.kernel.org, f.fainelli@gmail.com, Heiner Kallweit To: Marek Vasut Return-path: Received: from vps0.lunn.ch ([185.16.172.187]:48808 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726298AbeLORBy (ORCPT ); Sat, 15 Dec 2018 12:01:54 -0500 Content-Disposition: inline In-Reply-To: <20181214161149.6493-1-marex@denx.de> Sender: netdev-owner@vger.kernel.org List-ID: > +static struct tja11xx_phy_stats tja11xx_hw_stats[] = { > + { "phy_symbol_error_count", 20, 0, 0xffff }, > + { "phy_overtemp_error", 21, 1, BIT(1) }, > + { "phy_undervolt_error", 21, 3, BIT(3) }, > + { "phy_polarity_detect", 25, 6, BIT(6) }, > + { "phy_open_detect", 25, 7, BIT(7) }, > + { "phy_short_detect", 25, 8, BIT(8) }, Hi Marek You have a number of one bit counters here, which is pretty unusual. The names also don't really suggest they are counters. Florian, Heiner, do we want to allow this? Andrew