From mboxrd@z Thu Jan 1 00:00:00 1970 From: Simon Glass Date: Thu, 27 Dec 2018 13:24:41 -0700 Subject: [U-Boot] [PATCH 06/11] tegra: Add a delay in clock_start_periph_pll() In-Reply-To: <20181227202446.229042-1-sjg@chromium.org> References: <20181227202446.229042-1-sjg@chromium.org> Message-ID: <20181227202446.229042-7-sjg@chromium.org> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de This function enables a peripheral clock and then immediately sets its divider. Add a delay to allow the clock to settle first. This matches the delay in other places which do a similar thing. Without this, the I2S device on Nyan does not init properly. Signed-off-by: Simon Glass --- arch/arm/mach-tegra/clock.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-tegra/clock.c b/arch/arm/mach-tegra/clock.c index 096330748f2..dc5f16b41b6 100644 --- a/arch/arm/mach-tegra/clock.c +++ b/arch/arm/mach-tegra/clock.c @@ -477,6 +477,7 @@ unsigned clock_start_periph_pll(enum periph_id periph_id, reset_set_enable(periph_id, 1); clock_enable(periph_id); + udelay(2); effective_rate = clock_adjust_periph_pll_div(periph_id, parent, rate, NULL); -- 2.20.1.415.g653613c723-goog