From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([209.51.188.92]:46584) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ggXon-0005D8-Pj for qemu-devel@nongnu.org; Mon, 07 Jan 2019 11:32:02 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ggXok-0002Ot-H8 for qemu-devel@nongnu.org; Mon, 07 Jan 2019 11:32:00 -0500 Received: from mail-wm1-x32c.google.com ([2a00:1450:4864:20::32c]:33472) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1ggXoi-0002I7-Hw for qemu-devel@nongnu.org; Mon, 07 Jan 2019 11:31:57 -0500 Received: by mail-wm1-x32c.google.com with SMTP id r24so6496120wmh.0 for ; Mon, 07 Jan 2019 08:31:54 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id j14sm46039759wrv.96.2019.01.07.08.31.51 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 07 Jan 2019 08:31:52 -0800 (PST) From: Peter Maydell Date: Mon, 7 Jan 2019 16:31:07 +0000 Message-Id: <20190107163117.16269-28-peter.maydell@linaro.org> In-Reply-To: <20190107163117.16269-1-peter.maydell@linaro.org> References: <20190107163117.16269-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Subject: [Qemu-devel] [PULL 27/37] arm: Instantiate NRF51 random number generator List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org From: Steffen Görtz Use RNG in SOC. Signed-off-by: Steffen Görtz Reviewed-by: Stefan Hajnoczi Reviewed-by: Peter Maydell Signed-off-by: Stefan Hajnoczi Message-id: 20190103091119.9367-5-stefanha@redhat.com Signed-off-by: Peter Maydell --- include/hw/arm/nrf51_soc.h | 2 ++ hw/arm/nrf51_soc.c | 16 ++++++++++++++++ 2 files changed, 18 insertions(+) diff --git a/include/hw/arm/nrf51_soc.h b/include/hw/arm/nrf51_soc.h index 73fc92e9a8d..9e3ba916bd0 100644 --- a/include/hw/arm/nrf51_soc.h +++ b/include/hw/arm/nrf51_soc.h @@ -13,6 +13,7 @@ #include "hw/sysbus.h" #include "hw/arm/armv7m.h" #include "hw/char/nrf51_uart.h" +#include "hw/misc/nrf51_rng.h" #define TYPE_NRF51_SOC "nrf51-soc" #define NRF51_SOC(obj) \ @@ -26,6 +27,7 @@ typedef struct NRF51State { ARMv7MState cpu; NRF51UARTState uart; + NRF51RNGState rng; MemoryRegion iomem; MemoryRegion sram; diff --git a/hw/arm/nrf51_soc.c b/hw/arm/nrf51_soc.c index 55f8eaafcb0..d2a19b8eadd 100644 --- a/hw/arm/nrf51_soc.c +++ b/hw/arm/nrf51_soc.c @@ -86,6 +86,19 @@ static void nrf51_soc_realize(DeviceState *dev_soc, Error **errp) qdev_get_gpio_in(DEVICE(&s->cpu), BASE_TO_IRQ(NRF51_UART_BASE))); + /* RNG */ + object_property_set_bool(OBJECT(&s->rng), true, "realized", &err); + if (err) { + error_propagate(errp, err); + return; + } + + mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->rng), 0); + memory_region_add_subregion_overlap(&s->container, NRF51_RNG_BASE, mr, 0); + sysbus_connect_irq(SYS_BUS_DEVICE(&s->rng), 0, + qdev_get_gpio_in(DEVICE(&s->cpu), + BASE_TO_IRQ(NRF51_RNG_BASE))); + create_unimplemented_device("nrf51_soc.io", NRF51_IOMEM_BASE, NRF51_IOMEM_SIZE); create_unimplemented_device("nrf51_soc.ficr", NRF51_FICR_BASE, @@ -110,6 +123,9 @@ static void nrf51_soc_init(Object *obj) TYPE_NRF51_UART); object_property_add_alias(obj, "serial0", OBJECT(&s->uart), "chardev", &error_abort); + + sysbus_init_child_obj(obj, "rng", &s->rng, sizeof(s->rng), + TYPE_NRF51_RNG); } static Property nrf51_soc_properties[] = { -- 2.19.2