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From: Kishon Vijay Abraham I <kishon@ti.com>
To: Gustavo Pimentel <gustavo.pimentel@synopsys.com>,
	Rob Herring <robh+dt@kernel.org>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>,
	Jingoo Han <jingoohan1@gmail.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Mark Rutland <mark.rutland@arm.com>,
	Arnd Bergmann <arnd@arndb.de>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Murali Karicheri <m-karicheri2@ti.com>,
	Jesper Nilsson <jesper.nilsson@axis.com>,
	<linux-pci@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>, <linux-omap@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-arm-kernel@axis.com>
Subject: [PATCH 21/24] PCI: designware-ep: Configure RESBAR to advertise the smallest size
Date: Mon, 14 Jan 2019 18:54:21 +0530	[thread overview]
Message-ID: <20190114132424.6445-22-kishon@ti.com> (raw)
In-Reply-To: <20190114132424.6445-1-kishon@ti.com>

Configure RESBAR capability to advertise the smallest size (1MB) for
couple of reasons. A) Host side resource allocation of BAR fails for
larger sizes. B) Endpoint function driver does not allocate memory
for all supported sizes in RESBAR capability.
If and when there is a usecase required to add more flexibility using
RESBAR, this can be revisited.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
 .../pci/controller/dwc/pcie-designware-ep.c   | 34 +++++++++++++++++++
 1 file changed, 34 insertions(+)

diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c
index cd51b008858c..47cc06bac91f 100644
--- a/drivers/pci/controller/dwc/pcie-designware-ep.c
+++ b/drivers/pci/controller/dwc/pcie-designware-ep.c
@@ -502,10 +502,32 @@ void dw_pcie_ep_exit(struct dw_pcie_ep *ep)
 	pci_epc_mem_exit(epc);
 }
 
+static unsigned int dw_pcie_ep_find_ext_capability(struct dw_pcie *pci, int cap)
+{
+	u32 header;
+	int pos = PCI_CFG_SPACE_SIZE;
+
+	while (pos) {
+		header = dw_pcie_readl_dbi(pci, pos);
+		if (PCI_EXT_CAP_ID(header) == cap)
+			return pos;
+
+		pos = PCI_EXT_CAP_NEXT(header);
+		if (!pos)
+			break;
+	}
+
+	return 0;
+}
+
 int dw_pcie_ep_init(struct dw_pcie_ep *ep)
 {
+	int i;
 	int ret;
+	u32 reg;
 	void *addr;
+	unsigned int nbars;
+	unsigned int offset;
 	struct pci_epc *epc;
 	struct dw_pcie *pci = to_dw_pcie_from_ep(ep);
 	struct device *dev = pci->dev;
@@ -589,6 +611,18 @@ int dw_pcie_ep_init(struct dw_pcie_ep *ep)
 
 	ep->msix_cap = dw_pcie_ep_find_capability(pci, PCI_CAP_ID_MSIX);
 
+	offset = dw_pcie_ep_find_ext_capability(pci, PCI_EXT_CAP_ID_REBAR);
+	if (offset) {
+		reg = dw_pcie_readl_dbi(pci, offset + PCI_REBAR_CTRL);
+		nbars = (reg & PCI_REBAR_CTRL_NBAR_MASK) >>
+			PCI_REBAR_CTRL_NBAR_SHIFT;
+
+		dw_pcie_dbi_ro_wr_en(pci);
+		for (i = 0; i < nbars; i++, offset += PCI_REBAR_CTRL)
+			dw_pcie_writel_dbi(pci, offset + PCI_REBAR_CAP, 0x0);
+		dw_pcie_dbi_ro_wr_dis(pci);
+	}
+
 	dw_pcie_setup(pci);
 
 	return 0;
-- 
2.17.1


WARNING: multiple messages have this Message-ID
From: Kishon Vijay Abraham I <kishon@ti.com>
To: Gustavo Pimentel <gustavo.pimentel@synopsys.com>,
	Rob Herring <robh+dt@kernel.org>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>,
	Jingoo Han <jingoohan1@gmail.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Mark Rutland <mark.rutland@arm.com>,
	Arnd Bergmann <arnd@arndb.de>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Murali Karicheri <m-karicheri2@ti.com>,
	Jesper Nilsson <jesper.nilsson@axis.com>,
	linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-omap@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, linux-arm-kernel@axis.com
Subject: [PATCH 21/24] PCI: designware-ep: Configure RESBAR to advertise the smallest size
Date: Mon, 14 Jan 2019 18:54:21 +0530	[thread overview]
Message-ID: <20190114132424.6445-22-kishon@ti.com> (raw)
In-Reply-To: <20190114132424.6445-1-kishon@ti.com>

Configure RESBAR capability to advertise the smallest size (1MB) for
couple of reasons. A) Host side resource allocation of BAR fails for
larger sizes. B) Endpoint function driver does not allocate memory
for all supported sizes in RESBAR capability.
If and when there is a usecase required to add more flexibility using
RESBAR, this can be revisited.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
 .../pci/controller/dwc/pcie-designware-ep.c   | 34 +++++++++++++++++++
 1 file changed, 34 insertions(+)

diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c
index cd51b008858c..47cc06bac91f 100644
--- a/drivers/pci/controller/dwc/pcie-designware-ep.c
+++ b/drivers/pci/controller/dwc/pcie-designware-ep.c
@@ -502,10 +502,32 @@ void dw_pcie_ep_exit(struct dw_pcie_ep *ep)
 	pci_epc_mem_exit(epc);
 }
 
+static unsigned int dw_pcie_ep_find_ext_capability(struct dw_pcie *pci, int cap)
+{
+	u32 header;
+	int pos = PCI_CFG_SPACE_SIZE;
+
+	while (pos) {
+		header = dw_pcie_readl_dbi(pci, pos);
+		if (PCI_EXT_CAP_ID(header) == cap)
+			return pos;
+
+		pos = PCI_EXT_CAP_NEXT(header);
+		if (!pos)
+			break;
+	}
+
+	return 0;
+}
+
 int dw_pcie_ep_init(struct dw_pcie_ep *ep)
 {
+	int i;
 	int ret;
+	u32 reg;
 	void *addr;
+	unsigned int nbars;
+	unsigned int offset;
 	struct pci_epc *epc;
 	struct dw_pcie *pci = to_dw_pcie_from_ep(ep);
 	struct device *dev = pci->dev;
@@ -589,6 +611,18 @@ int dw_pcie_ep_init(struct dw_pcie_ep *ep)
 
 	ep->msix_cap = dw_pcie_ep_find_capability(pci, PCI_CAP_ID_MSIX);
 
+	offset = dw_pcie_ep_find_ext_capability(pci, PCI_EXT_CAP_ID_REBAR);
+	if (offset) {
+		reg = dw_pcie_readl_dbi(pci, offset + PCI_REBAR_CTRL);
+		nbars = (reg & PCI_REBAR_CTRL_NBAR_MASK) >>
+			PCI_REBAR_CTRL_NBAR_SHIFT;
+
+		dw_pcie_dbi_ro_wr_en(pci);
+		for (i = 0; i < nbars; i++, offset += PCI_REBAR_CTRL)
+			dw_pcie_writel_dbi(pci, offset + PCI_REBAR_CAP, 0x0);
+		dw_pcie_dbi_ro_wr_dis(pci);
+	}
+
 	dw_pcie_setup(pci);
 
 	return 0;
-- 
2.17.1

WARNING: multiple messages have this Message-ID
From: Kishon Vijay Abraham I <kishon@ti.com>
To: Gustavo Pimentel <gustavo.pimentel@synopsys.com>,
	Rob Herring <robh+dt@kernel.org>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
	devicetree@vger.kernel.org,
	Jesper Nilsson <jesper.nilsson@axis.com>,
	Arnd Bergmann <arnd@arndb.de>, Jingoo Han <jingoohan1@gmail.com>,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@axis.com, Kishon Vijay Abraham I <kishon@ti.com>,
	Murali Karicheri <m-karicheri2@ti.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Bjorn Helgaas <bhelgaas@google.com>,
	linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: [PATCH 21/24] PCI: designware-ep: Configure RESBAR to advertise the smallest size
Date: Mon, 14 Jan 2019 18:54:21 +0530	[thread overview]
Message-ID: <20190114132424.6445-22-kishon@ti.com> (raw)
In-Reply-To: <20190114132424.6445-1-kishon@ti.com>

Configure RESBAR capability to advertise the smallest size (1MB) for
couple of reasons. A) Host side resource allocation of BAR fails for
larger sizes. B) Endpoint function driver does not allocate memory
for all supported sizes in RESBAR capability.
If and when there is a usecase required to add more flexibility using
RESBAR, this can be revisited.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
 .../pci/controller/dwc/pcie-designware-ep.c   | 34 +++++++++++++++++++
 1 file changed, 34 insertions(+)

diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c
index cd51b008858c..47cc06bac91f 100644
--- a/drivers/pci/controller/dwc/pcie-designware-ep.c
+++ b/drivers/pci/controller/dwc/pcie-designware-ep.c
@@ -502,10 +502,32 @@ void dw_pcie_ep_exit(struct dw_pcie_ep *ep)
 	pci_epc_mem_exit(epc);
 }
 
+static unsigned int dw_pcie_ep_find_ext_capability(struct dw_pcie *pci, int cap)
+{
+	u32 header;
+	int pos = PCI_CFG_SPACE_SIZE;
+
+	while (pos) {
+		header = dw_pcie_readl_dbi(pci, pos);
+		if (PCI_EXT_CAP_ID(header) == cap)
+			return pos;
+
+		pos = PCI_EXT_CAP_NEXT(header);
+		if (!pos)
+			break;
+	}
+
+	return 0;
+}
+
 int dw_pcie_ep_init(struct dw_pcie_ep *ep)
 {
+	int i;
 	int ret;
+	u32 reg;
 	void *addr;
+	unsigned int nbars;
+	unsigned int offset;
 	struct pci_epc *epc;
 	struct dw_pcie *pci = to_dw_pcie_from_ep(ep);
 	struct device *dev = pci->dev;
@@ -589,6 +611,18 @@ int dw_pcie_ep_init(struct dw_pcie_ep *ep)
 
 	ep->msix_cap = dw_pcie_ep_find_capability(pci, PCI_CAP_ID_MSIX);
 
+	offset = dw_pcie_ep_find_ext_capability(pci, PCI_EXT_CAP_ID_REBAR);
+	if (offset) {
+		reg = dw_pcie_readl_dbi(pci, offset + PCI_REBAR_CTRL);
+		nbars = (reg & PCI_REBAR_CTRL_NBAR_MASK) >>
+			PCI_REBAR_CTRL_NBAR_SHIFT;
+
+		dw_pcie_dbi_ro_wr_en(pci);
+		for (i = 0; i < nbars; i++, offset += PCI_REBAR_CTRL)
+			dw_pcie_writel_dbi(pci, offset + PCI_REBAR_CAP, 0x0);
+		dw_pcie_dbi_ro_wr_dis(pci);
+	}
+
 	dw_pcie_setup(pci);
 
 	return 0;
-- 
2.17.1


_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2019-01-14 13:27 UTC|newest]

Thread overview: 100+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-14 13:24 [PATCH 00/24] Add support for PCIe RC and EP mode in TI's AM654 SoC Kishon Vijay Abraham I
2019-01-14 13:24 ` Kishon Vijay Abraham I
2019-01-14 13:24 ` Kishon Vijay Abraham I
2019-01-14 13:24 ` [PATCH 01/24] PCI: keystone: Add start_link/stop_link dw_pcie_ops Kishon Vijay Abraham I
2019-01-14 13:24   ` Kishon Vijay Abraham I
2019-01-14 13:24   ` Kishon Vijay Abraham I
2019-01-14 13:24 ` [PATCH 02/24] PCI: keystone: Cleanup error_irq configuration Kishon Vijay Abraham I
2019-01-14 13:24   ` Kishon Vijay Abraham I
2019-01-14 13:24   ` Kishon Vijay Abraham I
2019-01-14 13:24 ` [PATCH 03/24] dt-bindings: PCI: keystone: Add "reg-names" binding information Kishon Vijay Abraham I
2019-01-14 13:24   ` Kishon Vijay Abraham I
2019-01-14 13:24   ` Kishon Vijay Abraham I
2019-01-22  0:31   ` Rob Herring
2019-01-22  0:31     ` Rob Herring
2019-01-22  0:31     ` Rob Herring
2019-01-14 13:24 ` [PATCH 04/24] PCI: keystone: Perform host initialization in a single function Kishon Vijay Abraham I
2019-01-14 13:24   ` Kishon Vijay Abraham I
2019-01-14 13:24   ` Kishon Vijay Abraham I
2019-01-14 13:24 ` [PATCH 05/24] PCI: keystone: Use platform_get_resource_byname to get memory resources Kishon Vijay Abraham I
2019-01-14 13:24   ` Kishon Vijay Abraham I
2019-01-14 13:24   ` Kishon Vijay Abraham I
2019-01-14 13:24 ` [PATCH 06/24] PCI: keystone: Move initializations to appropriate places Kishon Vijay Abraham I
2019-01-14 13:24   ` Kishon Vijay Abraham I
2019-01-14 13:24   ` Kishon Vijay Abraham I
2019-01-14 13:24 ` [PATCH 07/24] dt-bindings: PCI: Add dt-binding to configure PCIe mode Kishon Vijay Abraham I
2019-01-14 13:24   ` Kishon Vijay Abraham I
2019-01-14 13:24   ` Kishon Vijay Abraham I
2019-01-22  0:32   ` Rob Herring
2019-01-22  0:32     ` Rob Herring
2019-01-22  0:32     ` Rob Herring
2019-01-14 13:24 ` [PATCH 08/24] PCI: keystone: Explicitly set the " Kishon Vijay Abraham I
2019-01-14 13:24   ` Kishon Vijay Abraham I
2019-01-14 13:24   ` Kishon Vijay Abraham I
2019-01-14 13:24 ` [PATCH 09/24] dt-bindings: PCI: Document "atu" reg-names Kishon Vijay Abraham I
2019-01-14 13:24   ` Kishon Vijay Abraham I
2019-01-14 13:24   ` Kishon Vijay Abraham I
2019-01-22  0:48   ` Rob Herring
2019-01-22  0:48     ` Rob Herring
2019-01-23 10:04     ` Kishon Vijay Abraham I
2019-01-23 10:04       ` Kishon Vijay Abraham I
2019-01-23 10:04       ` Kishon Vijay Abraham I
2019-01-14 13:24 ` [PATCH 10/24] PCI: dwc: Enable iATU unroll for endpoint too Kishon Vijay Abraham I
2019-01-14 13:24   ` Kishon Vijay Abraham I
2019-01-14 13:24   ` Kishon Vijay Abraham I
2019-01-14 13:24 ` [PATCH 11/24] PCI: dwc: Fix ATU identification for designware version >= 4.80 Kishon Vijay Abraham I
2019-01-14 13:24   ` Kishon Vijay Abraham I
2019-01-14 13:24   ` Kishon Vijay Abraham I
2019-01-14 13:24 ` [PATCH 12/24] PCI: keystone: Prevent ARM32 specific code to be compiled for ARM64 Kishon Vijay Abraham I
2019-01-14 13:24   ` Kishon Vijay Abraham I
2019-01-14 13:24   ` Kishon Vijay Abraham I
2019-01-14 13:24 ` [PATCH 13/24] dt-bindings: PCI: Add PCI RC dt binding documentation for AM654 Kishon Vijay Abraham I
2019-01-14 13:24   ` Kishon Vijay Abraham I
2019-01-14 13:24   ` Kishon Vijay Abraham I
2019-01-22  0:48   ` Rob Herring
2019-01-22  0:48     ` Rob Herring
2019-01-22  0:48     ` Rob Herring
2019-01-14 13:24 ` [PATCH 14/24] PCI: keystone: Add support for PCIe RC in AM654x Platforms Kishon Vijay Abraham I
2019-01-14 13:24   ` Kishon Vijay Abraham I
2019-01-14 13:24   ` Kishon Vijay Abraham I
2019-01-14 13:24 ` [PATCH 15/24] PCI: keystone: Invoke phy_reset API before enabling PHY Kishon Vijay Abraham I
2019-01-14 13:24   ` Kishon Vijay Abraham I
2019-01-14 13:24   ` Kishon Vijay Abraham I
2019-01-14 13:24 ` [PATCH 16/24] PCI: endpoint: Add support to allocate aligned buffers to be mapped in BARs Kishon Vijay Abraham I
2019-01-14 13:24   ` Kishon Vijay Abraham I
2019-01-14 13:24   ` Kishon Vijay Abraham I
2019-01-14 13:24 ` [PATCH 17/24] PCI: dwc: Add const qualifier to struct dw_pcie_ep_ops Kishon Vijay Abraham I
2019-01-14 13:24   ` Kishon Vijay Abraham I
2019-01-14 13:24   ` Kishon Vijay Abraham I
2019-01-14 13:24 ` [PATCH 18/24] PCI: dwc: Fix dw_pcie_ep_find_capability to return correct capability offset Kishon Vijay Abraham I
2019-01-14 13:24   ` Kishon Vijay Abraham I
2019-01-14 13:24   ` Kishon Vijay Abraham I
2019-01-29  9:25   ` Gustavo Pimentel
2019-01-29  9:25     ` Gustavo Pimentel
2019-01-29  9:25     ` Gustavo Pimentel
2019-01-29 10:19     ` Kishon Vijay Abraham I
2019-01-29 10:19       ` Kishon Vijay Abraham I
2019-01-29 10:19       ` Kishon Vijay Abraham I
2019-01-14 13:24 ` [PATCH 19/24] PCI: dwc: Add callbacks for accessing dbi2 address space Kishon Vijay Abraham I
2019-01-14 13:24   ` Kishon Vijay Abraham I
2019-01-14 13:24   ` Kishon Vijay Abraham I
2019-01-14 13:24 ` [PATCH 20/24] PCI: keystone: Add support for PCIe EP in AM654x Platforms Kishon Vijay Abraham I
2019-01-14 13:24   ` Kishon Vijay Abraham I
2019-01-14 13:24   ` Kishon Vijay Abraham I
2019-01-14 13:24 ` Kishon Vijay Abraham I [this message]
2019-01-14 13:24   ` [PATCH 21/24] PCI: designware-ep: Configure RESBAR to advertise the smallest size Kishon Vijay Abraham I
2019-01-14 13:24   ` Kishon Vijay Abraham I
2019-01-14 13:24 ` [PATCH 22/24] PCI: designware-ep: Use aligned ATU window for raising MSI interrupts Kishon Vijay Abraham I
2019-01-14 13:24   ` Kishon Vijay Abraham I
2019-01-14 13:24   ` Kishon Vijay Abraham I
2019-01-14 13:24 ` [PATCH 23/24] misc: pci_endpoint_test: Add support to test PCI EP in AM654x Kishon Vijay Abraham I
2019-01-14 13:24   ` Kishon Vijay Abraham I
2019-01-14 13:24   ` Kishon Vijay Abraham I
2019-01-14 13:24 ` [PATCH 24/24] misc: pci_endpoint_test: Fix test_reg_bar to be updated in pci_endpoint_test Kishon Vijay Abraham I
2019-01-14 13:24   ` Kishon Vijay Abraham I
2019-01-14 13:24   ` Kishon Vijay Abraham I
2019-02-04 16:40 ` [PATCH 00/24] Add support for PCIe RC and EP mode in TI's AM654 SoC Lorenzo Pieralisi
2019-02-04 16:40   ` Lorenzo Pieralisi
2019-02-06 12:50   ` Kishon Vijay Abraham I
2019-02-06 12:50     ` Kishon Vijay Abraham I
2019-02-06 12:50     ` Kishon Vijay Abraham I

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