[PATCH 1/2] ARCv2: Enable unaligned access in early ASM code

[PATCH 1/2] ARCv2: Enable unaligned access in early ASM code

[Eugeniy Paltsev]

Even though we do enable AD bit in arc_init_IRQ() we need to do
it in early ASM code otherwise we may face unaligned data until
we reach arc_init_IRQ() because GCC starting from v8.1.0 actively
generates unaligned data as it assumes that:
 * ARCv2 always has support of unaliged data
 * This support is turned on in runtime

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
---
 arch/arc/kernel/head.S | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arc/kernel/head.S b/arch/arc/kernel/head.S
index 8b90d25a15cc..d5b7a572365a 100644
--- a/arch/arc/kernel/head.S
+++ b/arch/arc/kernel/head.S
@@ -17,6 +17,9 @@
 #include <asm/entry.h>
 #include <asm/arcregs.h>
 #include <asm/cache.h>
+#ifdef CONFIG_ISA_ARCV2
+#include <asm/irqflags-arcv2.h>
+#endif
 
 .macro CPU_EARLY_SETUP
 
@@ -47,6 +50,13 @@
 	sr	r5, [ARC_REG_DC_CTRL]
 
 1:
+
+#ifdef CONFIG_ISA_ARCV2
+	; Enable handling of unaligned access in the CPU as by default
+	; this HW feature is disabled while GCC starting from 8.1.0
+	; unconditionally uses it for ARC HS cores.
+	flag    1 << STATUS_AD_BIT
+#endif
 .endm
 
 	.section .init.text, "ax",@progbits
-- 
2.14.5

[PATCH 1/2] ARCv2: Enable unaligned access in early ASM code

[Eugeniy Paltsev]

Even though we do enable AD bit in arc_init_IRQ() we need to do
it in early ASM code otherwise we may face unaligned data until
we reach arc_init_IRQ() because GCC starting from v8.1.0 actively
generates unaligned data as it assumes that:
 * ARCv2 always has support of unaliged data
 * This support is turned on in runtime

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev at synopsys.com>
---
 arch/arc/kernel/head.S | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arc/kernel/head.S b/arch/arc/kernel/head.S
index 8b90d25a15cc..d5b7a572365a 100644
--- a/arch/arc/kernel/head.S
+++ b/arch/arc/kernel/head.S
@@ -17,6 +17,9 @@
 #include <asm/entry.h>
 #include <asm/arcregs.h>
 #include <asm/cache.h>
+#ifdef CONFIG_ISA_ARCV2
+#include <asm/irqflags-arcv2.h>
+#endif
 
 .macro CPU_EARLY_SETUP
 
@@ -47,6 +50,13 @@
 	sr	r5, [ARC_REG_DC_CTRL]
 
 1:
+
+#ifdef CONFIG_ISA_ARCV2
+	; Enable handling of unaligned access in the CPU as by default
+	; this HW feature is disabled while GCC starting from 8.1.0
+	; unconditionally uses it for ARC HS cores.
+	flag    1 << STATUS_AD_BIT
+#endif
 .endm
 
 	.section .init.text, "ax", at progbits
-- 
2.14.5

[PATCH 2/2] ARCv2: enable HAVE_EFFICIENT_UNALIGNED_ACCESS

[Eugeniy Paltsev]

Select HAVE_EFFICIENT_UNALIGNED_ACCESS for ARCv2 as we unconditionally
enable unaligned access in HW.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
---
 arch/arc/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig
index 376366a7db81..20ba916c50a3 100644
--- a/arch/arc/Kconfig
+++ b/arch/arc/Kconfig
@@ -117,6 +117,7 @@ config ISA_ARCOMPACT
 config ISA_ARCV2
 	bool "ARC ISA v2"
 	select ARC_TIMERS_64BIT
+	select HAVE_EFFICIENT_UNALIGNED_ACCESS
 	help
 	  ISA for the Next Generation ARC-HS cores
 
-- 
2.14.5

[PATCH 2/2] ARCv2: enable HAVE_EFFICIENT_UNALIGNED_ACCESS

[Eugeniy Paltsev]

Select HAVE_EFFICIENT_UNALIGNED_ACCESS for ARCv2 as we unconditionally
enable unaligned access in HW.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev at synopsys.com>
---
 arch/arc/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig
index 376366a7db81..20ba916c50a3 100644
--- a/arch/arc/Kconfig
+++ b/arch/arc/Kconfig
@@ -117,6 +117,7 @@ config ISA_ARCOMPACT
 config ISA_ARCV2
 	bool "ARC ISA v2"
 	select ARC_TIMERS_64BIT
+	select HAVE_EFFICIENT_UNALIGNED_ACCESS
 	help
 	  ISA for the Next Generation ARC-HS cores
 
-- 
2.14.5

[PATCH 1/2] ARCv2: Enable unaligned access in early ASM code

[Vineet Gupta]

On 1/28/19 11:27 PM, Alexey Brodkin wrote:
> Hi Vineet,
>
>> -----Original Message-----
>> From: Eugeniy Paltsev <Eugeniy.Paltsev at synopsys.com>
>> Sent: Wednesday, January 16, 2019 2:30 PM
>> To: linux-snps-arc at lists.infradead.org; Vineet Gupta <vgupta at synopsys.com>
>> Cc: linux-kernel at vger.kernel.org; Alexey Brodkin <abrodkin at synopsys.com>; Eugeniy Paltsev
>> <Eugeniy.Paltsev at synopsys.com>
>> Subject: [PATCH 1/2] ARCv2: Enable unaligned access in early ASM code
>>
>> Even though we do enable AD bit in arc_init_IRQ() we need to do
>> it in early ASM code otherwise we may face unaligned data until
>> we reach arc_init_IRQ() because GCC starting from v8.1.0 actively
>> generates unaligned data as it assumes that:
>>  * ARCv2 always has support of unaliged data
>>  * This support is turned on in runtime
>>
>> Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev at synopsys.com>
> I remember you wanted to have a Kconfig toggle for unaligned access support
> but since this commit is more of a fix for existing (always enabling)
> implementation and so I propose to accept is as it is and moreover backport
> to stable kernels.
>
> And in the separate change introduce discussed Kconfig toggle so we may test
> RTL with unaligned support disabled.
>
> Sounds good?

Fair enough. And to avoid backport merge conflicts we need to keep the redundant
AD bit setting in intc-arcv2.c and rework in Eugeniy's series.

-Vineet

Re: [PATCH 1/2] ARCv2: Enable unaligned access in early ASM code

[Vineet Gupta]

On 1/16/19 3:29 AM, Eugeniy Paltsev wrote:
> Even though we do enable AD bit in arc_init_IRQ() we need to do
> it in early ASM code otherwise we may face unaligned data until
> we reach arc_init_IRQ() because GCC starting from v8.1.0 actively
> generates unaligned data as it assumes that:
>  * ARCv2 always has support of unaliged data
>  * This support is turned on in runtime
> 
> Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
> ---
>  arch/arc/kernel/head.S | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/arch/arc/kernel/head.S b/arch/arc/kernel/head.S
> index 8b90d25a15cc..d5b7a572365a 100644
> --- a/arch/arc/kernel/head.S
> +++ b/arch/arc/kernel/head.S
> @@ -17,6 +17,9 @@
>  #include <asm/entry.h>
>  #include <asm/arcregs.h>
>  #include <asm/cache.h>
> +#ifdef CONFIG_ISA_ARCV2
> +#include <asm/irqflags-arcv2.h>
> +#endif

I presume there is no specific reason to include this conditionally.
irqflags.h already includes the right version.

>  
>  .macro CPU_EARLY_SETUP
>  
> @@ -47,6 +50,13 @@
>  	sr	r5, [ARC_REG_DC_CTRL]
>  
>  1:
> +
> +#ifdef CONFIG_ISA_ARCV2
> +	; Enable handling of unaligned access in the CPU as by default
> +	; this HW feature is disabled while GCC starting from 8.1.0
> +	; unconditionally uses it for ARC HS cores.
> +	flag    1 << STATUS_AD_BIT
> +#endif
>  .endm
>  
>  	.section .init.text, "ax",@progbits
> 

[PATCH 1/2] ARCv2: Enable unaligned access in early ASM code

[Vineet Gupta]

On 1/16/19 3:29 AM, Eugeniy Paltsev wrote:
> Even though we do enable AD bit in arc_init_IRQ() we need to do
> it in early ASM code otherwise we may face unaligned data until
> we reach arc_init_IRQ() because GCC starting from v8.1.0 actively
> generates unaligned data as it assumes that:
>  * ARCv2 always has support of unaliged data
>  * This support is turned on in runtime
> 
> Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev at synopsys.com>
> ---
>  arch/arc/kernel/head.S | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/arch/arc/kernel/head.S b/arch/arc/kernel/head.S
> index 8b90d25a15cc..d5b7a572365a 100644
> --- a/arch/arc/kernel/head.S
> +++ b/arch/arc/kernel/head.S
> @@ -17,6 +17,9 @@
>  #include <asm/entry.h>
>  #include <asm/arcregs.h>
>  #include <asm/cache.h>
> +#ifdef CONFIG_ISA_ARCV2
> +#include <asm/irqflags-arcv2.h>
> +#endif

I presume there is no specific reason to include this conditionally.
irqflags.h already includes the right version.

>  
>  .macro CPU_EARLY_SETUP
>  
> @@ -47,6 +50,13 @@
>  	sr	r5, [ARC_REG_DC_CTRL]
>  
>  1:
> +
> +#ifdef CONFIG_ISA_ARCV2
> +	; Enable handling of unaligned access in the CPU as by default
> +	; this HW feature is disabled while GCC starting from 8.1.0
> +	; unconditionally uses it for ARC HS cores.
> +	flag    1 << STATUS_AD_BIT
> +#endif
>  .endm
>  
>  	.section .init.text, "ax", at progbits
> 

Re: [PATCH 1/2] ARCv2: Enable unaligned access in early ASM code

[Eugeniy Paltsev]

On Tue, 2019-01-29 at 09:21 -0800, Vineet Gupta wrote:
> On 1/16/19 3:29 AM, Eugeniy Paltsev wrote:
> > Even though we do enable AD bit in arc_init_IRQ() we need to do
> > it in early ASM code otherwise we may face unaligned data until
> > we reach arc_init_IRQ() because GCC starting from v8.1.0 actively
> > generates unaligned data as it assumes that:
> >  * ARCv2 always has support of unaliged data
> >  * This support is turned on in runtime
> > 
> > Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
> > ---
> >  arch/arc/kernel/head.S | 10 ++++++++++
> >  1 file changed, 10 insertions(+)
> > 
> > diff --git a/arch/arc/kernel/head.S b/arch/arc/kernel/head.S
> > index 8b90d25a15cc..d5b7a572365a 100644
> > --- a/arch/arc/kernel/head.S
> > +++ b/arch/arc/kernel/head.S
> > @@ -17,6 +17,9 @@
> >  #include <asm/entry.h>
> >  #include <asm/arcregs.h>
> >  #include <asm/cache.h>
> > +#ifdef CONFIG_ISA_ARCV2
> > +#include <asm/irqflags-arcv2.h>
> > +#endif
> 
> I presume there is no specific reason to include this conditionally.
> irqflags.h already includes the right version.

Agree.
I've just forgotten about common irqflags.h

Will fix in V2.

> >  
> >  .macro CPU_EARLY_SETUP
> >  
> > @@ -47,6 +50,13 @@
> >  	sr	r5, [ARC_REG_DC_CTRL]
> >  
> >  1:
> > +
> > +#ifdef CONFIG_ISA_ARCV2
> > +	; Enable handling of unaligned access in the CPU as by default
> > +	; this HW feature is disabled while GCC starting from 8.1.0
> > +	; unconditionally uses it for ARC HS cores.
> > +	flag    1 << STATUS_AD_BIT
> > +#endif
> >  .endm
> >  
> >  	.section .init.text, "ax",@progbits
> > 
> 
> 
-- 
 Eugeniy Paltsev

[PATCH 1/2] ARCv2: Enable unaligned access in early ASM code

[Eugeniy Paltsev]

On Tue, 2019-01-29@09:21 -0800, Vineet Gupta wrote:
> On 1/16/19 3:29 AM, Eugeniy Paltsev wrote:
> > Even though we do enable AD bit in arc_init_IRQ() we need to do
> > it in early ASM code otherwise we may face unaligned data until
> > we reach arc_init_IRQ() because GCC starting from v8.1.0 actively
> > generates unaligned data as it assumes that:
> >  * ARCv2 always has support of unaliged data
> >  * This support is turned on in runtime
> > 
> > Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev at synopsys.com>
> > ---
> >  arch/arc/kernel/head.S | 10 ++++++++++
> >  1 file changed, 10 insertions(+)
> > 
> > diff --git a/arch/arc/kernel/head.S b/arch/arc/kernel/head.S
> > index 8b90d25a15cc..d5b7a572365a 100644
> > --- a/arch/arc/kernel/head.S
> > +++ b/arch/arc/kernel/head.S
> > @@ -17,6 +17,9 @@
> >  #include <asm/entry.h>
> >  #include <asm/arcregs.h>
> >  #include <asm/cache.h>
> > +#ifdef CONFIG_ISA_ARCV2
> > +#include <asm/irqflags-arcv2.h>
> > +#endif
> 
> I presume there is no specific reason to include this conditionally.
> irqflags.h already includes the right version.

Agree.
I've just forgotten about common irqflags.h

Will fix in V2.

> >  
> >  .macro CPU_EARLY_SETUP
> >  
> > @@ -47,6 +50,13 @@
> >  	sr	r5, [ARC_REG_DC_CTRL]
> >  
> >  1:
> > +
> > +#ifdef CONFIG_ISA_ARCV2
> > +	; Enable handling of unaligned access in the CPU as by default
> > +	; this HW feature is disabled while GCC starting from 8.1.0
> > +	; unconditionally uses it for ARC HS cores.
> > +	flag    1 << STATUS_AD_BIT
> > +#endif
> >  .endm
> >  
> >  	.section .init.text, "ax", at progbits
> > 
> 
> 
-- 
 Eugeniy Paltsev

Re: [PATCH 1/2] ARCv2: Enable unaligned access in early ASM code

[Vineet Gupta]

On 1/29/19 9:26 AM, Eugeniy Paltsev wrote:
>> I presume there is no specific reason to include this conditionally.
>> irqflags.h already includes the right version.
> Agree.
> I've just forgotten about common irqflags.h

No need for this series. Given Alexey's request, I've pushed the minimal patch.
You do need to rebase the other unalinged access series on top, however wait for
me to comment on that.

-Vineet

[PATCH 1/2] ARCv2: Enable unaligned access in early ASM code

[Vineet Gupta]

On 1/29/19 9:26 AM, Eugeniy Paltsev wrote:
>> I presume there is no specific reason to include this conditionally.
>> irqflags.h already includes the right version.
> Agree.
> I've just forgotten about common irqflags.h

No need for this series. Given Alexey's request, I've pushed the minimal patch.
You do need to rebase the other unalinged access series on top, however wait for
me to comment on that.

-Vineet

Re: [PATCH 1/2] ARCv2: Enable unaligned access in early ASM code

[Eugeniy Paltsev]

On Tue, 2019-01-29 at 09:28 -0800, Vineet Gupta wrote:
> On 1/29/19 9:26 AM, Eugeniy Paltsev wrote:
> > > I presume there is no specific reason to include this conditionally.
> > > irqflags.h already includes the right version.
> > 
> > Agree.
> > I've just forgotten about common irqflags.h
> 
> No need for this series. Given Alexey's request, I've pushed the minimal patch.
> You do need to rebase the other unalinged access series on top, however wait for
> me to comment on that.

Ok.

> -Vineet
> 
-- 
 Eugeniy Paltsev

[PATCH 1/2] ARCv2: Enable unaligned access in early ASM code

[Eugeniy Paltsev]

On Tue, 2019-01-29@09:28 -0800, Vineet Gupta wrote:
> On 1/29/19 9:26 AM, Eugeniy Paltsev wrote:
> > > I presume there is no specific reason to include this conditionally.
> > > irqflags.h already includes the right version.
> > 
> > Agree.
> > I've just forgotten about common irqflags.h
> 
> No need for this series. Given Alexey's request, I've pushed the minimal patch.
> You do need to rebase the other unalinged access series on top, however wait for
> me to comment on that.

Ok.

> -Vineet
> 
-- 
 Eugeniy Paltsev