From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([209.51.188.92]:47829) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gmF4R-0002Ip-4L for qemu-devel@nongnu.org; Wed, 23 Jan 2019 04:43:48 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gmEon-0007vl-S8 for qemu-devel@nongnu.org; Wed, 23 Jan 2019 04:27:36 -0500 From: Bastian Koppelmann Date: Wed, 23 Jan 2019 10:25:33 +0100 Message-Id: <20190123092538.8004-31-kbastian@mail.uni-paderborn.de> In-Reply-To: <20190123092538.8004-1-kbastian@mail.uni-paderborn.de> References: <20190123092538.8004-1-kbastian@mail.uni-paderborn.de> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [Qemu-devel] [PATCH v6 30/35] target/riscv: Remove decode_RV32_64G() List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: sagark@eecs.berkeley.edu, palmer@sifive.com, kbastian@mail.uni-paderborn.de Cc: qemu-riscv@nongnu.org, peer.adelt@hni.uni-paderborn.de, richard.henderson@linaro.org, qemu-devel@nongnu.org decodetree handles all instructions now so the fallback is not necessary anymore. Reviewed-by: Richard Henderson Signed-off-by: Bastian Koppelmann Signed-off-by: Peer Adelt --- target/riscv/translate.c | 23 +---------------------- 1 file changed, 1 insertion(+), 22 deletions(-) diff --git a/target/riscv/translate.c b/target/riscv/translate.c index 0e37beb68e..b0251b3518 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -600,26 +600,6 @@ bool decode_insn16(DisasContext *ctx, uint16_t insn); #include "decode_insn16.inc.c" #include "insn_trans/trans_rvc.inc.c" -static void decode_RV32_64G(CPURISCVState *env, DisasContext *ctx) -{ - uint32_t op; - - /* We do not do misaligned address check here: the address should never be - * misaligned at this point. Instructions that set PC must do the check, - * since epc must be the address of the instruction that caused us to - * perform the misaligned instruction fetch */ - - op = MASK_OP_MAJOR(ctx->opcode); - - switch (op) { - case OPC_RISC_SYSTEM: - break; - default: - gen_exception_illegal(ctx); - break; - } -} - static void decode_opc(DisasContext *ctx) { /* check for compressed insn */ @@ -636,8 +616,7 @@ static void decode_opc(DisasContext *ctx) } else { ctx->pc_succ_insn = ctx->base.pc_next + 4; if (!decode_insn32(ctx, ctx->opcode)) { - /* fallback to old decoder */ - decode_RV32_64G(ctx->env, ctx); + gen_exception_illegal(ctx); } } } -- 2.20.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from list by lists.gnu.org with archive (Exim 4.71) id 1gmF4X-00031F-BT for mharc-qemu-riscv@gnu.org; Wed, 23 Jan 2019 04:43:49 -0500 Received: from eggs.gnu.org ([209.51.188.92]:46701) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gmF4R-00029L-3Z for qemu-riscv@nongnu.org; Wed, 23 Jan 2019 04:43:47 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gmEot-0007yn-Ov for qemu-riscv@nongnu.org; Wed, 23 Jan 2019 04:27:40 -0500 Received: from mail.uni-paderborn.de ([131.234.142.9]:47594) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gmEoc-0007VT-Sp; Wed, 23 Jan 2019 04:27:29 -0500 Received: from magmaria.uni-paderborn.de ([131.234.189.24] helo=localhost.localdomain) by mail.uni-paderborn.de with esmtp (Exim 4.89 nylar) id 1gmEoH-0004uc-NN; Wed, 23 Jan 2019 10:27:01 +0100 Received: from mail.uni-paderborn.de by magmaria with queue id 3097571-3; Wed, 23 Jan 2019 09:27:00 GMT X-Envelope-From: From: Bastian Koppelmann To: sagark@eecs.berkeley.edu, palmer@sifive.com, kbastian@mail.uni-paderborn.de Cc: qemu-riscv@nongnu.org, peer.adelt@hni.uni-paderborn.de, richard.henderson@linaro.org, qemu-devel@nongnu.org Date: Wed, 23 Jan 2019 10:25:33 +0100 Message-Id: <20190123092538.8004-31-kbastian@mail.uni-paderborn.de> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190123092538.8004-1-kbastian@mail.uni-paderborn.de> References: <20190123092538.8004-1-kbastian@mail.uni-paderborn.de> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-PMX-Version: 6.4.6.2792898, Antispam-Engine: 2.7.2.2107409, Antispam-Data: 2019.1.23.92116, AntiVirus-Engine: 5.56.1, AntiVirus-Data: 2019.1.18.5561000 X-IMT-Spam-Score: 0.0 () X-IMT-Authenticated-Sender: X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 131.234.142.9 Subject: [Qemu-riscv] [PATCH v6 30/35] target/riscv: Remove decode_RV32_64G() X-BeenThere: qemu-riscv@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 23 Jan 2019 09:43:47 -0000 decodetree handles all instructions now so the fallback is not necessary anymore. Reviewed-by: Richard Henderson Signed-off-by: Bastian Koppelmann Signed-off-by: Peer Adelt --- target/riscv/translate.c | 23 +---------------------- 1 file changed, 1 insertion(+), 22 deletions(-) diff --git a/target/riscv/translate.c b/target/riscv/translate.c index 0e37beb68e..b0251b3518 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -600,26 +600,6 @@ bool decode_insn16(DisasContext *ctx, uint16_t insn); #include "decode_insn16.inc.c" #include "insn_trans/trans_rvc.inc.c" -static void decode_RV32_64G(CPURISCVState *env, DisasContext *ctx) -{ - uint32_t op; - - /* We do not do misaligned address check here: the address should never be - * misaligned at this point. Instructions that set PC must do the check, - * since epc must be the address of the instruction that caused us to - * perform the misaligned instruction fetch */ - - op = MASK_OP_MAJOR(ctx->opcode); - - switch (op) { - case OPC_RISC_SYSTEM: - break; - default: - gen_exception_illegal(ctx); - break; - } -} - static void decode_opc(DisasContext *ctx) { /* check for compressed insn */ @@ -636,8 +616,7 @@ static void decode_opc(DisasContext *ctx) } else { ctx->pc_succ_insn = ctx->base.pc_next + 4; if (!decode_insn32(ctx, ctx->opcode)) { - /* fallback to old decoder */ - decode_RV32_64G(ctx->env, ctx); + gen_exception_illegal(ctx); } } } -- 2.20.1