From mboxrd@z Thu Jan 1 00:00:00 1970 From: Simon Horman Subject: Re: [PATCH 10/11] arm64: dts: renesas: r8a774c0: Add clkp2 clock to CAN nodes Date: Mon, 28 Jan 2019 14:02:38 +0100 Message-ID: <20190128130238.gork4cep3qonghwz@verge.net.au> References: <1547663874-29411-1-git-send-email-fabrizio.castro@bp.renesas.com> <1547663874-29411-11-git-send-email-fabrizio.castro@bp.renesas.com> <20190117120541.slymsz47fjkzz3kg@verge.net.au> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Content-Disposition: inline In-Reply-To: <20190117120541.slymsz47fjkzz3kg@verge.net.au> Sender: netdev-owner@vger.kernel.org To: Fabrizio Castro Cc: Rob Herring , Mark Rutland , Wolfgang Grandegger , Marc Kleine-Budde , Michael Turquette , Stephen Boyd , Magnus Damm , "David S. Miller" , Geert Uytterhoeven , Thierry Reding , Andreas =?utf-8?Q?F=C3=A4rber?= , Alexandre Belloni , Kevin Hilman , Johan Hovold , Lukasz Majewski , Michal Simek , Michal =?utf-8?B?Vm9rw6HEjQ==?= , Martin Blumenstingl , Ben List-Id: linux-can.vger.kernel.org On Thu, Jan 17, 2019 at 01:05:42PM +0100, Simon Horman wrote: > On Wed, Jan 16, 2019 at 06:37:53PM +0000, Fabrizio Castro wrote: > > According to the latest information, clkp2 is available on RZ/G2. > > Modify CAN0 and CAN1 nodes accordingly. > > > > Signed-off-by: Fabrizio Castro > > Reviewed-by: Chris Paterson > > Taking your word for the motivation for this change, > this patch seems fine to me but I would like to wait for review > from others. > > Reviewed-by: Simon Horman I am marking this as deferred until R8A774C0_CLK_CANFD shows up in an rc release. Alternatively I'd be happy to take a version that uses numeric values, followed up by a patch to switching to R8A774C0_CLK_CANFD once it is available in an rc release. Please repost or otherwise ping me as appropriate. > > > --- > > arch/arm64/boot/dts/renesas/r8a774c0.dtsi | 12 ++++++++---- > > 1 file changed, 8 insertions(+), 4 deletions(-) > > > > diff --git a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi > > index 3970aaf..326ab3a 100644 > > --- a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi > > +++ b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi > > @@ -809,8 +809,10 @@ > > "renesas,rcar-gen3-can"; > > reg = <0 0xe6c30000 0 0x1000>; > > interrupts = ; > > - clocks = <&cpg CPG_MOD 916>, <&can_clk>; > > - clock-names = "clkp1", "can_clk"; > > + clocks = <&cpg CPG_MOD 916>, > > + <&cpg CPG_CORE R8A774C0_CLK_CANFD>, > > + <&can_clk>; > > + clock-names = "clkp1", "clkp2", "can_clk"; > > power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; > > resets = <&cpg 916>; > > status = "disabled"; > > @@ -821,8 +823,10 @@ > > "renesas,rcar-gen3-can"; > > reg = <0 0xe6c38000 0 0x1000>; > > interrupts = ; > > - clocks = <&cpg CPG_MOD 915>, <&can_clk>; > > - clock-names = "clkp1", "can_clk"; > > + clocks = <&cpg CPG_MOD 915>, > > + <&cpg CPG_CORE R8A774C0_CLK_CANFD>, > > + <&can_clk>; > > + clock-names = "clkp1", "clkp2", "can_clk"; > > power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; > > resets = <&cpg 915>; > > status = "disabled"; > > -- > > 2.7.4 > > > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.8 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_PASS,URIBL_BLOCKED,USER_AGENT_NEOMUTT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 629FEC282CF for ; Mon, 28 Jan 2019 13:02:46 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 349392171F for ; Mon, 28 Jan 2019 13:02:46 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=verge.net.au header.i=@verge.net.au header.b="PAQJC7hm" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726912AbfA1NCp (ORCPT ); Mon, 28 Jan 2019 08:02:45 -0500 Received: from kirsty.vergenet.net ([202.4.237.240]:60344 "EHLO kirsty.vergenet.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726611AbfA1NCo (ORCPT ); Mon, 28 Jan 2019 08:02:44 -0500 Received: from reginn.horms.nl (watermunt.horms.nl [80.127.179.77]) by kirsty.vergenet.net (Postfix) with ESMTPA id 27DBA25BE08; Tue, 29 Jan 2019 00:02:40 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=verge.net.au; s=mail; t=1548680560; bh=OSXBUxHDDujmxNdywn/iD2mrnKKEuOvKH9iRoJqwJLs=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=PAQJC7hm2yLVkWsZiwa678nt0F6nF2W+TFpDGGafEgJTgNdta6MJwKhqAt2wsnwHB cqsuDAt14PP0Q2xjdAvEmp7DU/YBbwg/NQgwKbYScqcnJgaZ3Y+QuVjGnqplBCxOVs ZDXRJa8zn5F3ZayvjpI9/D1meCzbBvqqBSI6pCpw= Received: by reginn.horms.nl (Postfix, from userid 7100) id 864279403E0; Mon, 28 Jan 2019 14:02:38 +0100 (CET) Date: Mon, 28 Jan 2019 14:02:38 +0100 From: Simon Horman To: Fabrizio Castro Cc: Rob Herring , Mark Rutland , Wolfgang Grandegger , Marc Kleine-Budde , Michael Turquette , Stephen Boyd , Magnus Damm , "David S. Miller" , Geert Uytterhoeven , Thierry Reding , Andreas =?utf-8?Q?F=C3=A4rber?= , Alexandre Belloni , Kevin Hilman , Johan Hovold , Lukasz Majewski , Michal Simek , Michal =?utf-8?B?Vm9rw6HEjQ==?= , Martin Blumenstingl , Ben Whitten , Chris Paterson , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-can@vger.kernel.org, netdev@vger.kernel.org, linux-clk@vger.kernel.org, Biju Das , ebiharaml@si-linux.co.jp Subject: Re: [PATCH 10/11] arm64: dts: renesas: r8a774c0: Add clkp2 clock to CAN nodes Message-ID: <20190128130238.gork4cep3qonghwz@verge.net.au> References: <1547663874-29411-1-git-send-email-fabrizio.castro@bp.renesas.com> <1547663874-29411-11-git-send-email-fabrizio.castro@bp.renesas.com> <20190117120541.slymsz47fjkzz3kg@verge.net.au> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20190117120541.slymsz47fjkzz3kg@verge.net.au> Organisation: Horms Solutions BV User-Agent: NeoMutt/20170113 (1.7.2) Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org On Thu, Jan 17, 2019 at 01:05:42PM +0100, Simon Horman wrote: > On Wed, Jan 16, 2019 at 06:37:53PM +0000, Fabrizio Castro wrote: > > According to the latest information, clkp2 is available on RZ/G2. > > Modify CAN0 and CAN1 nodes accordingly. > > > > Signed-off-by: Fabrizio Castro > > Reviewed-by: Chris Paterson > > Taking your word for the motivation for this change, > this patch seems fine to me but I would like to wait for review > from others. > > Reviewed-by: Simon Horman I am marking this as deferred until R8A774C0_CLK_CANFD shows up in an rc release. Alternatively I'd be happy to take a version that uses numeric values, followed up by a patch to switching to R8A774C0_CLK_CANFD once it is available in an rc release. Please repost or otherwise ping me as appropriate. > > > --- > > arch/arm64/boot/dts/renesas/r8a774c0.dtsi | 12 ++++++++---- > > 1 file changed, 8 insertions(+), 4 deletions(-) > > > > diff --git a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi > > index 3970aaf..326ab3a 100644 > > --- a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi > > +++ b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi > > @@ -809,8 +809,10 @@ > > "renesas,rcar-gen3-can"; > > reg = <0 0xe6c30000 0 0x1000>; > > interrupts = ; > > - clocks = <&cpg CPG_MOD 916>, <&can_clk>; > > - clock-names = "clkp1", "can_clk"; > > + clocks = <&cpg CPG_MOD 916>, > > + <&cpg CPG_CORE R8A774C0_CLK_CANFD>, > > + <&can_clk>; > > + clock-names = "clkp1", "clkp2", "can_clk"; > > power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; > > resets = <&cpg 916>; > > status = "disabled"; > > @@ -821,8 +823,10 @@ > > "renesas,rcar-gen3-can"; > > reg = <0 0xe6c38000 0 0x1000>; > > interrupts = ; > > - clocks = <&cpg CPG_MOD 915>, <&can_clk>; > > - clock-names = "clkp1", "can_clk"; > > + clocks = <&cpg CPG_MOD 915>, > > + <&cpg CPG_CORE R8A774C0_CLK_CANFD>, > > + <&can_clk>; > > + clock-names = "clkp1", "clkp2", "can_clk"; > > power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; > > resets = <&cpg 915>; > > status = "disabled"; > > -- > > 2.7.4 > > >