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From: Yang Weijiang <weijiang.yang@intel.com>
To: Sean Christopherson <sean.j.christopherson@intel.com>
Cc: "Jim Mattson" <jmattson@google.com>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Radim Krčmář" <rkrcmar@redhat.com>,
	LKML <linux-kernel@vger.kernel.org>,
	"kvm list" <kvm@vger.kernel.org>,
	"Michael S. Tsirkin" <mst@redhat.com>,
	yu-cheng.yu@intel.com, yi.z.zhang@intel.com, hjl.tools@gmail.com,
	"Zhang Yi Z" <yi.z.zhang@linux.intel.com>
Subject: Re: [PATCH v2 1/7] KVM:VMX: Define CET VMCS fields and bits
Date: Tue, 29 Jan 2019 16:34:28 +0800	[thread overview]
Message-ID: <20190129083428.GA4526@local-michael-cet-test.sh.intel.com> (raw)
In-Reply-To: <20190129182750.GB8156@linux.intel.com>

On Tue, Jan 29, 2019 at 10:27:50AM -0800, Sean Christopherson wrote:
> On Tue, Jan 29, 2019 at 10:01:15AM -0800, Jim Mattson wrote:
> > On Tue, Jan 29, 2019 at 9:47 AM Jim Mattson <jmattson@google.com> wrote:
> > >
> > > On Wed, Jan 23, 2019 at 6:06 AM Yang Weijiang <weijiang.yang@intel.com> wrote:
> > > > Note: Although these VMCS fields are 64-bit, they don't have high fields.
> > >
> > > This statement directly contradicts the SDM, volume 3, appendix B.2:
> > >
> > > "A value of 1 in bits 14:13 of an encoding indicates a 64-bit field.
> > > There are 64-bit fields only for controls and for guest state. As
> > > noted in Section 24.11.2, every 64-bit field has two encodings, which
> > > differ on bit 0, the access type. Thus, each such field has an even
> > > encoding for full access and an odd encoding for high access."
> > 
> > Ah! They're not actually 64-bit fields. If you look at the encodings
> > (0x68XX and 0x6cxx), they're natural-width fields! Natural-width
> > fields don't have a high component.
> 
> They're indeed natural width (I actually looked at the spec this time).
> 
> The "_FULL" postfix on VMX_HOST_IA32_INTERRUPT_SSP_TABLE_ADDR_FULL and
> VMX_HOST_SSP_FULL is confusing as it generally only shows up on 64-bit
> fields.  I'll see if we can get the fields renamed to drop "_FULL".  I
> suggest we preemptively do the same for KVM.
Thank you for making it clear! I should have modified the annotation
correctly. I'll add a note for this in next version.

  parent reply	other threads:[~2019-01-30  1:40 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-22 20:59 [PATCH v2 0/7] This patch-set is to enable Guest CET support Yang Weijiang
2019-01-22 20:59 ` [PATCH v2 1/7] KVM:VMX: Define CET VMCS fields and bits Yang Weijiang
2019-01-25 18:02   ` Paolo Bonzini
2019-01-28 10:33     ` Yang Weijiang
2019-01-29 15:19       ` Paolo Bonzini
2019-01-29  8:29         ` Yang Weijiang
2019-01-30  8:32           ` Paolo Bonzini
2019-03-04 18:56         ` Sean Christopherson
2019-03-08  9:15           ` Paolo Bonzini
2019-03-08 15:50             ` Sean Christopherson
2019-03-08 16:34               ` Paolo Bonzini
2019-01-25 22:30   ` Sean Christopherson
2019-01-29 17:47   ` Jim Mattson
2019-01-29 18:01     ` Jim Mattson
     [not found]       ` <20190129182750.GB8156@linux.intel.com>
2019-01-29  8:34         ` Yang Weijiang [this message]
2019-01-22 20:59 ` [PATCH v2 2/7] KVM:CPUID: Define CET CPUID bits and CR4.CET master enable bit Yang Weijiang
2019-01-22 20:59 ` [PATCH v2 3/7] KVM:CPUID: Add CPUID support for CET xsaves component query Yang Weijiang
2019-01-25 17:57   ` Paolo Bonzini
2019-01-25 22:40   ` Sean Christopherson
2019-01-22 20:59 ` [PATCH v2 4/7] KVM:CPUID: Fix xsaves area size calculation for CPUID.(EAX=0xD,ECX=1) Yang Weijiang
2019-01-25 22:47   ` Sean Christopherson
2019-01-22 20:59 ` [PATCH v2 5/7] KVM:VMX: Pass through host CET related MSRs to Guest Yang Weijiang
2019-01-25 22:50   ` Sean Christopherson
2019-01-22 20:59 ` [PATCH v2 6/7] KVM:VMX: Load Guest CET via VMCS when CET is enabled in Guest Yang Weijiang
2019-01-25 22:56   ` Sean Christopherson
2019-01-30 15:16     ` Yang Weijiang
2019-01-22 20:59 ` [PATCH v2 7/7] KVM:X86: Enable MSR_IA32_XSS bit 11 and 12 for CET xsaves/xrstors Yang Weijiang
2019-01-25 23:03   ` Sean Christopherson

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