From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.5 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_PASS,URIBL_BLOCKED,USER_AGENT_MUTT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 41438C169C4 for ; Tue, 29 Jan 2019 11:39:23 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1BA5120857 for ; Tue, 29 Jan 2019 11:39:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728821AbfA2LjW (ORCPT ); Tue, 29 Jan 2019 06:39:22 -0500 Received: from foss.arm.com ([217.140.101.70]:34732 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729404AbfA2LjS (ORCPT ); Tue, 29 Jan 2019 06:39:18 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id DA353EBD; Tue, 29 Jan 2019 03:39:17 -0800 (PST) Received: from e107981-ln.cambridge.arm.com (e107981-ln.cambridge.arm.com [10.1.197.40]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 37ABF3F589; Tue, 29 Jan 2019 03:39:15 -0800 (PST) Date: Tue, 29 Jan 2019 11:39:10 +0000 From: Lorenzo Pieralisi To: "Z.q. Hou" , "l.subrahmanya@mobiveil.co.in" Cc: "linux-pci@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "bhelgaas@google.com" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "shawnguo@kernel.org" , Leo Li , "catalin.marinas@arm.com" , "will.deacon@arm.com" , Mingkai Hu , "M.h. Lian" , Xiaowei Bao Subject: Re: [PATCHv3 00/27] PCI: refactor Mobiveil driver and add PCIe Gen4 driver for NXP Layerscape SoCs Message-ID: <20190129113910.GA7467@e107981-ln.cambridge.arm.com> References: <20190129080926.36773-1-Zhiqiang.Hou@nxp.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20190129080926.36773-1-Zhiqiang.Hou@nxp.com> User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Jan 29, 2019 at 08:08:28AM +0000, Z.q. Hou wrote: > From: Hou Zhiqiang > > This patch set is aim to refactor the Mobiveil driver and add > PCIe support for NXP Layerscape series SoCs integrated Mobiveil's > PCIe Gen4 controller. > > Hou Zhiqiang (27): > PCI: mobiveil: uniform the register accessors > PCI: mobiveil: format the code without function change > PCI: mobiveil: correct the returned error number > PCI: mobiveil: remove flag MSI_FLAG_MULTI_PCI_MSI > PCI: mobiveil: correct PCI base address in MEM/IO outbound windows > PCI: mobiveil: replace the resource list iteration function > PCI: mobiveil: use WIN_NUM_0 explicitly for CFG outbound window > PCI: mobiveil: use the 1st inbound window for MEM inbound transactions > PCI: mobiveil: correct inbound/outbound window setup routines > PCI: mobiveil: fix the INTx process error > PCI: mobiveil: only fix up the Class Code field > PCI: mobiveil: move out the link up waiting from mobiveil_host_init > PCI: mobiveil: move irq chained handler setup out of DT parse > PCI: mobiveil: initialize Primary/Secondary/Subordinate bus number > dt-bindings: pci: mobiveil: change gpio_slave and apb_csr to optional > PCI: mobiveil: refactor Mobiveil PCIe Host Bridge IP driver > PCI: mobiveil: fix the checking of valid device > PCI: mobiveil: continue to initialize the host upon no PCIe link > PCI: mobiveil: disabled IB and OB windows set by bootloader > PCI: mobiveil: add Byte and Half-Word width register accessors > PCI: mobiveil: make mobiveil_host_init can be used to re-init host > dt-bindings: pci: Add NXP Layerscape SoCs PCIe Gen4 controller > PCI: mobiveil: add PCIe Gen4 RC driver for NXP Layerscape SoCs > PCI: mobiveil: ls_pcie_g4: add Workaround for A-011577 > PCI: mobiveil: ls_pcie_g4: add Workaround for A-011451 > arm64: dts: freescale: lx2160a: add pcie DT nodes > arm64: defconfig: Enable CONFIG_PCI_LAYERSCAPE_GEN4 Subrahmanya, Either you review this series or I will have to drop you from the MAINTAINERS list for this driver, I am sorry but I asked you before to no avail. Thanks, Lorenzo > .../bindings/pci/layerscape-pci-gen4.txt | 52 ++ > .../devicetree/bindings/pci/mobiveil-pcie.txt | 2 + > MAINTAINERS | 10 +- > .../arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 163 ++++ > arch/arm64/configs/defconfig | 1 + > drivers/pci/controller/Kconfig | 11 +- > drivers/pci/controller/Makefile | 2 +- > drivers/pci/controller/mobiveil/Kconfig | 34 + > drivers/pci/controller/mobiveil/Makefile | 5 + > .../controller/mobiveil/pci-layerscape-gen4.c | 306 +++++++ > .../controller/mobiveil/pcie-mobiveil-host.c | 640 +++++++++++++ > .../controller/mobiveil/pcie-mobiveil-plat.c | 54 ++ > .../pci/controller/mobiveil/pcie-mobiveil.c | 246 +++++ > .../pci/controller/mobiveil/pcie-mobiveil.h | 229 +++++ > drivers/pci/controller/pcie-mobiveil.c | 861 ------------------ > 15 files changed, 1743 insertions(+), 873 deletions(-) > create mode 100644 Documentation/devicetree/bindings/pci/layerscape-pci-gen4.txt > create mode 100644 drivers/pci/controller/mobiveil/Kconfig > create mode 100644 drivers/pci/controller/mobiveil/Makefile > create mode 100644 drivers/pci/controller/mobiveil/pci-layerscape-gen4.c > create mode 100644 drivers/pci/controller/mobiveil/pcie-mobiveil-host.c > create mode 100644 drivers/pci/controller/mobiveil/pcie-mobiveil-plat.c > create mode 100644 drivers/pci/controller/mobiveil/pcie-mobiveil.c > create mode 100644 drivers/pci/controller/mobiveil/pcie-mobiveil.h > delete mode 100644 drivers/pci/controller/pcie-mobiveil.c > > -- > 2.17.1 > From mboxrd@z Thu Jan 1 00:00:00 1970 From: Lorenzo Pieralisi Subject: Re: [PATCHv3 00/27] PCI: refactor Mobiveil driver and add PCIe Gen4 driver for NXP Layerscape SoCs Date: Tue, 29 Jan 2019 11:39:10 +0000 Message-ID: <20190129113910.GA7467@e107981-ln.cambridge.arm.com> References: <20190129080926.36773-1-Zhiqiang.Hou@nxp.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Content-Disposition: inline In-Reply-To: <20190129080926.36773-1-Zhiqiang.Hou@nxp.com> Sender: linux-kernel-owner@vger.kernel.org To: "Z.q. Hou" , "l.subrahmanya@mobiveil.co.in" Cc: "linux-pci@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "bhelgaas@google.com" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "shawnguo@kernel.org" , Leo Li , "catalin.marinas@arm.com" , "will.deacon@arm.com" , Mingkai Hu , "M.h. Lian" , Xiaowei Bao List-Id: devicetree@vger.kernel.org On Tue, Jan 29, 2019 at 08:08:28AM +0000, Z.q. Hou wrote: > From: Hou Zhiqiang > > This patch set is aim to refactor the Mobiveil driver and add > PCIe support for NXP Layerscape series SoCs integrated Mobiveil's > PCIe Gen4 controller. > > Hou Zhiqiang (27): > PCI: mobiveil: uniform the register accessors > PCI: mobiveil: format the code without function change > PCI: mobiveil: correct the returned error number > PCI: mobiveil: remove flag MSI_FLAG_MULTI_PCI_MSI > PCI: mobiveil: correct PCI base address in MEM/IO outbound windows > PCI: mobiveil: replace the resource list iteration function > PCI: mobiveil: use WIN_NUM_0 explicitly for CFG outbound window > PCI: mobiveil: use the 1st inbound window for MEM inbound transactions > PCI: mobiveil: correct inbound/outbound window setup routines > PCI: mobiveil: fix the INTx process error > PCI: mobiveil: only fix up the Class Code field > PCI: mobiveil: move out the link up waiting from mobiveil_host_init > PCI: mobiveil: move irq chained handler setup out of DT parse > PCI: mobiveil: initialize Primary/Secondary/Subordinate bus number > dt-bindings: pci: mobiveil: change gpio_slave and apb_csr to optional > PCI: mobiveil: refactor Mobiveil PCIe Host Bridge IP driver > PCI: mobiveil: fix the checking of valid device > PCI: mobiveil: continue to initialize the host upon no PCIe link > PCI: mobiveil: disabled IB and OB windows set by bootloader > PCI: mobiveil: add Byte and Half-Word width register accessors > PCI: mobiveil: make mobiveil_host_init can be used to re-init host > dt-bindings: pci: Add NXP Layerscape SoCs PCIe Gen4 controller > PCI: mobiveil: add PCIe Gen4 RC driver for NXP Layerscape SoCs > PCI: mobiveil: ls_pcie_g4: add Workaround for A-011577 > PCI: mobiveil: ls_pcie_g4: add Workaround for A-011451 > arm64: dts: freescale: lx2160a: add pcie DT nodes > arm64: defconfig: Enable CONFIG_PCI_LAYERSCAPE_GEN4 Subrahmanya, Either you review this series or I will have to drop you from the MAINTAINERS list for this driver, I am sorry but I asked you before to no avail. Thanks, Lorenzo > .../bindings/pci/layerscape-pci-gen4.txt | 52 ++ > .../devicetree/bindings/pci/mobiveil-pcie.txt | 2 + > MAINTAINERS | 10 +- > .../arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 163 ++++ > arch/arm64/configs/defconfig | 1 + > drivers/pci/controller/Kconfig | 11 +- > drivers/pci/controller/Makefile | 2 +- > drivers/pci/controller/mobiveil/Kconfig | 34 + > drivers/pci/controller/mobiveil/Makefile | 5 + > .../controller/mobiveil/pci-layerscape-gen4.c | 306 +++++++ > .../controller/mobiveil/pcie-mobiveil-host.c | 640 +++++++++++++ > .../controller/mobiveil/pcie-mobiveil-plat.c | 54 ++ > .../pci/controller/mobiveil/pcie-mobiveil.c | 246 +++++ > .../pci/controller/mobiveil/pcie-mobiveil.h | 229 +++++ > drivers/pci/controller/pcie-mobiveil.c | 861 ------------------ > 15 files changed, 1743 insertions(+), 873 deletions(-) > create mode 100644 Documentation/devicetree/bindings/pci/layerscape-pci-gen4.txt > create mode 100644 drivers/pci/controller/mobiveil/Kconfig > create mode 100644 drivers/pci/controller/mobiveil/Makefile > create mode 100644 drivers/pci/controller/mobiveil/pci-layerscape-gen4.c > create mode 100644 drivers/pci/controller/mobiveil/pcie-mobiveil-host.c > create mode 100644 drivers/pci/controller/mobiveil/pcie-mobiveil-plat.c > create mode 100644 drivers/pci/controller/mobiveil/pcie-mobiveil.c > create mode 100644 drivers/pci/controller/mobiveil/pcie-mobiveil.h > delete mode 100644 drivers/pci/controller/pcie-mobiveil.c > > -- > 2.17.1 > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.5 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_PASS, URIBL_BLOCKED,USER_AGENT_MUTT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 891DCC282C7 for ; Tue, 29 Jan 2019 11:39:31 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4EE1320989 for ; Tue, 29 Jan 2019 11:39:31 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="iKe5ysbK" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 4EE1320989 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=LzSNrkf4PKJgPzqqmEYcJt9IOtaOR7qjmocPc1boFdM=; b=iKe5ysbKFg2s8g InzCs5T5dBrtTve2U6PfDL//KDdeQFQ/hQMWJMuJlaWqalRGWWVL8IEwPNqxI2Pzjm1prP/TYOx2J lMuThbKbL83fbiMd/v3eQ/9nxYf6DhGcTO3fbxTp8yDPPThzNeGGgCevdzOV7InuTE9ylu7OQKb62 aEYgcKYD9dxLx0aR5O7mqE9mBGen6h61iP60A6fxpZm9MXB1p6xJJpVUCACHxxQMNmEGE3uWjF8v+ M7I+CaKNJXobPp8HdFFsDtsbo6CB5cYROzcOf+UGCHcQc8jVgX0e/qDbz0aX2c/Fd/ijwJ7vXxUds kKWJWW5kRfuuXNKNDMDA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1goRjg-0000xE-Js; Tue, 29 Jan 2019 11:39:24 +0000 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70] helo=foss.arm.com) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1goRjc-0000wn-C0 for linux-arm-kernel@lists.infradead.org; Tue, 29 Jan 2019 11:39:21 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id DA353EBD; Tue, 29 Jan 2019 03:39:17 -0800 (PST) Received: from e107981-ln.cambridge.arm.com (e107981-ln.cambridge.arm.com [10.1.197.40]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 37ABF3F589; Tue, 29 Jan 2019 03:39:15 -0800 (PST) Date: Tue, 29 Jan 2019 11:39:10 +0000 From: Lorenzo Pieralisi To: "Z.q. Hou" , "l.subrahmanya@mobiveil.co.in" Subject: Re: [PATCHv3 00/27] PCI: refactor Mobiveil driver and add PCIe Gen4 driver for NXP Layerscape SoCs Message-ID: <20190129113910.GA7467@e107981-ln.cambridge.arm.com> References: <20190129080926.36773-1-Zhiqiang.Hou@nxp.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20190129080926.36773-1-Zhiqiang.Hou@nxp.com> User-Agent: Mutt/1.5.24 (2015-08-30) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190129_033920_422475_9422A912 X-CRM114-Status: GOOD ( 17.79 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "mark.rutland@arm.com" , "devicetree@vger.kernel.org" , Xiaowei Bao , "linux-pci@vger.kernel.org" , "will.deacon@arm.com" , "linux-kernel@vger.kernel.org" , Leo Li , "M.h. Lian" , "robh+dt@kernel.org" , Mingkai Hu , "catalin.marinas@arm.com" , "bhelgaas@google.com" , "shawnguo@kernel.org" , "linux-arm-kernel@lists.infradead.org" Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Jan 29, 2019 at 08:08:28AM +0000, Z.q. Hou wrote: > From: Hou Zhiqiang > > This patch set is aim to refactor the Mobiveil driver and add > PCIe support for NXP Layerscape series SoCs integrated Mobiveil's > PCIe Gen4 controller. > > Hou Zhiqiang (27): > PCI: mobiveil: uniform the register accessors > PCI: mobiveil: format the code without function change > PCI: mobiveil: correct the returned error number > PCI: mobiveil: remove flag MSI_FLAG_MULTI_PCI_MSI > PCI: mobiveil: correct PCI base address in MEM/IO outbound windows > PCI: mobiveil: replace the resource list iteration function > PCI: mobiveil: use WIN_NUM_0 explicitly for CFG outbound window > PCI: mobiveil: use the 1st inbound window for MEM inbound transactions > PCI: mobiveil: correct inbound/outbound window setup routines > PCI: mobiveil: fix the INTx process error > PCI: mobiveil: only fix up the Class Code field > PCI: mobiveil: move out the link up waiting from mobiveil_host_init > PCI: mobiveil: move irq chained handler setup out of DT parse > PCI: mobiveil: initialize Primary/Secondary/Subordinate bus number > dt-bindings: pci: mobiveil: change gpio_slave and apb_csr to optional > PCI: mobiveil: refactor Mobiveil PCIe Host Bridge IP driver > PCI: mobiveil: fix the checking of valid device > PCI: mobiveil: continue to initialize the host upon no PCIe link > PCI: mobiveil: disabled IB and OB windows set by bootloader > PCI: mobiveil: add Byte and Half-Word width register accessors > PCI: mobiveil: make mobiveil_host_init can be used to re-init host > dt-bindings: pci: Add NXP Layerscape SoCs PCIe Gen4 controller > PCI: mobiveil: add PCIe Gen4 RC driver for NXP Layerscape SoCs > PCI: mobiveil: ls_pcie_g4: add Workaround for A-011577 > PCI: mobiveil: ls_pcie_g4: add Workaround for A-011451 > arm64: dts: freescale: lx2160a: add pcie DT nodes > arm64: defconfig: Enable CONFIG_PCI_LAYERSCAPE_GEN4 Subrahmanya, Either you review this series or I will have to drop you from the MAINTAINERS list for this driver, I am sorry but I asked you before to no avail. Thanks, Lorenzo > .../bindings/pci/layerscape-pci-gen4.txt | 52 ++ > .../devicetree/bindings/pci/mobiveil-pcie.txt | 2 + > MAINTAINERS | 10 +- > .../arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 163 ++++ > arch/arm64/configs/defconfig | 1 + > drivers/pci/controller/Kconfig | 11 +- > drivers/pci/controller/Makefile | 2 +- > drivers/pci/controller/mobiveil/Kconfig | 34 + > drivers/pci/controller/mobiveil/Makefile | 5 + > .../controller/mobiveil/pci-layerscape-gen4.c | 306 +++++++ > .../controller/mobiveil/pcie-mobiveil-host.c | 640 +++++++++++++ > .../controller/mobiveil/pcie-mobiveil-plat.c | 54 ++ > .../pci/controller/mobiveil/pcie-mobiveil.c | 246 +++++ > .../pci/controller/mobiveil/pcie-mobiveil.h | 229 +++++ > drivers/pci/controller/pcie-mobiveil.c | 861 ------------------ > 15 files changed, 1743 insertions(+), 873 deletions(-) > create mode 100644 Documentation/devicetree/bindings/pci/layerscape-pci-gen4.txt > create mode 100644 drivers/pci/controller/mobiveil/Kconfig > create mode 100644 drivers/pci/controller/mobiveil/Makefile > create mode 100644 drivers/pci/controller/mobiveil/pci-layerscape-gen4.c > create mode 100644 drivers/pci/controller/mobiveil/pcie-mobiveil-host.c > create mode 100644 drivers/pci/controller/mobiveil/pcie-mobiveil-plat.c > create mode 100644 drivers/pci/controller/mobiveil/pcie-mobiveil.c > create mode 100644 drivers/pci/controller/mobiveil/pcie-mobiveil.h > delete mode 100644 drivers/pci/controller/pcie-mobiveil.c > > -- > 2.17.1 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel