From mboxrd@z Thu Jan 1 00:00:00 1970 From: Bjorn Andersson Subject: Re: [PATCH v2 1/2] dt-bindings: Add Qualcomm USB Super-Speed PHY bindings Date: Tue, 29 Jan 2019 12:38:45 -0800 Message-ID: <20190129203845.GB3036@builder> References: <1548761715-4004-1-git-send-email-jorge.ramirez-ortiz@linaro.org> <1548761715-4004-2-git-send-email-jorge.ramirez-ortiz@linaro.org> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Content-Disposition: inline In-Reply-To: <1548761715-4004-2-git-send-email-jorge.ramirez-ortiz@linaro.org> Sender: linux-kernel-owner@vger.kernel.org To: Jorge Ramirez-Ortiz Cc: gregkh@linuxfoundation.org, mark.rutland@arm.com, kishon@ti.com, jackp@codeaurora.org, andy.gross@linaro.org, swboyd@chromium.org, shawn.guo@linaro.org, vkoul@kernel.org, khasim.mohammed@linaro.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org List-Id: linux-arm-msm@vger.kernel.org On Tue 29 Jan 03:35 PST 2019, Jorge Ramirez-Ortiz wrote: > Binding description for Qualcomm's Synopsys 1.0.0 super-speed PHY SuperSpeed > controller embedded in QCS404. > > Based on Sriharsha Allenki's original > definitions. > > Signed-off-by: Jorge Ramirez-Ortiz > --- > .../devicetree/bindings/usb/qcom,usb-ssphy.txt | 73 ++++++++++++++++++++++ > 1 file changed, 73 insertions(+) > create mode 100644 Documentation/devicetree/bindings/usb/qcom,usb-ssphy.txt > > diff --git a/Documentation/devicetree/bindings/usb/qcom,usb-ssphy.txt b/Documentation/devicetree/bindings/usb/qcom,usb-ssphy.txt > new file mode 100644 > index 0000000..8ef6e39 > --- /dev/null > +++ b/Documentation/devicetree/bindings/usb/qcom,usb-ssphy.txt > @@ -0,0 +1,73 @@ > +Qualcomm Synopsys 1.0.0 SS phy controller > +=========================================== > + > +Synopsys 1.0.0 ss phy controller supports SS usb connectivity on Qualcomm > +chipsets It's based on Synopsys IP, but it's Qualcomm's version, and isn't the 1.0.0 Qualcomm's version number for this block? Also I think it "provides SuperSpeed USB connectivity on some Qualcomm platforms". > + > +Required properties: > + > +- compatible: > + Value type: > + Definition: Should contain "qcom,usb-ssphy". > + > +- reg: > + Value type: > + Definition: USB PHY base address and length of the register map. > + > +- #phy-cells: > + Value type: > + Definition: Should be 0. See phy/phy-bindings.txt for details. > + > +- clocks: > + Value type: > + Definition: See clock-bindings.txt section "consumers". List of > + three clock specifiers for reference, phy core and > + pipe clocks. > + > +- clock-names: > + Value type: > + Definition: Names of the clocks in 1-1 correspondence with the "clocks" > + property. Must contain "ref", "phy" and "pipe". > + > +- vdd-supply: > + Value type: > + Definition: phandle to the regulator VDD supply node. > + > +- vdda1p8-supply: > + Value type: > + Definition: phandle to the regulator 1.8V supply node. > + > + > +Optional child nodes: > + > +- vbus-supply: > + Value type: > + Definition: phandle to the VBUS supply node. > + > +- resets: > + Value type: > + Definition: See reset.txt section "consumers". PHY reset specifiers > + for phy core and COR resets. > + > +- reset-names: > + Value type: > + Definition: Names of the resets in 1-1 correspondence with the "resets" > + property. Must contain "com" and "phy". Perhaps "Must contain both com and phy, if property is specified", to clarify that it's all or nothing. Looks good otherwise. Regards, Bjorn From mboxrd@z Thu Jan 1 00:00:00 1970 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Subject: [v2,1/2] dt-bindings: Add Qualcomm USB Super-Speed PHY bindings From: Bjorn Andersson Message-Id: <20190129203845.GB3036@builder> Date: Tue, 29 Jan 2019 12:38:45 -0800 To: Jorge Ramirez-Ortiz Cc: gregkh@linuxfoundation.org, mark.rutland@arm.com, kishon@ti.com, jackp@codeaurora.org, andy.gross@linaro.org, swboyd@chromium.org, shawn.guo@linaro.org, vkoul@kernel.org, khasim.mohammed@linaro.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org List-ID: T24gVHVlIDI5IEphbiAwMzozNSBQU1QgMjAxOSwgSm9yZ2UgUmFtaXJlei1PcnRpeiB3cm90ZToK Cj4gQmluZGluZyBkZXNjcmlwdGlvbiBmb3IgUXVhbGNvbW0ncyBTeW5vcHN5cyAxLjAuMCBzdXBl ci1zcGVlZCBQSFkKClN1cGVyU3BlZWQKCj4gY29udHJvbGxlciBlbWJlZGRlZCBpbiBRQ1M0MDQu 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[104.188.17.28]) by smtp.gmail.com with ESMTPSA id g26sm45604376pfh.61.2019.01.29.12.39.02 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 29 Jan 2019 12:39:03 -0800 (PST) Date: Tue, 29 Jan 2019 12:38:45 -0800 From: Bjorn Andersson To: Jorge Ramirez-Ortiz Subject: Re: [PATCH v2 1/2] dt-bindings: Add Qualcomm USB Super-Speed PHY bindings Message-ID: <20190129203845.GB3036@builder> References: <1548761715-4004-1-git-send-email-jorge.ramirez-ortiz@linaro.org> <1548761715-4004-2-git-send-email-jorge.ramirez-ortiz@linaro.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1548761715-4004-2-git-send-email-jorge.ramirez-ortiz@linaro.org> User-Agent: Mutt/1.10.0 (2018-05-17) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190129_123905_331547_4657774E X-CRM114-Status: GOOD ( 16.51 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, devicetree@vger.kernel.org, jackp@codeaurora.org, shawn.guo@linaro.org, gregkh@linuxfoundation.org, linux-usb@vger.kernel.org, khasim.mohammed@linaro.org, linux-kernel@vger.kernel.org, swboyd@chromium.org, vkoul@kernel.org, linux-arm-msm@vger.kernel.org, andy.gross@linaro.org, kishon@ti.com, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue 29 Jan 03:35 PST 2019, Jorge Ramirez-Ortiz wrote: > Binding description for Qualcomm's Synopsys 1.0.0 super-speed PHY SuperSpeed > controller embedded in QCS404. > > Based on Sriharsha Allenki's original > definitions. > > Signed-off-by: Jorge Ramirez-Ortiz > --- > .../devicetree/bindings/usb/qcom,usb-ssphy.txt | 73 ++++++++++++++++++++++ > 1 file changed, 73 insertions(+) > create mode 100644 Documentation/devicetree/bindings/usb/qcom,usb-ssphy.txt > > diff --git a/Documentation/devicetree/bindings/usb/qcom,usb-ssphy.txt b/Documentation/devicetree/bindings/usb/qcom,usb-ssphy.txt > new file mode 100644 > index 0000000..8ef6e39 > --- /dev/null > +++ b/Documentation/devicetree/bindings/usb/qcom,usb-ssphy.txt > @@ -0,0 +1,73 @@ > +Qualcomm Synopsys 1.0.0 SS phy controller > +=========================================== > + > +Synopsys 1.0.0 ss phy controller supports SS usb connectivity on Qualcomm > +chipsets It's based on Synopsys IP, but it's Qualcomm's version, and isn't the 1.0.0 Qualcomm's version number for this block? Also I think it "provides SuperSpeed USB connectivity on some Qualcomm platforms". > + > +Required properties: > + > +- compatible: > + Value type: > + Definition: Should contain "qcom,usb-ssphy". > + > +- reg: > + Value type: > + Definition: USB PHY base address and length of the register map. > + > +- #phy-cells: > + Value type: > + Definition: Should be 0. See phy/phy-bindings.txt for details. > + > +- clocks: > + Value type: > + Definition: See clock-bindings.txt section "consumers". List of > + three clock specifiers for reference, phy core and > + pipe clocks. > + > +- clock-names: > + Value type: > + Definition: Names of the clocks in 1-1 correspondence with the "clocks" > + property. Must contain "ref", "phy" and "pipe". > + > +- vdd-supply: > + Value type: > + Definition: phandle to the regulator VDD supply node. > + > +- vdda1p8-supply: > + Value type: > + Definition: phandle to the regulator 1.8V supply node. > + > + > +Optional child nodes: > + > +- vbus-supply: > + Value type: > + Definition: phandle to the VBUS supply node. > + > +- resets: > + Value type: > + Definition: See reset.txt section "consumers". PHY reset specifiers > + for phy core and COR resets. > + > +- reset-names: > + Value type: > + Definition: Names of the resets in 1-1 correspondence with the "resets" > + property. Must contain "com" and "phy". Perhaps "Must contain both com and phy, if property is specified", to clarify that it's all or nothing. Looks good otherwise. Regards, Bjorn _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel