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From: Rajneesh Bhardwaj <rajneesh.bhardwaj@linux.intel.com>
To: platform-driver-x86@vger.kernel.org
Cc: dvhart@infradead.org, andy@infradead.org,
	linux-kernel@vger.kernel.org,
	Rajneesh Bhardwaj <rajneesh.bhardwaj@linux.intel.com>,
	"David E. Box" <david.e.box@intel.com>,
	Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Subject: [PATCH 05/10] platform/x86: intel_pmc_core: Include Reserved IP for LTR
Date: Fri,  1 Feb 2019 13:02:29 +0530	[thread overview]
Message-ID: <20190201073234.13280-6-rajneesh.bhardwaj@linux.intel.com> (raw)
In-Reply-To: <20190201073234.13280-1-rajneesh.bhardwaj@linux.intel.com>

Recently introduced commit "platform/x86: intel_pmc_core: Show Latency
Tolerance info <51337cd94d18184601ac0fb4cf1a02b8bbabc3d7> skipped the
LTR from a reserved IP. Though this doesn't cause any functional issue
but it is needed for the consumers of "ltr_ignore" as the index printing
for "ltr_show" is missing. For example, w/o this change, a user that wants
to ignore LTR from ME would do something like

echo 5 > ltr_ignore

but the index for ME is 6. Printing a reserved IP helps to properly
calculate LTR ignore offsets.

Cc: "David E. Box" <david.e.box@intel.com>
Cc: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@linux.intel.com>
---
 drivers/platform/x86/intel_pmc_core.c | 2 ++
 drivers/platform/x86/intel_pmc_core.h | 2 ++
 2 files changed, 4 insertions(+)

diff --git a/drivers/platform/x86/intel_pmc_core.c b/drivers/platform/x86/intel_pmc_core.c
index 125461ca2927..835ed6d333bf 100644
--- a/drivers/platform/x86/intel_pmc_core.c
+++ b/drivers/platform/x86/intel_pmc_core.c
@@ -108,6 +108,7 @@ static const struct pmc_bit_map spt_ltr_show_map[] = {
 	{"SATA",		SPT_PMC_LTR_SATA},
 	{"GIGABIT_ETHERNET",	SPT_PMC_LTR_GBE},
 	{"XHCI",		SPT_PMC_LTR_XHCI},
+	{"Reserved",		SPT_PMC_LTR_RESERVED},
 	{"ME",			SPT_PMC_LTR_ME},
 	/* EVA is Enterprise Value Add, doesn't really exist on PCH */
 	{"EVA",			SPT_PMC_LTR_EVA},
@@ -276,6 +277,7 @@ static const struct pmc_bit_map cnp_ltr_show_map[] = {
 	{"SATA",		CNP_PMC_LTR_SATA},
 	{"GIGABIT_ETHERNET",	CNP_PMC_LTR_GBE},
 	{"XHCI",		CNP_PMC_LTR_XHCI},
+	{"Reserved",		CNP_PMC_LTR_RESERVED},
 	{"ME",			CNP_PMC_LTR_ME},
 	/* EVA is Enterprise Value Add, doesn't really exist on PCH */
 	{"EVA",			CNP_PMC_LTR_EVA},
diff --git a/drivers/platform/x86/intel_pmc_core.h b/drivers/platform/x86/intel_pmc_core.h
index 1a0104d2cbf0..0680ca397b57 100644
--- a/drivers/platform/x86/intel_pmc_core.h
+++ b/drivers/platform/x86/intel_pmc_core.h
@@ -46,6 +46,7 @@
 #define SPT_PMC_LTR_SATA			0x368
 #define SPT_PMC_LTR_GBE				0x36C
 #define SPT_PMC_LTR_XHCI			0x370
+#define SPT_PMC_LTR_RESERVED			0x374
 #define SPT_PMC_LTR_ME				0x378
 #define SPT_PMC_LTR_EVA				0x37C
 #define SPT_PMC_LTR_SPC				0x380
@@ -156,6 +157,7 @@ enum ppfear_regs {
 #define CNP_PMC_LTR_SATA			0x1B68
 #define CNP_PMC_LTR_GBE				0x1B6C
 #define CNP_PMC_LTR_XHCI			0x1B70
+#define CNP_PMC_LTR_RESERVED			0x1B74
 #define CNP_PMC_LTR_ME				0x1B78
 #define CNP_PMC_LTR_EVA				0x1B7C
 #define CNP_PMC_LTR_SPC				0x1B80
-- 
2.17.1


  parent reply	other threads:[~2019-02-01  7:32 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-02-01  7:32 [PATCH 00/10] ICL support and other enhancements for PMC Core Rajneesh Bhardwaj
2019-02-01  7:32 ` [PATCH 01/10] platform/x86: intel_pmc_core: Handle CFL regmap properly Rajneesh Bhardwaj
2019-02-01  7:32 ` [PATCH 02/10] platform/x86: intel_pmc_core: Fix PCH IP sts reading Rajneesh Bhardwaj
2019-02-01  7:32 ` [PATCH 03/10] platform/x86: intel_pmc_core: Fix PCH IP name Rajneesh Bhardwaj
2019-02-01  7:32 ` [PATCH 04/10] platform/x86: intel_pmc_core: Fix file permissions for ltr_show Rajneesh Bhardwaj
2019-02-01  7:32 ` Rajneesh Bhardwaj [this message]
2019-02-01  7:32 ` [PATCH 06/10] x86/cpu: Add Icelake to Intel family Rajneesh Bhardwaj
2019-02-04 17:34   ` Thomas Gleixner
2019-02-05  3:51     ` Bhardwaj, Rajneesh
2019-02-01  7:32 ` [PATCH 07/10] platform/x86: intel_pmc_core: Convert to INTEL_CPU_FAM6 macro Rajneesh Bhardwaj
2019-02-01  7:32 ` [PATCH 08/10] platform/x86: intel_pmc_core: Add ICL platform support Rajneesh Bhardwaj
2019-02-12  9:43   ` Anshuman Gupta
2019-02-12 10:18     ` Andy Shevchenko
2019-02-13 15:17       ` Bhardwaj, Rajneesh
2019-02-01  7:32 ` [PATCH 09/10] platform/x86: intel_pmc_core: Add Package cstates residency info Rajneesh Bhardwaj
2019-02-11 16:41   ` Anshuman Gupta
2019-02-11 18:31     ` Bhardwaj, Rajneesh
2019-02-12 10:25       ` Andy Shevchenko
2019-02-12 10:34         ` Bhardwaj, Rajneesh
2019-02-12 10:38           ` Andy Shevchenko
2019-02-01  7:32 ` [PATCH 10/10] platform/x86: intel_pmc_core: Quirk to ignore XTAL shutdown Rajneesh Bhardwaj
2019-02-05 18:06 ` [PATCH 00/10] ICL support and other enhancements for PMC Core Andy Shevchenko
2019-02-05 18:13   ` Bhardwaj, Rajneesh

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