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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 4/4] drm/i915: Drop WaIncreaseLatencyIPCEnabled/1140 for cnl
Date: Mon, 4 Feb 2019 19:40:56 +0200	[thread overview]
Message-ID: <20190204174056.GK20097@intel.com> (raw)
In-Reply-To: <20190131181047.GG19523@intel.com>

On Thu, Jan 31, 2019 at 10:10:47AM -0800, Rodrigo Vivi wrote:
> On Thu, Jan 31, 2019 at 09:42:16AM +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > 
> > Drop WaIncreaseLatencyIPCEnabled/Display w/a #1140 for
> > early cnl steppings. Also switch the kbl/cfl case to check
> > for IS_GEN9_BC() for brevity. It ends up being the same thing
> > because IPC is disabled on SKL due to w/a #0477.
> 
> I think this deserves a commend in the code, otherwise someone
> in the future might not notice that and send a patch to replace
> 9_BC per KBL || CFL...
> 
> anyway:
> 
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

Ta. I just noticed there were some other IS_KBL||IS_CFL cases in the
code as well. So maybe I'll just leave it as is here too.

One thing I don't like is that w/a #0477 is in the device info. I think
I'll want to move that into ipc code to make it less confusing what's
going on.

> 
> 
> 
> > 
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_pm.c | 4 +---
> >  1 file changed, 1 insertion(+), 3 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > index 306e41ccc50e..55491e2d5134 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -4701,9 +4701,7 @@ static void skl_compute_plane_wm(const struct intel_crtc_state *cstate,
> >  	 * WaIncreaseLatencyIPCEnabled: kbl,cfl
> >  	 * Display WA #1141: kbl,cfl
> >  	 */
> > -	if ((IS_KABYLAKE(dev_priv) || IS_COFFEELAKE(dev_priv) ||
> > -	    IS_CNL_REVID(dev_priv, CNL_REVID_A0, CNL_REVID_B0)) &&
> > -	    dev_priv->ipc_enabled)
> > +	if (IS_GEN9_BC(dev_priv) && dev_priv->ipc_enabled)
> >  		latency += 4;
> >  
> >  	if (skl_needs_memory_bw_wa(dev_priv) && wp->x_tiled)
> > -- 
> > 2.19.2
> > 
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2019-02-04 17:41 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-31  7:42 [PATCH 1/4] drm/i915: Enable transition watermarks for glk Ville Syrjala
2019-01-31  7:42 ` [PATCH 2/4] drm/i915: Implement display w/a 1140 for glk/cnl Ville Syrjala
2019-01-31 18:07   ` Rodrigo Vivi
2019-01-31  7:42 ` [PATCH 3/4] drm/i915: Document that we implement WaIncreaseLatencyIPCEnabled Ville Syrjala
2019-01-31 18:08   ` Rodrigo Vivi
2019-01-31  7:42 ` [PATCH 4/4] drm/i915: Drop WaIncreaseLatencyIPCEnabled/1140 for cnl Ville Syrjala
2019-01-31 18:10   ` Rodrigo Vivi
2019-02-04 17:40     ` Ville Syrjälä [this message]
2019-02-04 17:49       ` Rodrigo Vivi
2019-02-04 17:58         ` Ville Syrjälä
2019-01-31  9:11 ` ✓ Fi.CI.BAT: success for series starting with [1/4] drm/i915: Enable transition watermarks for glk Patchwork
2019-01-31 18:04 ` [PATCH 1/4] " Rodrigo Vivi
2019-01-31 20:07 ` ✗ Fi.CI.IGT: failure for series starting with [1/4] " Patchwork
2019-02-04 17:38   ` Ville Syrjälä
2019-02-05 11:39     ` Petri Latvala
2019-02-05 19:34 ` ✗ Fi.CI.BAT: failure for series starting with [1/4] drm/i915: Enable transition watermarks for glk (rev2) Patchwork

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