Hi Paul,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on mtd/nand/next]
[also build test ERROR on v5.0-rc4]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url:    https://github.com/0day-ci/linux/commits/Paul-Cercueil/Ingenic-JZ4780-NAND-patchset-v2/20190204-163709
base:   git://git.infradead.org/linux-mtd.git nand/next
config: sh-allmodconfig (attached as .config)
compiler: sh4-linux-gnu-gcc (Debian 8.2.0-11) 8.2.0
reproduce:
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # save the attached .config to linux build tree
        GCC_VERSION=8.2.0 make.cross ARCH=sh 

All errors (new ones prefixed by >>):

   drivers/mtd/nand/raw/ingenic/jz4740_bch.c: In function 'jz4740_bch_init':
>> drivers/mtd/nand/raw/ingenic/jz4740_bch.c:46:2: error: implicit declaration of function 'writel' [-Werror=implicit-function-declaration]
     writel(0, bch->base + JZ_REG_NAND_IRQ_STAT);
     ^~~~~~
>> drivers/mtd/nand/raw/ingenic/jz4740_bch.c:49:8: error: implicit declaration of function 'readl' [-Werror=implicit-function-declaration]
     reg = readl(bch->base + JZ_REG_NAND_ECC_CTRL);
           ^~~~~
   drivers/mtd/nand/raw/ingenic/jz4740_bch.c: In function 'jz4740_bch_calculate':
>> drivers/mtd/nand/raw/ingenic/jz4740_bch.c:83:17: error: implicit declaration of function 'readb' [-Werror=implicit-function-declaration]
      ecc_code[i] = readb(bch->base + JZ_REG_NAND_PAR0 + i);
                    ^~~~~
   drivers/mtd/nand/raw/ingenic/jz4740_bch.c: In function 'jz4740_bch_correct':
>> drivers/mtd/nand/raw/ingenic/jz4740_bch.c:123:3: error: implicit declaration of function 'writeb'; did you mean 'up_write'? [-Werror=implicit-function-declaration]
      writeb(ecc_code[i], bch->base + JZ_REG_NAND_PAR0 + i);
      ^~~~~~
      up_write
   cc1: some warnings being treated as errors

vim +/writel +46 drivers/mtd/nand/raw/ingenic/jz4740_bch.c

    40	
    41	static void jz4740_bch_init(struct jz4780_bch *bch, bool encode)
    42	{
    43		uint32_t reg;
    44	
    45		/* Clear interrupt status */
  > 46		writel(0, bch->base + JZ_REG_NAND_IRQ_STAT);
    47	
    48		/* Initialize and enable BCH */
  > 49		reg = readl(bch->base + JZ_REG_NAND_ECC_CTRL);
    50		reg |= JZ_NAND_ECC_CTRL_RESET;
    51		reg |= JZ_NAND_ECC_CTRL_ENABLE;
    52		reg |= JZ_NAND_ECC_CTRL_RS;
    53		if (encode)
    54			reg |= JZ_NAND_ECC_CTRL_ENCODING;
    55		else
    56			reg &= ~JZ_NAND_ECC_CTRL_ENCODING;
    57	
    58		writel(reg, bch->base + JZ_REG_NAND_ECC_CTRL);
    59	}
    60	
    61	static int jz4740_bch_calculate(struct jz4780_bch *bch,
    62					struct jz4780_bch_params *params,
    63					const u8 *buf, u8 *ecc_code)
    64	{
    65		uint32_t reg, status;
    66		unsigned int timeout = 1000;
    67		int i;
    68	
    69		jz4740_bch_init(bch, true);
    70	
    71		do {
    72			status = readl(bch->base + JZ_REG_NAND_IRQ_STAT);
    73		} while (!(status & JZ_NAND_STATUS_ENC_FINISH) && --timeout);
    74	
    75		if (timeout == 0)
    76			return -ETIMEDOUT;
    77	
    78		reg = readl(bch->base + JZ_REG_NAND_ECC_CTRL);
    79		reg &= ~JZ_NAND_ECC_CTRL_ENABLE;
    80		writel(reg, bch->base + JZ_REG_NAND_ECC_CTRL);
    81	
    82		for (i = 0; i < params->bytes; ++i)
  > 83			ecc_code[i] = readb(bch->base + JZ_REG_NAND_PAR0 + i);
    84	
    85		/* If the written data is completely 0xff, we also want to write 0xff as
    86		 * ecc, otherwise we will get in trouble when doing subpage writes.
    87		 */
    88		if (memcmp(ecc_code, empty_block_ecc, ARRAY_SIZE(empty_block_ecc)) == 0)
    89			memset(ecc_code, 0xff, ARRAY_SIZE(empty_block_ecc));
    90	
    91		return 0;
    92	}
    93	
    94	static void jz_nand_correct_data(uint8_t *buf, int index, int mask)
    95	{
    96		int offset = index & 0x7;
    97		uint16_t data;
    98	
    99		index += (index >> 3);
   100	
   101		data = buf[index];
   102		data |= buf[index + 1] << 8;
   103	
   104		mask ^= (data >> offset) & 0x1ff;
   105		data &= ~(0x1ff << offset);
   106		data |= (mask << offset);
   107	
   108		buf[index] = data & 0xff;
   109		buf[index + 1] = (data >> 8) & 0xff;
   110	}
   111	
   112	static int jz4740_bch_correct(struct jz4780_bch *bch,
   113				      struct jz4780_bch_params *params,
   114				      u8 *buf, u8 *ecc_code)
   115	{
   116		int i, error_count, index;
   117		uint32_t reg, status, error;
   118		unsigned int timeout = 1000;
   119	
   120		jz4740_bch_init(bch, false);
   121	
   122		for (i = 0; i < params->bytes; ++i)
 > 123			writeb(ecc_code[i], bch->base + JZ_REG_NAND_PAR0 + i);
   124	
   125		reg = readl(bch->base + JZ_REG_NAND_ECC_CTRL);
   126		reg |= JZ_NAND_ECC_CTRL_PAR_READY;
   127		writel(reg, bch->base + JZ_REG_NAND_ECC_CTRL);
   128	
   129		do {
   130			status = readl(bch->base + JZ_REG_NAND_IRQ_STAT);
   131		} while (!(status & JZ_NAND_STATUS_DEC_FINISH) && --timeout);
   132	
   133		if (timeout == 0)
   134			return -ETIMEDOUT;
   135	
   136		reg = readl(bch->base + JZ_REG_NAND_ECC_CTRL);
   137		reg &= ~JZ_NAND_ECC_CTRL_ENABLE;
   138		writel(reg, bch->base + JZ_REG_NAND_ECC_CTRL);
   139	
   140		if (status & JZ_NAND_STATUS_ERROR) {
   141			if (status & JZ_NAND_STATUS_UNCOR_ERROR)
   142				return -EBADMSG;
   143	
   144			error_count = (status & JZ_NAND_STATUS_ERR_COUNT) >> 29;
   145	
   146			for (i = 0; i < error_count; ++i) {
   147				error = readl(bch->base + JZ_REG_NAND_ERR(i));
   148				index = ((error >> 16) & 0x1ff) - 1;
   149				if (index >= 0 && index < params->size)
   150					jz_nand_correct_data(buf, index, error & 0x1ff);
   151			}
   152	
   153			return error_count;
   154		}
   155	
   156		return 0;
   157	}
   158	

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