From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.linutronix.de (146.0.238.70:993) by crypto-ml.lab.linutronix.de with IMAP4-SSL for ; 05 Feb 2019 17:13:30 -0000 Received: from bombadil.infradead.org ([2607:7c80:54:e::133]) by Galois.linutronix.de with esmtps (TLS1.2:RSA_AES_256_CBC_SHA256:256) (Exim 4.80) (envelope-from ) id 1gr4Hp-0002tB-3N for speck@linutronix.de; Tue, 05 Feb 2019 18:13:29 +0100 Received: from j217100.upc-j.chello.nl ([24.132.217.100] helo=hirez.programming.kicks-ass.net) by bombadil.infradead.org with esmtpsa (Exim 4.90_1 #2 (Red Hat Linux)) id 1gr4Hn-0004M9-HP for speck@linutronix.de; Tue, 05 Feb 2019 17:13:27 +0000 Date: Tue, 5 Feb 2019 18:13:26 +0100 From: Peter Zijlstra Subject: [MODERATED] Re: [PATCH v1 9/9] PERFv1 3 Message-ID: <20190205171326.GI17550@hirez.programming.kicks-ass.net> References: <20190205152804.GY17528@hirez.programming.kicks-ass.net> <20190205164829.GI31598@tassilo.jf.intel.com> MIME-Version: 1.0 In-Reply-To: <20190205164829.GI31598@tassilo.jf.intel.com> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit To: speck@linutronix.de List-ID: On Tue, Feb 05, 2019 at 08:48:29AM -0800, speck for Andi Kleen wrote: > On Tue, Feb 05, 2019 at 04:28:04PM +0100, speck for Peter Zijlstra wrote: > > On Mon, Feb 04, 2019 at 05:14:10PM -0800, speck for Andi Kleen wrote: > > > From: Andi Kleen > > > Subject: kvm: vmx: Support TSX_FORCE_ABORT in KVM guests > > > > > > Recent microcode for Skylake added a new CPUID bit and MSR to control > > > TSX aborting and enabling PMU counter 3. This patch adds support > > > for controlling counter 3 from KVM guests. > > > > > > The implementation is similar to how SPEC_CTRL is implemented. Initially > > > the MSR is just intercepted, to avoid any impact on the entry/exit. > > > When the guest uses the MSR the first time add the MSR to the > > > entry/exit list to context switch it against the host. > > > > > > > What this does not explain is how the guest can ever possibly use this > > correctly, since it doesn't have access to PMC3. > > Yes you're right. In the current form it is only useful for > people who really want to disable TSX and don't care about the PMU. We should probably have a notsx boot option that completely disables the feature including its userspace enumeration. Some security consious folks might actually like that. TSX has been a boon to all the fault driven exploit muck. And userspace should be able to do this; we killed TSX on some early models before, right?