From mboxrd@z Thu Jan 1 00:00:00 1970 From: Tom Rini Date: Sun, 10 Feb 2019 08:09:25 -0500 Subject: [U-Boot] [U-Boot,6/7] dts: stm32mp1: clock tree update In-Reply-To: <1548850026-31746-7-git-send-email-patrick.delaunay@st.com> References: <1548850026-31746-7-git-send-email-patrick.delaunay@st.com> Message-ID: <20190210130925.GE16814@bill-the-cat> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Wed, Jan 30, 2019 at 01:07:05PM +0100, Patrick Delaunay wrote: > - Add st,digbypass on clk_hse node (needed for board rev.C) > - MLAHB/AHB max frequency increased from 200 to 209MHz, with: > - PLL3P set to 208.8MHz for MCU sub-system > - PLL3Q set to 24.57MHz for 48kHz SAI/SPI2S > - PLL3R set to 11.29MHz for 44.1kHz SAI/SPI2S > - PLL4P set to 99MHz for SDMMC and SPDIFRX > - PLL4Q set to 74.25MHz for EVAL board > > Signed-off-by: Patrick Delaunay Applied to u-boot/master, thanks! -- Tom -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 819 bytes Desc: not available URL: