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From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 2/4] drm/i915: Add pipe enable/disable tracepoints
Date: Wed, 13 Feb 2019 09:41:04 -0800	[thread overview]
Message-ID: <20190213174104.GC3125@intel.com> (raw)
In-Reply-To: <20190206204910.13965-2-ville.syrjala@linux.intel.com>

On Wed, Feb 06, 2019 at 10:49:08PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Add tracepoints for pipe enable/disable. We'll include the
> frame/scanline counters for all pipes in these tracepoints to
> help in diagnosing underruns and whatnot when enabling/disabling
> pipes in parallel with plane updates/flips on another pipe.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> ---
>  drivers/gpu/drm/i915/i915_trace.h    | 56 ++++++++++++++++++++++++++++
>  drivers/gpu/drm/i915/intel_display.c |  4 ++
>  2 files changed, 60 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_trace.h b/drivers/gpu/drm/i915/i915_trace.h
> index 308d36926335..96dfe651ffd0 100644
> --- a/drivers/gpu/drm/i915/i915_trace.h
> +++ b/drivers/gpu/drm/i915/i915_trace.h
> @@ -18,6 +18,62 @@
>  
>  /* watermark/fifo updates */
>  
> +TRACE_EVENT(intel_pipe_enable,
> +	    TP_PROTO(struct drm_i915_private *dev_priv, enum pipe pipe),
> +	    TP_ARGS(dev_priv, pipe),
> +
> +	    TP_STRUCT__entry(
> +			     __array(u32, frame, 3)
> +			     __array(u32, scanline, 3)
> +			     __field(enum pipe, pipe)
> +			     ),
> +
> +	    TP_fast_assign(
> +			   enum pipe _pipe;
> +			   for_each_pipe(dev_priv, _pipe) {
> +				   __entry->frame[_pipe] =
> +					   dev_priv->drm.driver->get_vblank_counter(&dev_priv->drm, _pipe);
> +				   __entry->scanline[_pipe] =
> +					   intel_get_crtc_scanline(intel_get_crtc_for_pipe(dev_priv, _pipe));
> +			   }
> +			   __entry->pipe = pipe;
> +			   ),
> +
> +	    TP_printk("pipe %c enable, pipe A: frame=%u, scanline=%u, pipe B: frame=%u, scanline=%u, pipe C: frame=%u, scanline=%u",
> +		      pipe_name(__entry->pipe),
> +		      __entry->frame[PIPE_A], __entry->scanline[PIPE_A],
> +		      __entry->frame[PIPE_B], __entry->scanline[PIPE_B],
> +		      __entry->frame[PIPE_C], __entry->scanline[PIPE_C])
> +);
> +
> +TRACE_EVENT(intel_pipe_disable,
> +	    TP_PROTO(struct drm_i915_private *dev_priv, enum pipe pipe),
> +	    TP_ARGS(dev_priv, pipe),
> +
> +	    TP_STRUCT__entry(
> +			     __array(u32, frame, 3)
> +			     __array(u32, scanline, 3)
> +			     __field(enum pipe, pipe)
> +			     ),
> +
> +	    TP_fast_assign(
> +			   enum pipe _pipe;
> +			   for_each_pipe(dev_priv, _pipe) {
> +				   __entry->frame[_pipe] =
> +					   dev_priv->drm.driver->get_vblank_counter(&dev_priv->drm, _pipe);
> +				   __entry->scanline[_pipe] =
> +					   intel_get_crtc_scanline(intel_get_crtc_for_pipe(dev_priv, _pipe));
> +			   }
> +			   __entry->pipe = pipe;
> +			   ),
> +
> +	    TP_printk("pipe %c disable, pipe A: frame=%u, scanline=%u, pipe B: frame=%u, scanline=%u, pipe C: frame=%u, scanline=%u",
> +		      pipe_name(__entry->pipe),
> +		      __entry->frame[PIPE_A], __entry->scanline[PIPE_A],
> +		      __entry->frame[PIPE_B], __entry->scanline[PIPE_B],
> +		      __entry->frame[PIPE_C], __entry->scanline[PIPE_C])
> +);
> +
>  TRACE_EVENT(intel_pipe_crc,
>  	    TP_PROTO(struct intel_crtc *crtc, const u32 crcs[5]),
>  	    TP_ARGS(crtc, crcs),
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 4d5ec929f987..4e3ea2d1a880 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -1821,6 +1821,8 @@ static void intel_enable_pipe(const struct intel_crtc_state *new_crtc_state)
>  		/* FIXME: assert CPU port conditions for SNB+ */
>  	}
>  
> +	trace_intel_pipe_enable(dev_priv, pipe);
> +
>  	reg = PIPECONF(cpu_transcoder);
>  	val = I915_READ(reg);
>  	if (val & PIPECONF_ENABLE) {
> @@ -1860,6 +1862,8 @@ static void intel_disable_pipe(const struct intel_crtc_state *old_crtc_state)
>  	 */
>  	assert_planes_disabled(crtc);
>  
> +	trace_intel_pipe_disable(dev_priv, pipe);
> +
>  	reg = PIPECONF(cpu_transcoder);
>  	val = I915_READ(reg);
>  	if ((val & PIPECONF_ENABLE) == 0)
> -- 
> 2.19.2
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
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  reply	other threads:[~2019-02-13 17:41 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-02-06 20:49 [PATCH 1/4] drm/i915: Add pipe crc tracepoint Ville Syrjala
2019-02-06 20:49 ` [PATCH 2/4] drm/i915: Add pipe enable/disable tracepoints Ville Syrjala
2019-02-13 17:41   ` Rodrigo Vivi [this message]
2019-02-06 20:49 ` [PATCH 3/4] drm/i915: Add overlooked plane disable tracepoint into intel_crtc_disable_planes() Ville Syrjala
2019-02-13 17:41   ` Rodrigo Vivi
2019-02-06 20:49 ` [PATCH 4/4] drm/i915: Wrap plane update/disable hook calls Ville Syrjala
2019-02-13 17:41   ` Rodrigo Vivi
2019-02-06 21:19 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915: Add pipe crc tracepoint Patchwork
2019-02-06 21:49 ` ✓ Fi.CI.BAT: success " Patchwork
2019-02-07  1:44 ` ✓ Fi.CI.IGT: " Patchwork
2019-02-07  5:23 ` [PATCH 1/4] " kbuild test robot
2019-02-07  6:01 ` kbuild test robot
2019-02-13 17:40 ` Rodrigo Vivi

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