From mboxrd@z Thu Jan 1 00:00:00 1970 From: Lukasz Majewski Date: Wed, 13 Feb 2019 22:46:42 +0100 Subject: [U-Boot] [PATCH v4 05/22] pcm052: board: Do not enable I2C2 code in the board file In-Reply-To: <20190213214659.22106-1-lukma@denx.de> References: <20190213214659.22106-1-lukma@denx.de> Message-ID: <20190213214659.22106-6-lukma@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de As the I2C2 clock is now enabled in the generic clock code, we can remove this code from a board file. Signed-off-by: Lukasz Majewski Tested-by: Marcel Ziswiler --- Changes in v4: None Changes in v3: - New patch (separate board code patch) Changes in v2: None board/phytec/pcm052/pcm052.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/phytec/pcm052/pcm052.c b/board/phytec/pcm052/pcm052.c index f988af2abc..cfc8009102 100644 --- a/board/phytec/pcm052/pcm052.c +++ b/board/phytec/pcm052/pcm052.c @@ -485,7 +485,7 @@ static void clock_init(void) clrsetbits_le32(&ccm->ccgr9, CCM_REG_CTRL_MASK, CCM_CCGR9_FEC0_CTRL_MASK | CCM_CCGR9_FEC1_CTRL_MASK); clrsetbits_le32(&ccm->ccgr10, CCM_REG_CTRL_MASK, - CCM_CCGR10_NFC_CTRL_MASK | CCM_CCGR10_I2C2_CTRL_MASK); + CCM_CCGR10_NFC_CTRL_MASK); clrsetbits_le32(&anadig->pll2_ctrl, ANADIG_PLL2_CTRL_POWERDOWN, ANADIG_PLL2_CTRL_ENABLE | ANADIG_PLL2_CTRL_DIV_SELECT); -- 2.11.0