All of lore.kernel.org
 help / color / mirror / Atom feed
From: Bhawanpreet Lakha <Bhawanpreet.Lakha-5C7GfCeVMHo@public.gmane.org>
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Cc: Charlene Liu <charlene.liu-5C7GfCeVMHo@public.gmane.org>
Subject: [PATCH 17/18] drm/amd/display: Add pp_smu null pointer check
Date: Mon, 25 Feb 2019 17:46:14 -0500	[thread overview]
Message-ID: <20190225224615.4507-18-Bhawanpreet.Lakha@amd.com> (raw)
In-Reply-To: <20190225224615.4507-1-Bhawanpreet.Lakha-5C7GfCeVMHo@public.gmane.org>

From: Charlene Liu <charlene.liu@amd.com>

res_pool->pp_smu may be NULL. Check before use

Change-Id: Ib038334b2374b10012fc374a3aeb5c417655c7c9
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
---
 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c     |  6 ++++--
 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_clk_mgr.c | 11 ++++++-----
 2 files changed, 10 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c b/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c
index 2a807b9f77f7..8ee182be394a 100644
--- a/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c
+++ b/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c
@@ -1391,12 +1391,14 @@ void dcn_bw_update_from_pplib(struct dc *dc)
 
 void dcn_bw_notify_pplib_of_wm_ranges(struct dc *dc)
 {
-	struct pp_smu_funcs_rv *pp = &dc->res_pool->pp_smu->rv_funcs;
+	struct pp_smu_funcs_rv *pp = NULL;
 	struct pp_smu_wm_range_sets ranges = {0};
 	int min_fclk_khz, min_dcfclk_khz, socclk_khz;
 	const int overdrive = 5000000; /* 5 GHz to cover Overdrive */
 
-	if (!pp->set_wm_ranges)
+	if (dc->res_pool->pp_smu)
+		pp = &dc->res_pool->pp_smu->rv_funcs;
+	if (!pp || !pp->set_wm_ranges)
 		return;
 
 	kernel_fpu_begin();
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_clk_mgr.c
index 3b91505063e9..2fb65d16205c 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_clk_mgr.c
@@ -171,7 +171,7 @@ static void dcn1_update_clocks(struct clk_mgr *clk_mgr,
 	struct pp_smu_display_requirement_rv *smu_req_cur =
 			&dc->res_pool->pp_smu_req;
 	struct pp_smu_display_requirement_rv smu_req = *smu_req_cur;
-	struct pp_smu_funcs_rv *pp_smu = &dc->res_pool->pp_smu->rv_funcs;
+	struct pp_smu_funcs_rv *pp_smu = NULL;
 	bool send_request_to_increase = false;
 	bool send_request_to_lower = false;
 	int display_count;
@@ -179,7 +179,8 @@ static void dcn1_update_clocks(struct clk_mgr *clk_mgr,
 	bool enter_display_off = false;
 
 	display_count = get_active_display_cnt(dc, context);
-
+	if (dc->res_pool->pp_smu)
+		pp_smu = &dc->res_pool->pp_smu->rv_funcs;
 	if (display_count == 0)
 		enter_display_off = true;
 
@@ -189,7 +190,7 @@ static void dcn1_update_clocks(struct clk_mgr *clk_mgr,
 		 * if function pointer not set up, this message is
 		 * sent as part of pplib_apply_display_requirements.
 		 */
-		if (pp_smu->set_display_count)
+		if (pp_smu && pp_smu->set_display_count)
 			pp_smu->set_display_count(&pp_smu->pp_smu, display_count);
 
 		smu_req.display_count = display_count;
@@ -239,7 +240,7 @@ static void dcn1_update_clocks(struct clk_mgr *clk_mgr,
 	 */
 	if (send_request_to_increase) {
 		/*use dcfclk to request voltage*/
-		if (pp_smu->set_hard_min_fclk_by_freq &&
+		if (pp_smu && pp_smu->set_hard_min_fclk_by_freq &&
 				pp_smu->set_hard_min_dcfclk_by_freq &&
 				pp_smu->set_min_deep_sleep_dcfclk) {
 
@@ -261,7 +262,7 @@ static void dcn1_update_clocks(struct clk_mgr *clk_mgr,
 
 	if (!send_request_to_increase && send_request_to_lower) {
 		/*use dcfclk to request voltage*/
-		if (pp_smu->set_hard_min_fclk_by_freq &&
+		if (pp_smu && pp_smu->set_hard_min_fclk_by_freq &&
 				pp_smu->set_hard_min_dcfclk_by_freq &&
 				pp_smu->set_min_deep_sleep_dcfclk) {
 
-- 
2.17.1

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

  parent reply	other threads:[~2019-02-25 22:46 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-02-25 22:45 [PATCH 00/18] DC Patches 25 Feb 2019 Bhawanpreet Lakha
     [not found] ` <20190225224615.4507-1-Bhawanpreet.Lakha-5C7GfCeVMHo@public.gmane.org>
2019-02-25 22:45   ` [PATCH 01/18] drm/amd/display: add full update commit hint struct Bhawanpreet Lakha
2019-02-25 22:45   ` [PATCH 02/18] drm/amd/display: Add function to create 4d19 fixed point Bhawanpreet Lakha
2019-02-25 22:46   ` [PATCH 03/18] drm/amd/display: Respect aux return values Bhawanpreet Lakha
2019-02-25 22:46   ` [PATCH 04/18] drm/amd/display: Set stream->mode_changed when connectors change Bhawanpreet Lakha
2019-02-25 22:46   ` [PATCH 05/18] drm/amd/display: Add plane capabilities to dc_caps Bhawanpreet Lakha
2019-02-25 22:46   ` [PATCH 06/18] drm/amd/display: Drop underlay plane support Bhawanpreet Lakha
     [not found]     ` <20190225224615.4507-7-Bhawanpreet.Lakha-5C7GfCeVMHo@public.gmane.org>
2019-03-05 17:09       ` Michel Dänzer
     [not found]         ` <daf986ad-a939-05d2-8ee5-e103727d6b1d-otUistvHUpPR7s880joybQ@public.gmane.org>
2019-03-05 17:15           ` Kazlauskas, Nicholas
2019-02-25 22:46   ` [PATCH 07/18] drm/amd/display: Create overlay planes Bhawanpreet Lakha
     [not found]     ` <20190225224615.4507-8-Bhawanpreet.Lakha-5C7GfCeVMHo@public.gmane.org>
2019-02-27  4:03       ` Vishwakarma, Pratik
     [not found]         ` <390d83da-8de3-08df-4215-e9f2e4502ee8-5C7GfCeVMHo@public.gmane.org>
2019-02-27 12:50           ` Nicholas Kazlauskas
2019-02-25 22:46   ` [PATCH 08/18] drm/amd/display: Allow pflips from a framebuffer to itself Bhawanpreet Lakha
2019-02-25 22:46   ` [PATCH 09/18] drm/amd/display: Refactor pageflips plane commit Bhawanpreet Lakha
2019-02-25 22:46   ` [PATCH 10/18] drm/amd/display: Keep clocks high before seamless boot done Bhawanpreet Lakha
2019-02-25 22:46   ` [PATCH 11/18] drm/amd/display: half bandwidth for YCbCr420 during validation Bhawanpreet Lakha
2019-02-25 22:46   ` [PATCH 12/18] Revert "drm/amd/display: dcn add check surface in_use" Bhawanpreet Lakha
2019-02-25 22:46   ` [PATCH 13/18] drm/amd/display: Re-add custom degamma support Bhawanpreet Lakha
2019-02-25 22:46   ` [PATCH 14/18] drm/amd/display: Update plane tiling attributes for stream updates Bhawanpreet Lakha
2019-02-25 22:46   ` [PATCH 15/18] drm/amd/display: Fix soft hang issue when some DPCD data invalid Bhawanpreet Lakha
2019-02-25 22:46   ` [PATCH 16/18] drm/amd/display: 3.2.20 Bhawanpreet Lakha
2019-02-25 22:46   ` Bhawanpreet Lakha [this message]
2019-02-25 22:46   ` [PATCH 18/18] drm/amd/display: Fix Divide by 0 in memory calculations Bhawanpreet Lakha

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20190225224615.4507-18-Bhawanpreet.Lakha@amd.com \
    --to=bhawanpreet.lakha-5c7gfcevmho@public.gmane.org \
    --cc=amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org \
    --cc=charlene.liu-5C7GfCeVMHo@public.gmane.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.