From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([209.51.188.92]:58429) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gyUlo-0005w7-8k for qemu-devel@nongnu.org; Mon, 25 Feb 2019 23:55:10 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gyUln-0003EQ-7V for qemu-devel@nongnu.org; Mon, 25 Feb 2019 23:55:08 -0500 From: David Gibson Date: Tue, 26 Feb 2019 15:52:48 +1100 Message-Id: <20190226045304.25618-35-david@gibson.dropbear.id.au> In-Reply-To: <20190226045304.25618-1-david@gibson.dropbear.id.au> References: <20190226045304.25618-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PULL 34/50] xics: Write source state to KVM at claim time List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: peter.maydell@linaro.org Cc: gkurz@kaod.org, clg@kaod.org, lvivier@redhat.com, qemu-devel@nongnu.org, qemu-ppc@nongnu.org, Greg Kurz , David Gibson From: Greg Kurz The pseries machine only uses LSIs to support legacy PCI devices. Every PHB claims 4 LSIs at realize time. When using in-kernel XICS (or upcoming in-kernel XIVE), QEMU synchronizes the state of all irqs, including these LSIs, later on at machine reset. In order to support PHB hotplug, we need a way to tell KVM about the LSIs that doesn't require a machine reset. An easy way to do that is to always inform KVM when an interrupt is claimed, which really isn't a performance path. Signed-off-by: Greg Kurz Message-Id: <155059668360.1466090.5969630516627776426.stgit@bahia.lab.tou= louse-stg.fr.ibm.com> Reviewed-by: C=C3=A9dric Le Goater Signed-off-by: David Gibson --- hw/intc/xics.c | 4 +++ hw/intc/xics_kvm.c | 74 +++++++++++++++++++++++++------------------ include/hw/ppc/xics.h | 1 + 3 files changed, 48 insertions(+), 31 deletions(-) diff --git a/hw/intc/xics.c b/hw/intc/xics.c index 767fdeb829..af7dc709ab 100644 --- a/hw/intc/xics.c +++ b/hw/intc/xics.c @@ -758,6 +758,10 @@ void ics_set_irq_type(ICSState *ics, int srcno, bool= lsi) =20 ics->irqs[srcno].flags |=3D lsi ? XICS_FLAGS_IRQ_LSI : XICS_FLAGS_IRQ_MSI; + + if (kvm_irqchip_in_kernel()) { + ics_set_kvm_state_one(ics, srcno); + } } =20 static void xics_register_types(void) diff --git a/hw/intc/xics_kvm.c b/hw/intc/xics_kvm.c index a00d0a7962..c6e1b630a4 100644 --- a/hw/intc/xics_kvm.c +++ b/hw/intc/xics_kvm.c @@ -213,45 +213,57 @@ void ics_synchronize_state(ICSState *ics) ics_get_kvm_state(ics); } =20 -int ics_set_kvm_state(ICSState *ics) +int ics_set_kvm_state_one(ICSState *ics, int srcno) { uint64_t state; - int i; Error *local_err =3D NULL; + ICSIRQState *irq =3D &ics->irqs[srcno]; + int ret; =20 - for (i =3D 0; i < ics->nr_irqs; i++) { - ICSIRQState *irq =3D &ics->irqs[i]; - int ret; - - state =3D irq->server; - state |=3D (uint64_t)(irq->saved_priority & KVM_XICS_PRIORITY_MA= SK) - << KVM_XICS_PRIORITY_SHIFT; - if (irq->priority !=3D irq->saved_priority) { - assert(irq->priority =3D=3D 0xff); - state |=3D KVM_XICS_MASKED; - } + state =3D irq->server; + state |=3D (uint64_t)(irq->saved_priority & KVM_XICS_PRIORITY_MASK) + << KVM_XICS_PRIORITY_SHIFT; + if (irq->priority !=3D irq->saved_priority) { + assert(irq->priority =3D=3D 0xff); + state |=3D KVM_XICS_MASKED; + } =20 - if (ics->irqs[i].flags & XICS_FLAGS_IRQ_LSI) { - state |=3D KVM_XICS_LEVEL_SENSITIVE; - if (irq->status & XICS_STATUS_ASSERTED) { - state |=3D KVM_XICS_PENDING; - } - } else { - if (irq->status & XICS_STATUS_MASKED_PENDING) { - state |=3D KVM_XICS_PENDING; - } + if (irq->flags & XICS_FLAGS_IRQ_LSI) { + state |=3D KVM_XICS_LEVEL_SENSITIVE; + if (irq->status & XICS_STATUS_ASSERTED) { + state |=3D KVM_XICS_PENDING; } - if (irq->status & XICS_STATUS_PRESENTED) { - state |=3D KVM_XICS_PRESENTED; - } - if (irq->status & XICS_STATUS_QUEUED) { - state |=3D KVM_XICS_QUEUED; + } else { + if (irq->status & XICS_STATUS_MASKED_PENDING) { + state |=3D KVM_XICS_PENDING; } + } + if (irq->status & XICS_STATUS_PRESENTED) { + state |=3D KVM_XICS_PRESENTED; + } + if (irq->status & XICS_STATUS_QUEUED) { + state |=3D KVM_XICS_QUEUED; + } + + ret =3D kvm_device_access(kernel_xics_fd, KVM_DEV_XICS_GRP_SOURCES, + srcno + ics->offset, &state, true, &local_er= r); + if (local_err) { + error_report_err(local_err); + return ret; + } + + return 0; +} + +int ics_set_kvm_state(ICSState *ics) +{ + int i; + + for (i =3D 0; i < ics->nr_irqs; i++) { + int ret; =20 - ret =3D kvm_device_access(kernel_xics_fd, KVM_DEV_XICS_GRP_SOURC= ES, - i + ics->offset, &state, true, &local_er= r); - if (local_err) { - error_report_err(local_err); + ret =3D ics_set_kvm_state_one(ics, i); + if (ret) { return ret; } } diff --git a/include/hw/ppc/xics.h b/include/hw/ppc/xics.h index d36bbe11ee..eb65ad7e43 100644 --- a/include/hw/ppc/xics.h +++ b/include/hw/ppc/xics.h @@ -195,6 +195,7 @@ void icp_synchronize_state(ICPState *icp); void icp_kvm_realize(DeviceState *dev, Error **errp); =20 void ics_get_kvm_state(ICSState *ics); +int ics_set_kvm_state_one(ICSState *ics, int srcno); int ics_set_kvm_state(ICSState *ics); void ics_synchronize_state(ICSState *ics); void ics_kvm_set_irq(ICSState *ics, int srcno, int val); --=20 2.20.1