From mboxrd@z Thu Jan 1 00:00:00 1970 From: Dave Martin Subject: Re: [PATCH v5 06/26] arm64/sve: Check SVE virtualisability Date: Tue, 26 Feb 2019 12:06:30 +0000 Message-ID: <20190226120630.GH3567@e103592.cambridge.arm.com> References: <1550519559-15915-1-git-send-email-Dave.Martin@arm.com> <1550519559-15915-7-git-send-email-Dave.Martin@arm.com> <64764e35-c243-e642-a868-5b9e221813c7@arm.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from localhost (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id 823354A319 for ; Tue, 26 Feb 2019 07:06:36 -0500 (EST) Received: from mm01.cs.columbia.edu ([127.0.0.1]) by localhost (mm01.cs.columbia.edu [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 2fTu2+O2Ov6u for ; Tue, 26 Feb 2019 07:06:35 -0500 (EST) Received: from foss.arm.com (usa-sjc-mx-foss1.foss.arm.com [217.140.101.70]) by mm01.cs.columbia.edu (Postfix) with ESMTP id 123734A1DF for ; Tue, 26 Feb 2019 07:06:35 -0500 (EST) Content-Disposition: inline In-Reply-To: <64764e35-c243-e642-a868-5b9e221813c7@arm.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu To: Julien Thierry Cc: Okamoto Takayuki , Christoffer Dall , Ard Biesheuvel , Marc Zyngier , Catalin Marinas , Will Deacon , Zhang Lei , kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org List-Id: kvmarm@lists.cs.columbia.edu On Wed, Feb 20, 2019 at 11:12:49AM +0000, Julien Thierry wrote: > Hi Dave, > > On 18/02/2019 19:52, Dave Martin wrote: > > Due to the way the effective SVE vector length is controlled and > > trapped at different exception levels, certain mismatches in the > > sets of vector lengths supported by different physical CPUs in the > > system may prevent straightforward virtualisation of SVE at parity > > with the host. > > > > This patch analyses the extent to which SVE can be virtualised > > safely without interfering with migration of vcpus between physical > > CPUs, and rejects late secondary CPUs that would erode the > > situation further. > > > > It is left up to KVM to decide what to do with this information. > > > > Signed-off-by: Dave Martin > > --- > > arch/arm64/include/asm/fpsimd.h | 1 + > > arch/arm64/kernel/cpufeature.c | 2 +- > > arch/arm64/kernel/fpsimd.c | 86 ++++++++++++++++++++++++++++++++++------- > > 3 files changed, 73 insertions(+), 16 deletions(-) > > > > diff --git a/arch/arm64/include/asm/fpsimd.h b/arch/arm64/include/asm/fpsimd.h > > index dd1ad39..964adc9 100644 > > --- a/arch/arm64/include/asm/fpsimd.h > > +++ b/arch/arm64/include/asm/fpsimd.h > > @@ -87,6 +87,7 @@ extern void sve_kernel_enable(const struct arm64_cpu_capabilities *__unused); > > extern u64 read_zcr_features(void); > > > > extern int __ro_after_init sve_max_vl; > > +extern int __ro_after_init sve_max_virtualisable_vl; > > > > #ifdef CONFIG_ARM64_SVE > > > > diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c > > index f6d84e2..5eaacb4 100644 > > --- a/arch/arm64/kernel/cpufeature.c > > +++ b/arch/arm64/kernel/cpufeature.c > > @@ -1825,7 +1825,7 @@ static void verify_sve_features(void) > > unsigned int len = zcr & ZCR_ELx_LEN_MASK; > > > > if (len < safe_len || sve_verify_vq_map()) { > > - pr_crit("CPU%d: SVE: required vector length(s) missing\n", > > + pr_crit("CPU%d: SVE: vector length support mismatch\n", > > smp_processor_id()); > > cpu_die_early(); > > } > > diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c > > index 62c37f0..64729e2 100644 > > --- a/arch/arm64/kernel/fpsimd.c > > +++ b/arch/arm64/kernel/fpsimd.c > > @@ -18,6 +18,7 @@ > > */ > > > > #include > > +#include > > #include > > #include > > #include > > @@ -48,6 +49,7 @@ > > #include > > #include > > #include > > +#include > > > > #define FPEXC_IOF (1 << 0) > > #define FPEXC_DZF (1 << 1) > > @@ -130,14 +132,18 @@ static int sve_default_vl = -1; > > > > /* Maximum supported vector length across all CPUs (initially poisoned) */ > > int __ro_after_init sve_max_vl = SVE_VL_MIN; > > +int __ro_after_init sve_max_virtualisable_vl = SVE_VL_MIN; > > /* Set of available vector lengths, as vq_to_bit(vq): */ > > static __ro_after_init DECLARE_BITMAP(sve_vq_map, SVE_VQ_MAX); > > +/* Set of vector lengths present on at least one cpu: */ > > +static __ro_after_init DECLARE_BITMAP(sve_vq_partial_map, SVE_VQ_MAX); > > static void __percpu *efi_sve_state; > > > > #else /* ! CONFIG_ARM64_SVE */ > > > > /* Dummy declaration for code that will be optimised out: */ > > extern __ro_after_init DECLARE_BITMAP(sve_vq_map, SVE_VQ_MAX); > > +extern __ro_after_init DECLARE_BITMAP(sve_vq_partial_map, SVE_VQ_MAX); > > extern void __percpu *efi_sve_state; > > > > #endif /* ! CONFIG_ARM64_SVE */ > > @@ -623,12 +629,6 @@ int sve_get_current_vl(void) > > return sve_prctl_status(0); > > } > > > > -/* > > - * Bitmap for temporary storage of the per-CPU set of supported vector lengths > > - * during secondary boot. > > - */ > > -static DECLARE_BITMAP(sve_secondary_vq_map, SVE_VQ_MAX); > > - > > static void sve_probe_vqs(DECLARE_BITMAP(map, SVE_VQ_MAX)) > > { > > unsigned int vq, vl; > > @@ -650,6 +650,7 @@ static void sve_probe_vqs(DECLARE_BITMAP(map, SVE_VQ_MAX)) > > void __init sve_init_vq_map(void) > > { > > sve_probe_vqs(sve_vq_map); > > + bitmap_copy(sve_vq_partial_map, sve_vq_map, SVE_VQ_MAX); > > } > > > > /* > > @@ -658,25 +659,58 @@ void __init sve_init_vq_map(void) > > */ > > void sve_update_vq_map(void) > > { > > - sve_probe_vqs(sve_secondary_vq_map); > > - bitmap_and(sve_vq_map, sve_vq_map, sve_secondary_vq_map, SVE_VQ_MAX); > > + DECLARE_BITMAP(tmp_map, SVE_VQ_MAX); > > + > > + sve_probe_vqs(tmp_map); > > + bitmap_and(sve_vq_map, sve_vq_map, tmp_map, SVE_VQ_MAX); > > + bitmap_or(sve_vq_partial_map, sve_vq_partial_map, tmp_map, SVE_VQ_MAX); > > } > > > > /* Check whether the current CPU supports all VQs in the committed set */ > > int sve_verify_vq_map(void) > > { > > - int ret = 0; > > + DECLARE_BITMAP(tmp_map, SVE_VQ_MAX); > > + unsigned long b; > > > > - sve_probe_vqs(sve_secondary_vq_map); > > - bitmap_andnot(sve_secondary_vq_map, sve_vq_map, sve_secondary_vq_map, > > - SVE_VQ_MAX); > > - if (!bitmap_empty(sve_secondary_vq_map, SVE_VQ_MAX)) { > > + sve_probe_vqs(tmp_map); > > + > > + bitmap_complement(tmp_map, tmp_map, SVE_VQ_MAX); > > + if (bitmap_intersects(tmp_map, sve_vq_map, SVE_VQ_MAX)) { > > pr_warn("SVE: cpu%d: Required vector length(s) missing\n", > > smp_processor_id()); > > - ret = -EINVAL; > > + return -EINVAL; > > } > > > > - return ret; > > + if (!IS_ENABLED(CONFIG_KVM) || !is_hyp_mode_available()) > > + return 0; > > + > > + /* > > + * For KVM, it is necessary to ensure that this CPU doesn't > > + * support any vector length that guests may have probed as > > + * unsupported. > > + */ > > + > > + /* Recover the set of supported VQs: */ > > + bitmap_complement(tmp_map, tmp_map, SVE_VQ_MAX); > > + /* Find VQs supported that are not globally supported: */ > > + bitmap_andnot(tmp_map, tmp_map, sve_vq_map, SVE_VQ_MAX); > > + > > + /* Find the lowest such VQ, if any: */ > > + b = find_last_bit(tmp_map, SVE_VQ_MAX); > > + if (b >= SVE_VQ_MAX) > > + return 0; /* no mismatches */ > > + > > + /* > > + * Mismatches above sve_max_virtualisable_vl are fine, since > > + * no guest is allowed to configure ZCR_EL2.LEN to exceed this: > > + */ > > + if (sve_vl_from_vq(bit_to_vq(b)) <= sve_max_virtualisable_vl) { > > + pr_warn("SVE: cpu%d: Unsupported vector length(s) present\n", > > Nit: might be good to specify that the vector length is unsupported for > virtualisation. > > Also, since KVM is the one deciding what to do with the information, > should we have a warning here? But I can understand that knowing which > CPUs are introducing unsupported vector length, maybe using pr_devel() > instead of pr_warn() These warnings are really for consumption by SoC vendors, not users: my aim is to flag up systems that we consider broken (or at least, unsuitable for running KVM). So I prefer to make this noisy and limit the amount of "useful" information people might be tempted to programmatically scrape from dmesg. cpufeatures uses pr_warn("SANITY CHECK: [...]") here. Maybe I should stick "SANITY CHECK" in here too? I will also try to make the commit message more explicit and/or add comments to make the intent of the code clearer. It may also make sense to make this noise even if KVM isn't enabled (which is a rare case anyhow). Thoughts? > In any case, the logic looks good to me: > > Reviewed-by: Julien Thierry Thanks ---Dave From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.5 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_PASS,USER_AGENT_MUTT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 36CAAC4360F for ; Tue, 26 Feb 2019 12:07:14 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0B35321852 for ; Tue, 26 Feb 2019 12:07:14 +0000 (UTC) Authentication-Results: mail.kernel.org; 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Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gybVv-0000rO-ST; Tue, 26 Feb 2019 12:07:11 +0000 Received: from foss.arm.com ([217.140.101.70]) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gybVL-0000I5-Bh for linux-arm-kernel@lists.infradead.org; Tue, 26 Feb 2019 12:06:42 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id ADE5480D; Tue, 26 Feb 2019 04:06:34 -0800 (PST) Received: from e103592.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id E12303F71D; Tue, 26 Feb 2019 04:06:32 -0800 (PST) Date: Tue, 26 Feb 2019 12:06:30 +0000 From: Dave Martin To: Julien Thierry Subject: Re: [PATCH v5 06/26] arm64/sve: Check SVE virtualisability Message-ID: <20190226120630.GH3567@e103592.cambridge.arm.com> References: <1550519559-15915-1-git-send-email-Dave.Martin@arm.com> <1550519559-15915-7-git-send-email-Dave.Martin@arm.com> <64764e35-c243-e642-a868-5b9e221813c7@arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <64764e35-c243-e642-a868-5b9e221813c7@arm.com> User-Agent: Mutt/1.5.23 (2014-03-12) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190226_040635_580961_62033E6F X-CRM114-Status: GOOD ( 31.95 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Okamoto Takayuki , Christoffer Dall , Ard Biesheuvel , Marc Zyngier , Catalin Marinas , Will Deacon , Zhang Lei , kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Feb 20, 2019 at 11:12:49AM +0000, Julien Thierry wrote: > Hi Dave, > > On 18/02/2019 19:52, Dave Martin wrote: > > Due to the way the effective SVE vector length is controlled and > > trapped at different exception levels, certain mismatches in the > > sets of vector lengths supported by different physical CPUs in the > > system may prevent straightforward virtualisation of SVE at parity > > with the host. > > > > This patch analyses the extent to which SVE can be virtualised > > safely without interfering with migration of vcpus between physical > > CPUs, and rejects late secondary CPUs that would erode the > > situation further. > > > > It is left up to KVM to decide what to do with this information. > > > > Signed-off-by: Dave Martin > > --- > > arch/arm64/include/asm/fpsimd.h | 1 + > > arch/arm64/kernel/cpufeature.c | 2 +- > > arch/arm64/kernel/fpsimd.c | 86 ++++++++++++++++++++++++++++++++++------- > > 3 files changed, 73 insertions(+), 16 deletions(-) > > > > diff --git a/arch/arm64/include/asm/fpsimd.h b/arch/arm64/include/asm/fpsimd.h > > index dd1ad39..964adc9 100644 > > --- a/arch/arm64/include/asm/fpsimd.h > > +++ b/arch/arm64/include/asm/fpsimd.h > > @@ -87,6 +87,7 @@ extern void sve_kernel_enable(const struct arm64_cpu_capabilities *__unused); > > extern u64 read_zcr_features(void); > > > > extern int __ro_after_init sve_max_vl; > > +extern int __ro_after_init sve_max_virtualisable_vl; > > > > #ifdef CONFIG_ARM64_SVE > > > > diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c > > index f6d84e2..5eaacb4 100644 > > --- a/arch/arm64/kernel/cpufeature.c > > +++ b/arch/arm64/kernel/cpufeature.c > > @@ -1825,7 +1825,7 @@ static void verify_sve_features(void) > > unsigned int len = zcr & ZCR_ELx_LEN_MASK; > > > > if (len < safe_len || sve_verify_vq_map()) { > > - pr_crit("CPU%d: SVE: required vector length(s) missing\n", > > + pr_crit("CPU%d: SVE: vector length support mismatch\n", > > smp_processor_id()); > > cpu_die_early(); > > } > > diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c > > index 62c37f0..64729e2 100644 > > --- a/arch/arm64/kernel/fpsimd.c > > +++ b/arch/arm64/kernel/fpsimd.c > > @@ -18,6 +18,7 @@ > > */ > > > > #include > > +#include > > #include > > #include > > #include > > @@ -48,6 +49,7 @@ > > #include > > #include > > #include > > +#include > > > > #define FPEXC_IOF (1 << 0) > > #define FPEXC_DZF (1 << 1) > > @@ -130,14 +132,18 @@ static int sve_default_vl = -1; > > > > /* Maximum supported vector length across all CPUs (initially poisoned) */ > > int __ro_after_init sve_max_vl = SVE_VL_MIN; > > +int __ro_after_init sve_max_virtualisable_vl = SVE_VL_MIN; > > /* Set of available vector lengths, as vq_to_bit(vq): */ > > static __ro_after_init DECLARE_BITMAP(sve_vq_map, SVE_VQ_MAX); > > +/* Set of vector lengths present on at least one cpu: */ > > +static __ro_after_init DECLARE_BITMAP(sve_vq_partial_map, SVE_VQ_MAX); > > static void __percpu *efi_sve_state; > > > > #else /* ! CONFIG_ARM64_SVE */ > > > > /* Dummy declaration for code that will be optimised out: */ > > extern __ro_after_init DECLARE_BITMAP(sve_vq_map, SVE_VQ_MAX); > > +extern __ro_after_init DECLARE_BITMAP(sve_vq_partial_map, SVE_VQ_MAX); > > extern void __percpu *efi_sve_state; > > > > #endif /* ! CONFIG_ARM64_SVE */ > > @@ -623,12 +629,6 @@ int sve_get_current_vl(void) > > return sve_prctl_status(0); > > } > > > > -/* > > - * Bitmap for temporary storage of the per-CPU set of supported vector lengths > > - * during secondary boot. > > - */ > > -static DECLARE_BITMAP(sve_secondary_vq_map, SVE_VQ_MAX); > > - > > static void sve_probe_vqs(DECLARE_BITMAP(map, SVE_VQ_MAX)) > > { > > unsigned int vq, vl; > > @@ -650,6 +650,7 @@ static void sve_probe_vqs(DECLARE_BITMAP(map, SVE_VQ_MAX)) > > void __init sve_init_vq_map(void) > > { > > sve_probe_vqs(sve_vq_map); > > + bitmap_copy(sve_vq_partial_map, sve_vq_map, SVE_VQ_MAX); > > } > > > > /* > > @@ -658,25 +659,58 @@ void __init sve_init_vq_map(void) > > */ > > void sve_update_vq_map(void) > > { > > - sve_probe_vqs(sve_secondary_vq_map); > > - bitmap_and(sve_vq_map, sve_vq_map, sve_secondary_vq_map, SVE_VQ_MAX); > > + DECLARE_BITMAP(tmp_map, SVE_VQ_MAX); > > + > > + sve_probe_vqs(tmp_map); > > + bitmap_and(sve_vq_map, sve_vq_map, tmp_map, SVE_VQ_MAX); > > + bitmap_or(sve_vq_partial_map, sve_vq_partial_map, tmp_map, SVE_VQ_MAX); > > } > > > > /* Check whether the current CPU supports all VQs in the committed set */ > > int sve_verify_vq_map(void) > > { > > - int ret = 0; > > + DECLARE_BITMAP(tmp_map, SVE_VQ_MAX); > > + unsigned long b; > > > > - sve_probe_vqs(sve_secondary_vq_map); > > - bitmap_andnot(sve_secondary_vq_map, sve_vq_map, sve_secondary_vq_map, > > - SVE_VQ_MAX); > > - if (!bitmap_empty(sve_secondary_vq_map, SVE_VQ_MAX)) { > > + sve_probe_vqs(tmp_map); > > + > > + bitmap_complement(tmp_map, tmp_map, SVE_VQ_MAX); > > + if (bitmap_intersects(tmp_map, sve_vq_map, SVE_VQ_MAX)) { > > pr_warn("SVE: cpu%d: Required vector length(s) missing\n", > > smp_processor_id()); > > - ret = -EINVAL; > > + return -EINVAL; > > } > > > > - return ret; > > + if (!IS_ENABLED(CONFIG_KVM) || !is_hyp_mode_available()) > > + return 0; > > + > > + /* > > + * For KVM, it is necessary to ensure that this CPU doesn't > > + * support any vector length that guests may have probed as > > + * unsupported. > > + */ > > + > > + /* Recover the set of supported VQs: */ > > + bitmap_complement(tmp_map, tmp_map, SVE_VQ_MAX); > > + /* Find VQs supported that are not globally supported: */ > > + bitmap_andnot(tmp_map, tmp_map, sve_vq_map, SVE_VQ_MAX); > > + > > + /* Find the lowest such VQ, if any: */ > > + b = find_last_bit(tmp_map, SVE_VQ_MAX); > > + if (b >= SVE_VQ_MAX) > > + return 0; /* no mismatches */ > > + > > + /* > > + * Mismatches above sve_max_virtualisable_vl are fine, since > > + * no guest is allowed to configure ZCR_EL2.LEN to exceed this: > > + */ > > + if (sve_vl_from_vq(bit_to_vq(b)) <= sve_max_virtualisable_vl) { > > + pr_warn("SVE: cpu%d: Unsupported vector length(s) present\n", > > Nit: might be good to specify that the vector length is unsupported for > virtualisation. > > Also, since KVM is the one deciding what to do with the information, > should we have a warning here? But I can understand that knowing which > CPUs are introducing unsupported vector length, maybe using pr_devel() > instead of pr_warn() These warnings are really for consumption by SoC vendors, not users: my aim is to flag up systems that we consider broken (or at least, unsuitable for running KVM). So I prefer to make this noisy and limit the amount of "useful" information people might be tempted to programmatically scrape from dmesg. cpufeatures uses pr_warn("SANITY CHECK: [...]") here. Maybe I should stick "SANITY CHECK" in here too? I will also try to make the commit message more explicit and/or add comments to make the intent of the code clearer. It may also make sense to make this noise even if KVM isn't enabled (which is a rare case anyhow). Thoughts? > In any case, the logic looks good to me: > > Reviewed-by: Julien Thierry Thanks ---Dave _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel